180 lines
4.4 KiB
ArmAsm
180 lines
4.4 KiB
ArmAsm
/* $NetBSD: rapide_io_asm.S,v 1.5 1998/06/28 07:27:55 thorpej Exp $ */
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/*
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* Copyright (c) 1997 Mark Brinicombe.
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* Copyright (c) 1997 Causality Limited.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <machine/asm.h>
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/*
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* bus_space I/O functions for Yellowstone RapIDE podule
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*
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* These are optimised 32 bit transfer routines
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*/
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.text
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ENTRY(rapide_bs_rm_4)
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add r0, r1, r2
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mov r1, r3
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/* Test length */
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ldr r2, [sp, #0]
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tst r2, #0x7f
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beq rapide_rm_4_m128
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tst r2, #0x07
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beq rapide_rm_4_m8
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/* xfer 4 bytes at a time */
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rapide_rm_4_loop:
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ldr r3, [r0]
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str r3, [r1], #0x0004
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subs r2, r2, #1
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bne rapide_rm_4_loop
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mov pc, r14
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rapide_rm_4_m8:
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/* xfer 32 bytes at a time */
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stmfd sp!, {r4-r10}
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rapide_rm_4_m8_loop:
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ldmia r0, {r3-r10}
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stmia r1!, {r3-r10}
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subs r2, r2, #8
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bne rapide_rm_4_m8_loop
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ldmfd sp!, {r4-r10}
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mov pc, r14
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rapide_rm_4_m128:
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/* xfer 512 bytes at a time */
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stmfd sp!, {r4-r12, r14}
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rapide_rm_4_m128_loop:
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r12, r14}
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stmia r1!, {r3-r12, r14}
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ldmia r0, {r3-r9}
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stmia r1!, {r3-r9}
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subs r2, r2, #128
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bne rapide_rm_4_m128_loop
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ldmfd sp!, {r4-r12, pc}
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ENTRY(rapide_bs_wm_4)
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add r0, r1, r2
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mov r1, r3
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ldr r2, [sp, #0]
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tst r2, #0x7f
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beq rapide_wm_4_m128
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tst r2, #0x07
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beq rapide_wm_4_m8
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/* xfer 4 bytes at a time */
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rapide_wm_4_loop:
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ldr r3, [r1], #0x0004
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str r3, [r0]
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subs r2, r2, #1
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bne rapide_wm_4_loop
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mov pc, r14
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rapide_wm_4_m8:
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/* xfer 32 bytes at a time */
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stmfd sp!, {r4-r10}
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rapide_wm_4_m8_loop:
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ldmia r1!, {r3-r10}
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stmia r0, {r3-r10}
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subs r2, r2, #8
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bne rapide_wm_4_m8_loop
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ldmfd sp!, {r4-r10}
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mov pc, r14
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rapide_wm_4_m128:
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/* xfer 512 bytes at a time */
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stmfd sp!, {r4-r12}
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rapide_wm_4_m128_loop:
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r12}
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stmia r0, {r3-r12}
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ldmia r1!, {r3-r10}
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stmia r0, {r3-r10}
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subs r2, r2, #128
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bne rapide_wm_4_m128_loop
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ldmfd sp!, {r4-r12}
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mov pc, r14
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