103 lines
3.9 KiB
C
103 lines
3.9 KiB
C
/* $NetBSD: hpciovar.h,v 1.4 2001/06/04 18:59:32 uch Exp $ */
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/*-
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* Copyright (c) 2001 TAKEMURA Shin.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the project nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#ifndef _DEV_HPC_HPCIOVAR_H_
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#define _DEV_HPC_HPCIOVAR_H_
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struct hpcio_chip;
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typedef struct hpcio_chip *hpcio_chip_t;
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typedef void *hpcio_intr_handle_t;
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struct hpcio_chip {
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int hc_chipid;
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char *hc_name;
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void *hc_sc;
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int (*hc_portread)(hpcio_chip_t, int);
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void (*hc_portwrite)(hpcio_chip_t, int, int);
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hpcio_intr_handle_t(*hc_intr_establish)(hpcio_chip_t, int, int,
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int (*)(void *), void *);
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void (*hc_intr_disestablish)(hpcio_chip_t, hpcio_intr_handle_t);
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void (*hc_intr_clear)(hpcio_chip_t, hpcio_intr_handle_t);
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void (*hc_register_iochip)(hpcio_chip_t, hpcio_chip_t);
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void (*hc_update)(hpcio_chip_t);
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void (*hc_dump)(hpcio_chip_t);
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};
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struct hpcio_attach_args {
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char *haa_busname;
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void *haa_sc;
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hpcio_chip_t (*haa_getchip)(void*, int);
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bus_space_tag_t haa_iot; /* I/O space tag */
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};
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#define HPCIO_BUSNAME "hpcioif"
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#define hpcio_portread(hc, port) \
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((*(hc)->hc_portread)((hc), (port)))
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#define hpcio_portwrite(hc, port, data) \
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((*(hc)->hc_portwrite)((hc), (port), (data)))
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#define hpcio_intr_establish(hc, port, mode, func, arg) \
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((*(hc)->hc_intr_establish)((hc),(port),(mode),(func),(arg)))
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#define hpcio_intr_disestablish(hc, handle) \
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((*(hc)->hc_intr_disestablish)((hc), (handle)))
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#define hpcio_intr_clear(hc, handle) \
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((*(hc)->hc_intr_clear)((hc), (handle)))
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#define hpcio_register_iochip(hc, iochip) \
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((*(hc)->hc_register_iochip)((hc), (iochip)))
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#define hpcio_update(hc) \
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((*(hc)->hc_update)(hc))
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#define hpcio_dump(hc) \
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((*(hc)->hc_dump)(hc))
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/* interrupt trigger options. */
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#define HPCIO_INTR_EDGE (1<<0)
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#define HPCIO_INTR_LEVEL (0<<0)
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#define HPCIO_INTR_HOLD (1<<1)
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#define HPCIO_INTR_THROUGH (0<<1)
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#define HPCIO_INTR_HIGH (1<<2)
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#define HPCIO_INTR_LOW (0<<2)
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#define HPCIO_INTR_POSEDGE (1<<3)
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#define HPCIO_INTR_NEGEDGE (1<<4)
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#define HPCIO_INTR_LEVEL_HIGH_HOLD \
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(HPCIO_INTR_LEVEL|HPCIO_INTR_HIGH|HPCIO_INTR_HOLD)
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#define HPCIO_INTR_LEVEL_HIGH_THROUGH \
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(HPCIO_INTR_LEVEL|HPCIO_INTR_HIGH|HPCIO_INTR_THROUGH)
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#define HPCIO_INTR_LEVEL_LOW_HOLD \
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(HPCIO_INTR_LEVEL|HPCIO_INTR_LOW|HPCIO_INTR_HOLD)
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#define HPCIO_INTR_LEVEL_LOW_THROUGH \
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(HPCIO_INTR_LEVEL|HPCIO_INTR_LOW|HPCIO_INTR_THROUGH)
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#define HPCIO_INTR_EDGE_HOLD \
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(HPCIO_INTR_EDGE|HPCIO_INTR_HOLD)
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#define HPCIO_INTR_EDGE_THROUGH \
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(HPCIO_INTR_EDGE|HPCIO_INTR_THROUGH)
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#endif /* !_DEV_HPC_HPCIOVAR_H_ */
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