193 lines
7.1 KiB
C
193 lines
7.1 KiB
C
/* $NetBSD: if_qereg.h,v 1.9 2005/12/11 12:23:29 christos Exp $ */
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/*
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* Copyright (c) 1988 Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Digital Equipment Corp.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)if_qereg.h 7.3 (Berkeley) 6/28/90
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*/
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/* @(#)if_qereg.h 1.2 (ULTRIX) 1/3/85 */
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/****************************************************************
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* *
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* Licensed from Digital Equipment Corporation *
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* Copyright (c) *
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* Digital Equipment Corporation *
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* Maynard, Massachusetts *
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* 1985, 1986 *
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* All rights reserved. *
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* *
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* The Information in this software is subject to change *
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* without notice and should not be construed as a commitment *
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* by Digital Equipment Corporation. Digital makes no *
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* representations about the suitability of this software for *
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* any purpose. It is supplied "As Is" without expressed or *
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* implied warranty. *
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* *
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* If the Regents of the University of California or its *
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* licensees modify the software in a manner creating *
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* derivative copyright rights, appropriate copyright *
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* legends may be placed on the derivative work in addition *
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* to that set forth above. *
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* *
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****************************************************************/
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/* ---------------------------------------------------------------------
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* Modification History
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*
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* 13 Feb. 84 -- rjl
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*
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* Initial version of driver. derived from IL driver.
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*
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* ---------------------------------------------------------------------
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*/
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/*
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* Digital Q-BUS to NI Adapter
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*/
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#ifdef notdef
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struct qedevice {
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u_short qe_sta_addr[2]; /* Station address (actually 6 */
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u_short qe_rcvlist_lo; /* Receive list lo address */
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u_short qe_rcvlist_hi; /* Receive list hi address */
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u_short qe_xmtlist_lo; /* Transmit list lo address */
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u_short qe_xmtlist_hi; /* Transmit list hi address */
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u_short qe_vector; /* Interrupt vector */
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u_short qe_csr; /* Command and Status Register */
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};
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#endif
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/*
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* Register offsets in register space.
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*/
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#define QE_CSR_ADDR1 0
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#define QE_CSR_ADDR2 2
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#define QE_CSR_RCLL 4
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#define QE_CSR_RCLH 6
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#define QE_CSR_XMTL 8
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#define QE_CSR_XMTH 10
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#define QE_CSR_VECTOR 12
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#define QE_CSR_CSR 14
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/*
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* Command and status bits (csr)
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*/
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#define QE_RCV_ENABLE 0x0001 /* Receiver enable */
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#define QE_RESET 0x0002 /* Software reset */
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#define QE_NEX_MEM_INT 0x0004 /* Non existent mem interrupt */
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#define QE_LOAD_ROM 0x0008 /* Load boot/diag from rom */
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#define QE_XL_INVALID 0x0010 /* Transmit list invalid */
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#define QE_RL_INVALID 0x0020 /* Receive list invalid */
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#define QE_INT_ENABLE 0x0040 /* Interrupt enable */
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#define QE_XMIT_INT 0x0080 /* Transmit interrupt */
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#define QE_ILOOP 0x0100 /* Internal loopback */
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#define QE_ELOOP 0x0200 /* External loopback */
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#define QE_STIM_ENABLE 0x0400 /* Sanity timer enable */
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#define QE_POWERUP 0x1000 /* Tranceiver power on */
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#define QE_CARRIER 0x2000 /* Carrier detect */
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#define QE_RCV_INT 0x8000 /* Receiver interrupt */
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/*
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* Transmit and receive ring discriptor ---------------------------
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*
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* The QNA uses the flag, status1 and the valid bit as a handshake/semiphore
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* mechinism.
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*
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* The flag word is written on ( bits 15,15 set to 1 ) when it reads the
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* descriptor. If the valid bit is set it considers the address to be valid.
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* When it uses the buffer pointed to by the valid address it sets status word
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* one.
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*/
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struct qe_ring {
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u_short qe_flag; /* Buffer utilization flags */
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u_short qe_addr_hi;
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u_short qe_addr_lo; /* Low order bits of address */
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short qe_buf_len; /* Negative buffer length */
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u_short qe_status1; /* Status word one */
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u_short qe_status2; /* Status word two */
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};
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/*
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* High word address control bits.
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*/
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#define QE_VALID 0x8000
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#define QE_CHAIN 0x4000
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#define QE_EOMSG 0x2000
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#define QE_SETUP 0x1000
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#define QE_ODDEND 0x0080
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#define QE_ODDBEGIN 0x0040
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/*
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* Status word definations (receive)
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* word1
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*/
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#define QE_OVF 0x0001 /* Receiver overflow */
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#define QE_CRCERR 0x0002 /* CRC error */
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#define QE_FRAME 0x0004 /* Framing alignment error */
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#define QE_SHORT 0x0008 /* Packet size < 10 bytes */
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#define QE_RBL_HI 0x0700 /* Hi bits of receive len */
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#define QE_RUNT 0x0800 /* Runt packet */
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#define QE_DISCARD 0x1000 /* Discard the packet */
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#define QE_ESETUP 0x2000 /* Looped back setup or eloop */
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#define QE_ERROR 0x4000 /* Receiver error */
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#define QE_LASTNOT 0x8000 /* Not the last in the packet */
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/* word2 */
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#define QE_RBL_LO 0x00ff /* Low bits of receive len */
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/*
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* Status word definations (transmit)
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* word1
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*/
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#define QE_CCNT 0x00f0 /* Collision count this packet */
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#define QE_FAIL 0x0100 /* Heart beat check failure */
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#define QE_ABORT 0x0200 /* Transmission abort */
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#define QE_STE16 0x0400 /* Sanity timer default on */
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#define QE_NOCAR 0x0800 /* No carrier */
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#define QE_LOSS 0x1000 /* Loss of carrier while xmit */
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/* word2 */
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#define QE_TDR 0x3fff /* Time domain reflectometry */
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/*
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* General constant definations
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*/
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#define QEALLOC 0 /* Allocate an mbuf */
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#define QENOALLOC 1 /* No mbuf allocation */
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#define QEDEALLOC 2 /* Release an mbuf chain */
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#define QE_NOTYET 0x8000 /* Descriptor not in use yet */
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#define QE_INUSE 0x4000 /* Descriptor being used by QNA */
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#define QE_MASK 0xc000 /* Lastnot/error/used mask */
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/*
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* Values for the length of the setup packet that control reception filter.
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*/
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#define QE_SETUPLEN 128 /* Size of setup packet */
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#define QE_ALLMULTI 1 /* Receive all multicasts */
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#define QE_PROMISC 2 /* Receive all packets */
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