94 lines
3.4 KiB
C
94 lines
3.4 KiB
C
/* $NetBSD: a12cvar.h,v 1.2 1998/03/02 06:56:16 ross Exp $ */
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/* [Notice revision 2.0]
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* Copyright (c) 1997 Avalon Computer Systems, Inc.
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* All rights reserved.
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*
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* Author: Ross Harvey
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright and
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* author notice, this list of conditions, and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of Avalon Computer Systems, Inc. nor the names of
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* its contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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* 4. This copyright will be assigned to The NetBSD Foundation on
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* 1/1/2000 unless these terms (including possibly the assignment
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* date) are updated in writing by Avalon prior to the latest specified
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* assignment date.
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*
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* THIS SOFTWARE IS PROVIDED BY AVALON COMPUTER SYSTEMS, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _ALPHA_PCI_A12CVAR_H_
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#define _ALPHA_PCI_A12CVAR_H_
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#define A12CVAR() /* generate ctags(1) key */
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#include <dev/isa/isavar.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/pci_sgmap_pte64.h>
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/*
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* A12 Core Logic -a12c- configuration.
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*/
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struct a12c_config {
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int ac_initted;
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bus_space_tag_t ac_iot, ac_memt;
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struct alpha_pci_chipset ac_pc;
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struct alpha_bus_dma_tag ac_dmat_direct;
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struct alpha_bus_dma_tag ac_dmat_sgmap;
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struct alpha_sgmap ac_sgmap;
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u_int32_t ac_hae_mem;
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u_int32_t ac_hae_io;
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struct extent *ac_io_ex, *ac_d_mem_ex, *ac_s_mem_ex;
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int ac_mallocsafe;
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};
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struct a12c_softc {
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struct device sc_dev;
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struct a12c_config *sc_ccp;
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};
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void a12c_init __P((struct a12c_config *, int));
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void a12c_pci_init __P((pci_chipset_tag_t, void *));
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void a12c_dma_init __P((struct a12c_config *));
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bus_space_tag_t a12c_bus_io_init __P((void *));
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bus_space_tag_t a12c_bus_mem_init __P((void *));
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/*
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* The following two cpu numbers are relative to the local switch;
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* in a multistage system these numbers will not be unique. a12_ethercpu
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* is used to route bootp packets and to mount the root FS.
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*/
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int a12_cpu_local; /* our CPU number relative to the local switch */
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int a12_cpu_ether; /* relative CPU number with outside world access */
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int a12_cpu_global; /* XXX used to construct MSN routing tables XXX */
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void a12_intr_register_xb __P((int (*)(void *)));
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void a12_intr_register_icw __P((int (*)(void *)));
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void configure_xb __P((void));
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void configure_a12dc __P((void));
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#endif
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