269 lines
7.3 KiB
C
269 lines
7.3 KiB
C
/* $NetBSD: tc_3000_500.c,v 1.4 1996/05/02 21:56:46 cgd Exp $ */
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/*
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* Copyright (c) 1994, 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/param.h>
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#include <sys/device.h>
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#include <machine/autoconf.h>
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#include <machine/pte.h>
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#include <dev/tc/tcvar.h>
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#include <alpha/tc/tc_conf.h>
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#include <alpha/tc/tc_3000_500.h>
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void tc_3000_500_intr_setup __P((void));
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void tc_3000_500_intr_establish __P((struct device *, void *,
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tc_intrlevel_t, int (*)(void *), void *));
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void tc_3000_500_intr_disestablish __P((struct device *, void *));
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void tc_3000_500_iointr __P((void *, int));
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int tc_3000_500_intrnull __P((void *));
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#define C(x) ((void *)(u_long)x)
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#define KV(x) (phystok0seg(x))
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struct tc_slotdesc tc_3000_500_slots[] = {
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{ KV(0x100000000), C(TC_3000_500_DEV_OPT0), }, /* 0 - opt slot 0 */
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{ KV(0x120000000), C(TC_3000_500_DEV_OPT1), }, /* 1 - opt slot 1 */
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{ KV(0x140000000), C(TC_3000_500_DEV_OPT2), }, /* 2 - opt slot 2 */
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{ KV(0x160000000), C(TC_3000_500_DEV_OPT3), }, /* 3 - opt slot 3 */
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{ KV(0x180000000), C(TC_3000_500_DEV_OPT4), }, /* 4 - opt slot 4 */
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{ KV(0x1a0000000), C(TC_3000_500_DEV_OPT5), }, /* 5 - opt slot 5 */
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{ KV(0x1c0000000), C(TC_3000_500_DEV_BOGUS), }, /* 6 - TCDS ASIC */
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{ KV(0x1e0000000), C(TC_3000_500_DEV_BOGUS), }, /* 7 - IOCTL ASIC */
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};
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int tc_3000_500_nslots =
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sizeof(tc_3000_500_slots) / sizeof(tc_3000_500_slots[0]);
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struct tc_builtin tc_3000_500_builtins[] = {
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{ "FLAMG-IO", 7, 0x00000000, C(TC_3000_500_DEV_IOASIC), },
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{ "PMAGB-BA", 7, 0x02000000, C(TC_3000_500_DEV_CXTURBO), },
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{ "PMAZ-DS ", 6, 0x00000000, C(TC_3000_500_DEV_TCDS), },
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};
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int tc_3000_500_nbuiltins =
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sizeof(tc_3000_500_builtins) / sizeof(tc_3000_500_builtins[0]);
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u_int32_t tc_3000_500_intrbits[TC_3000_500_NCOOKIES] = {
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TC_3000_500_IR_OPT0,
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TC_3000_500_IR_OPT1,
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TC_3000_500_IR_OPT2,
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TC_3000_500_IR_OPT3,
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TC_3000_500_IR_OPT4,
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TC_3000_500_IR_OPT5,
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TC_3000_500_IR_TCDS,
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TC_3000_500_IR_IOASIC,
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TC_3000_500_IR_CXTURBO,
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};
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struct tcintr {
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int (*tci_func) __P((void *));
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void *tci_arg;
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} tc_3000_500_intr[TC_3000_500_NCOOKIES];
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void
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tc_3000_500_intr_setup()
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{
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u_long i;
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u_int32_t imr;
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/*
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* Disable all slot interrupts. Note that this cannot
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* actually disable CXTurbo, TCDS, and IOASIC interrupts.
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*/
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imr = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
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for (i = 0; i < TC_3000_500_NCOOKIES; i++)
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imr |= tc_3000_500_intrbits[i];
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*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = imr;
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tc_mb();
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/*
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* Set up interrupt handlers.
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*/
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for (i = 0; i < TC_3000_500_NCOOKIES; i++) {
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tc_3000_500_intr[i].tci_func = tc_3000_500_intrnull;
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tc_3000_500_intr[i].tci_arg = (void *)i;
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}
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}
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void
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tc_3000_500_intr_establish(tcadev, cookie, level, func, arg)
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struct device *tcadev;
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void *cookie, *arg;
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tc_intrlevel_t level;
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int (*func) __P((void *));
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{
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u_long dev = (u_long)cookie;
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u_int32_t imr;
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#ifdef DIAGNOSTIC
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/* XXX bounds-check cookie. */
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#endif
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if (tc_3000_500_intr[dev].tci_func != tc_3000_500_intrnull)
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panic("tc_3000_500_intr_establish: cookie %d twice", dev);
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tc_3000_500_intr[dev].tci_func = func;
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tc_3000_500_intr[dev].tci_arg = arg;
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imr = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
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imr &= ~tc_3000_500_intrbits[dev];
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*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = imr;
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tc_mb();
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}
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void
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tc_3000_500_intr_disestablish(tcadev, cookie)
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struct device *tcadev;
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void *cookie;
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{
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u_long dev = (u_long)cookie;
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u_int32_t imr;
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#ifdef DIAGNOSTIC
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/* XXX bounds-check cookie. */
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#endif
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if (tc_3000_500_intr[dev].tci_func == tc_3000_500_intrnull)
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panic("tc_3000_500_intr_disestablish: cookie %d bad intr",
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dev);
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imr = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
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imr |= tc_3000_500_intrbits[dev];
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*(volatile u_int32_t *)TC_3000_500_IMR_WRITE = imr;
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tc_mb();
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tc_3000_500_intr[dev].tci_func = tc_3000_500_intrnull;
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tc_3000_500_intr[dev].tci_arg = (void *)dev;
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}
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int
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tc_3000_500_intrnull(val)
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void *val;
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{
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panic("tc_3000_500_intrnull: uncaught TC intr for cookie %ld\n",
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(u_long)val);
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}
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void
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tc_3000_500_iointr(framep, vec)
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void *framep;
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int vec;
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{
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u_int32_t ir, imr, tmp;
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int ifound;
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#ifdef DIAGNOSTIC
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int s;
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if (vec != 0x800)
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panic("INVALID ASSUMPTION: vec %x, not 0x800", vec);
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s = splhigh();
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if (s != PSL_IPL_IO)
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panic("INVALID ASSUMPTION: IPL %d, not %d", s, PSL_IPL_IO);
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splx(s);
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#endif
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do {
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tc_syncbus();
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ir = *(volatile u_int32_t *)TC_3000_500_IR;
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imr = *(volatile u_int32_t *)TC_3000_500_IMR_READ;
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tc_mb();
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tmp = *(volatile u_int32_t *)TC_3000_500_IR_CLEAR;
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/* Ignore interrupts that we haven't enabled. */
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ir &= ~(imr & 0x1ff);
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ifound = 0;
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#define CHECKINTR(slot) \
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if (ir & tc_3000_500_intrbits[slot]) { \
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ifound = 1; \
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(*tc_3000_500_intr[slot].tci_func) \
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(tc_3000_500_intr[slot].tci_arg); \
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}
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/* Do them in order of priority; highest slot # first. */
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CHECKINTR(TC_3000_500_DEV_CXTURBO);
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CHECKINTR(TC_3000_500_DEV_IOASIC);
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CHECKINTR(TC_3000_500_DEV_TCDS);
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CHECKINTR(TC_3000_500_DEV_OPT5);
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CHECKINTR(TC_3000_500_DEV_OPT4);
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CHECKINTR(TC_3000_500_DEV_OPT3);
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CHECKINTR(TC_3000_500_DEV_OPT2);
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CHECKINTR(TC_3000_500_DEV_OPT1);
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CHECKINTR(TC_3000_500_DEV_OPT0);
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#undef CHECKINTR
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#ifdef DIAGNOSTIC
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#define PRINTINTR(msg, bits) \
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if (ir & bits) \
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printf(msg);
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PRINTINTR("Second error occurred\n", TC_3000_500_IR_ERR2);
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PRINTINTR("DMA buffer error\n", TC_3000_500_IR_DMABE);
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PRINTINTR("DMA cross 2K boundary\n", TC_3000_500_IR_DMA2K);
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PRINTINTR("TC reset in progress\n", TC_3000_500_IR_TCRESET);
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PRINTINTR("TC parity error\n", TC_3000_500_IR_TCPAR);
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PRINTINTR("DMA tag error\n", TC_3000_500_IR_DMATAG);
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PRINTINTR("Single-bit error\n", TC_3000_500_IR_DMASBE);
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PRINTINTR("Double-bit error\n", TC_3000_500_IR_DMADBE);
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PRINTINTR("TC I/O timeout\n", TC_3000_500_IR_TCTIMEOUT);
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PRINTINTR("DMA block too long\n", TC_3000_500_IR_DMABLOCK);
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PRINTINTR("Invalid I/O address\n", TC_3000_500_IR_IOADDR);
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PRINTINTR("DMA scatter/gather invalid\n", TC_3000_500_IR_DMASG);
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PRINTINTR("Scatter/gather parity error\n",
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TC_3000_500_IR_SGPAR);
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#undef PRINTINTR
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#endif
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} while (ifound);
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}
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/*
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* tc_3000_500_ioslot --
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* Set the PBS bits for devices on the TC.
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*/
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void
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tc_3000_500_ioslot(slot, flags, set)
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u_int32_t slot, flags;
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int set;
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{
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volatile u_int32_t *iosp;
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u_int32_t ios;
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int s;
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iosp = (volatile u_int32_t *)TC_3000_500_IOSLOT;
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ios = *iosp;
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flags <<= (slot * 3);
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if (set)
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ios |= flags;
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else
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ios &= ~flags;
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s = splhigh();
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*iosp = ios;
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tc_mb();
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splx(s);
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}
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