97 lines
3.8 KiB
ArmAsm
97 lines
3.8 KiB
ArmAsm
/* $NetBSD: sdivsi3.S,v 1.2 2002/09/28 10:33:59 scw Exp $ */
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/*
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* Copyright 2002 Wasabi Systems, Inc.
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* All rights reserved.
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*
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* Written by Steve C. Woodford for Wasabi Systems, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed for the NetBSD Project by
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* Wasabi Systems, Inc.
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* 4. The name of Wasabi Systems, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY WASABI SYSTEMS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL WASABI SYSTEMS, INC
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Signed 32-bit division.
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*
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* The SH5 has no native integer divide instruction, which normally doesn't
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* give the compiler a problem as it uses the FPU's divide instruction
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* to fabricate an integer divide.
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*
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* Trouble is, the kernel only saves user FPU state on a context switch and
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* by then there's a fair chance the kernel would have stomped all over it by
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* using floating point instructions itself.
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*
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* The following implementation still uses the FPU's division support, but
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* ensures the affected FP registers are saved and restored before returning.
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*
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* Note: The FP register dirty bits in the USR are not saved/restored as
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* there is a per-process USR stashed in the trapframe on kernel entry which
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* encodes the *real* dirty register state.
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*
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* Note: Division by zero will result in an FPU exception...
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*
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* Note: These don't follow the regular SH-5 ABI calling convention.
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* The dividend is passed in r4 instead of r2, the divisor is passed in
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* r5, and the result is returned in r0. Also, we can only clobber r1-r3.
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*/
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#include <machine/asm.h>
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/*
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* int __divsi3(int dividend, int divisor)
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* {
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* return (dividend / divisor);
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* }
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*
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* dividend = r4
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* divisor = r5
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*
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* Return result in r0
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*/
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ENTRY(__sdivsi3)
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fmov.dq dr0, r1 /* Preserve dr0 (fr0/fr1) in r1 */
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fmov.dq dr2, r2 /* Preserve dr2 (fr2/fr3) in r2 */
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fgetscr fr0 /* Fetch FPSCR */
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fmov.sl fr0, r3 /* Preserve in r3 */
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fmov.ls r63, fr0
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fputscr fr0 /* Disable FPU exceptions */
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fmov.ls r4, fr0 /* fr0 = bitwise copy of dividend */
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fmov.ls r5, fr2 /* fr2 = bitwise copy of divisor */
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float.ld fr0, dr0 /* int to double conversion of fr0 */
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float.ld fr2, dr2 /* int to double conversion of fr2 */
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ptabs/l r18, tr0
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fdiv.d dr0, dr2, dr0 /* dr0 = dr0 / dr2 */
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fmov.qd r2, dr2 /* Restore dr2 */
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ftrc.dl dr0, fr0 /* double to int conversion */
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fmov.sl fr0, r0 /* Sign-extended result to r0 */
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fmov.ls r3, fr0 /* Restore FPSCR */
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fputscr fr0
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fmov.qd r1, dr0 /* Restore dr0 */
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blink tr0, r63
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