9ab3caec28
define splimp() using splraise so early calls to the VM code (and pmap) do not accidently enable interrupts.
152 lines
4.9 KiB
C
152 lines
4.9 KiB
C
/* $NetBSD: psl.h,v 1.13 1997/05/29 21:16:59 gwr Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Gordon W. Ross.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef PSL_C
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#include <m68k/psl.h>
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/* Could define this in the common <m68k/psl.h> instead. */
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#if defined(_KERNEL) && !defined(_LOCORE)
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#ifndef __GNUC__
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/* No inline, use the real functions in locore.s */
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extern int _getsr __P((void));
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extern int _spl __P((int new));
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extern int _splraise __P((int new));
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#else /* GNUC */
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/*
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* Define inline functions for PSL manipulation.
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* These are as close to macros as one can get.
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* When not optimizing gcc will call the locore.s
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* functions by the same names, so breakpoints on
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* these functions will work normally, etc.
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* (See the GCC extensions info document.)
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*/
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/* Get current sr value. */
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extern __inline__ int
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_getsr(void)
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{
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register int rv;
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__asm __volatile ("clrl %0; movew sr,%0" : "&=d" (rv));
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return (rv);
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}
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/* Set the current sr and return the old value. */
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extern __inline__ int
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_spl(int new)
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{
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register int old;
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__asm __volatile (
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"clrl %0; movew sr,%0; movew %1,sr" :
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"&=d" (old) : "di" (new));
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return (old);
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}
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/*
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* Like _spl() but can be used in places where the
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* interrupt priority may already have been raised,
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* without risk of enabling interrupts by accident.
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* The comparison includes the "S" bit (always on)
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* because that generates more efficient code.
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*/
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extern __inline__ int
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_splraise(int new)
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{
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register int old;
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__asm __volatile ("clrl %0; movew sr,%0" : "&=d" (old));
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if ((old & PSL_HIGHIPL) < new) {
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__asm __volatile ("movew %0,sr;" : : "di" (new));
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}
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return (old);
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}
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#endif /* GNUC */
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/*
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* The rest of this is sun3 specific, because other ports may
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* need to do special things in spl0() (i.e. simulate SIR).
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* Suns have a REAL interrupt register, so spl0() and splx(s)
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* have no need to check for any simulated interrupts, etc.
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*/
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#define spl0() _spl(PSL_S|PSL_IPL0)
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#define spl1() _spl(PSL_S|PSL_IPL1)
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#define spl2() _spl(PSL_S|PSL_IPL2)
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#define spl3() _spl(PSL_S|PSL_IPL3)
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#define spl4() _spl(PSL_S|PSL_IPL4)
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#define spl5() _spl(PSL_S|PSL_IPL5)
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#define spl6() _spl(PSL_S|PSL_IPL6)
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#define spl7() _spl(PSL_S|PSL_IPL7)
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#define splx(x) _spl(x)
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/* IPL used by soft interrupts: netintr(), softclock() */
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#define splsoftclock() spl1()
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#define splsoftnet() spl1()
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/* Highest block device (strategy) IPL. */
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#define splbio() spl2()
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/* Highest network interface IPL. */
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#define splnet() spl3()
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/* Highest tty device IPL. */
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#define spltty() spl4()
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/*
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* Requirement: imp >= (highest network, tty, or disk IPL)
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* This is used mostly in the VM code. (Why not splvm?)
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* Note that the VM code runs at spl7 during kernel
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* initialization, and later at spl0, so we have to
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* use splraise to avoid enabling interrupts early.
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*/
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#define splimp() _splraise(PSL_S|PSL_IPL4)
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/* Intersil clock hardware interrupts (hard-wired at 5) */
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#define splclock() spl5()
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#define splstatclock() splclock()
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/* Block out all interrupts (except NMI of course). */
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#define splhigh() spl7()
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#define splsched() spl7()
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#endif /* KERNEL && !_LOCORE */
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#endif /* PSL_C */
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