495 lines
9.8 KiB
C
495 lines
9.8 KiB
C
/* $NetBSD: rtc.c,v 1.11 2000/11/01 12:28:50 abs Exp $ */
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/*
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* Copyright (c) 1994-1996 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* rtc.c
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*
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* Routines to read and write the RTC and CMOS RAM
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*
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* Created : 13/10/94
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* Updated : 15/07/2000 DD
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#include <machine/rtc.h>
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#include <arm32/dev/iic.h>
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#include <arm32/dev/todclockvar.h>
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struct rtc_softc {
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struct device sc_dev;
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int sc_flags;
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#define RTC_BROKEN 1
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#define RTC_OPEN 2
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};
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void rtcattach __P((struct device *parent, struct device *self, void *aux));
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int rtcmatch __P((struct device *parent, struct cfdata *cf, void *aux));
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int rtc_read __P((void *, rtc_t *));
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int rtc_write __P((void *, rtc_t *));
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/* Read a byte from CMOS RAM */
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int
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cmos_read(location)
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int location;
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{
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u_char buff;
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/*
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* This commented code dates from when I was translating CMOS address
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* from the RISCOS addresses. Now all addresses are specifed as
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* actual addresses in the CMOS RAM
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*/
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/*
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if (location > 0xF0)
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return(-1);
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if (location < 0xC0)
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buff = location + 0x40;
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else
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buff = location - 0xB0;
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*/
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buff = location;
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if (iic_control(RTC_Write, &buff, 1))
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return(-1);
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if (iic_control(RTC_Read, &buff, 1))
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return(-1);
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return(buff);
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}
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/* Write a byte to CMOS RAM */
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int
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cmos_write(location, value)
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int location;
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int value;
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{
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u_char buff[2];
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int oldvalue, oldsum;
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/*
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* This commented code dates from when I was translating CMOS address
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* from the RISCOS addresses. Now all addresses are specifed as
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* actual addresses in the CMOS RAM
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*/
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/* if (location > 0xF0)
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return(-1);
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if (location < 0xC0)
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buff = location + 0x40;
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else
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buff = location - 0xB0;
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*/
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buff[0] = location;
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buff[1] = value;
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/* Read the old CMOS location value and old checksum */
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oldvalue = cmos_read(location);
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if (oldvalue<0)
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return(-1);
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oldsum = cmos_read(RTC_ADDR_CHECKSUM);
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if (oldsum<0)
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return(-1);
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if (iic_control(RTC_Write, buff, 2))
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return(-1);
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/* Now update the checksum. This code only modifies the value. It does */
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/* not recalculate it */
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buff[0] = RTC_ADDR_CHECKSUM;
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buff[1] = oldsum - oldvalue + value;
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if (iic_control(RTC_Write, buff, 2))
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return(-1);
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return(0);
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}
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/* Hex to BCD and BCD to hex conversion routines */
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static __inline int
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hexdectodec(n)
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u_char n;
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{
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return(((n >> 4) & 0x0F) * 10 + (n & 0x0F));
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}
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static __inline int
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dectohexdec(n)
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u_char n;
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{
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return(((n / 10) << 4) + (n % 10));
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}
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/* Write the RTC data from an 8 byte buffer */
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int
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rtc_write(arg, rtc)
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void *arg;
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rtc_t *rtc;
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{
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u_char buff[8];
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buff[0] = 1;
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/* buff[1] = dectohexdec(rtc->rtc_centi);
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buff[2] = dectohexdec(rtc->rtc_sec);
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buff[3] = dectohexdec(rtc->rtc_min);
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buff[4] = dectohexdec(rtc->rtc_hour) & 0x3f;
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buff[5] = dectohexdec(rtc->rtc_day);
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buff[6] = dectohexdec(rtc->rtc_mon);
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if (iic_control(RTC_Write, buff, 7))
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return(0);
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if (cmos_write(RTC_ADDR_YEAR, rtc->rtc_year))
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return(0);
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if (cmos_write(RTC_ADDR_CENT, rtc->rtc_cen))
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return(0);
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*/
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printf("rtc_write: Currently disabled\n");
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return(1);
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}
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/* Read the RTC data into a 8 byte buffer */
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int
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rtc_read(arg, rtc)
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void *arg;
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rtc_t *rtc;
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{
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u_char buff[8];
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int byte;
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buff[0] = 0;
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if (iic_control(RTC_Write, buff, 1))
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return(0);
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if (iic_control(RTC_Read, buff, 8))
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return(0);
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rtc->rtc_micro = 0;
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rtc->rtc_centi = hexdectodec(buff[1] & 0xff);
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rtc->rtc_sec = hexdectodec(buff[2] & 0x7f);
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rtc->rtc_min = hexdectodec(buff[3] & 0x7f);
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rtc->rtc_hour = hexdectodec(buff[4] & 0x3f);
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/* If in 12 hour mode need to look at the AM/PM flag */
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if (buff[4] & 0x80)
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rtc->rtc_hour += (buff[4] & 0x40) ? 12 : 0;
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rtc->rtc_day = hexdectodec(buff[5] & 0x3f);
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rtc->rtc_mon = hexdectodec(buff[6] & 0x1f);
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byte = cmos_read(RTC_ADDR_YEAR);
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if (byte == -1)
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return(0);
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rtc->rtc_year = byte;
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byte = cmos_read(RTC_ADDR_CENT);
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if (byte == -1)
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return(0);
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rtc->rtc_cen = byte;
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return(1);
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}
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/* device and attach structures */
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struct cfattach rtc_ca = {
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sizeof(struct rtc_softc), rtcmatch, rtcattach
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};
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extern struct cfdriver rtc_cd;
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/*
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* rtcmatch()
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*
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* Validate the IIC address to make sure its an RTC we understand
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*/
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int
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rtcmatch(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct iicbus_attach_args *ib = aux;
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if ((ib->ib_addr & IIC_PCF8583_MASK) == IIC_PCF8583_ADDR)
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return(1);
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return(0);
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}
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/*
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* rtcattach()
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*
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* Attach the rtc device
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*/
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void
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rtcattach(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct rtc_softc *sc = (struct rtc_softc *)self;
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struct iicbus_attach_args *ib = aux;
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u_char buff[1];
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struct todclock_attach_args ta;
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sc->sc_flags |= RTC_BROKEN;
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if ((ib->ib_addr & IIC_PCF8583_MASK) == IIC_PCF8583_ADDR) {
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printf(": PCF8583");
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/* Read RTC register 0 and report info found */
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buff[0] = 0;
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if (iic_control(RTC_Write, buff, 1))
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return;
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if (iic_control(RTC_Read, buff, 1))
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return;
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printf(" clock base ");
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switch (buff[0] & 0x30) {
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case 0x00:
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printf("32.768KHz");
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break;
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case 0x10:
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printf("50Hz");
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break;
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case 0x20:
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printf("event");
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break;
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case 0x30:
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printf("test mode");
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break;
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}
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if (buff[0] & 0x80)
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printf(" stopped");
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if (buff[0] & 0x04)
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printf(" alarm enabled");
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sc->sc_flags &= ~RTC_BROKEN;
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}
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printf("\n");
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ta.ta_name = "todclock";
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ta.ta_rtc_arg = NULL;
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ta.ta_rtc_write = rtc_write;
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ta.ta_rtc_read = rtc_read;
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ta.ta_flags = 0;
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config_found(self, &ta, NULL);
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}
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int
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rtcopen(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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struct rtc_softc *sc;
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int unit = minor(dev);
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if (unit >= rtc_cd.cd_ndevs)
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return(ENXIO);
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sc = rtc_cd.cd_devs[unit];
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if (!sc) return(ENXIO);
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if (sc->sc_flags & RTC_BROKEN) return(ENXIO);
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if (sc->sc_flags & RTC_OPEN) return(EBUSY);
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sc->sc_flags |= RTC_OPEN;
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return(0);
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}
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int
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rtcclose(dev, flag, mode, p)
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dev_t dev;
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int flag;
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int mode;
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struct proc *p;
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{
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int unit = minor(dev);
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struct rtc_softc *sc = rtc_cd.cd_devs[unit];
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sc->sc_flags &= ~RTC_OPEN;
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return(0);
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}
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int
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rtcread(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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rtc_t rtc;
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int s;
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char buffer[32];
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int length;
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s = splclock();
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if (rtc_read(NULL, &rtc) == 0) {
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(void)splx(s);
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return(ENXIO);
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}
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(void)splx(s);
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sprintf(buffer, "%02d:%02d:%02d.%02d%02d %02d/%02d/%02d%02d\n",
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rtc.rtc_hour, rtc.rtc_min, rtc.rtc_sec, rtc.rtc_centi,
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rtc.rtc_micro, rtc.rtc_day, rtc.rtc_mon, rtc.rtc_cen,
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rtc.rtc_year);
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if (uio->uio_offset > strlen(buffer))
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return 0;
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length = strlen(buffer) - uio->uio_offset;
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if (length > uio->uio_resid)
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length = uio->uio_resid;
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return(uiomove((caddr_t)buffer, length, uio));
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}
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static int
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twodigits(buffer, pos)
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char *buffer;
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int pos;
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{
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int result = 0;
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if (buffer[pos] >= '0' && buffer[pos] <= '9')
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result = (buffer[pos] - '0') * 10;
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if (buffer[pos+1] >= '0' && buffer[pos+1] <= '9')
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result += (buffer[pos+1] - '0');
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return(result);
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}
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int
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rtcwrite(dev, uio, flag)
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dev_t dev;
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struct uio *uio;
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int flag;
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{
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rtc_t rtc;
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int s;
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char buffer[25];
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int length;
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int error;
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/*
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* We require atomic updates!
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*/
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length = uio->uio_resid;
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if (uio->uio_offset || (length != sizeof(buffer)
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&& length != sizeof(buffer - 1)))
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return(EINVAL);
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if ((error = uiomove((caddr_t)buffer, sizeof(buffer), uio)))
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return(error);
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if (length == sizeof(buffer) && buffer[sizeof(buffer) - 1] != '\n')
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return(EINVAL);
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printf("rtcwrite: %s\n", buffer);
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rtc.rtc_micro = 0;
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rtc.rtc_centi = twodigits(buffer, 9);
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rtc.rtc_sec = twodigits(buffer, 6);
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rtc.rtc_min = twodigits(buffer, 3);
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rtc.rtc_hour = twodigits(buffer, 0);
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rtc.rtc_day = twodigits(buffer, 14);
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rtc.rtc_mon = twodigits(buffer, 17);
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rtc.rtc_year = twodigits(buffer, 22);
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rtc.rtc_cen = twodigits(buffer, 20);
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s = splclock();
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rtc_write(NULL, &rtc);
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(void)splx(s);
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return(0);
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}
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int
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rtcioctl(dev, cmd, data, flag, p)
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dev_t dev;
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int cmd;
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caddr_t data;
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int flag;
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struct proc *p;
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{
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/* struct rtc_softc *sc = rtc_cd.cd_devs[minor(dev)];*/
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/* switch (cmd) {
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case RTCIOC_READ:
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return(0);
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}*/
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return(EINVAL);
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}
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/* End of rtc.c */
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