198 lines
4.6 KiB
C
198 lines
4.6 KiB
C
/* $NetBSD: pci_2100_a50.c,v 1.3 1995/11/23 02:37:49 cgd Exp $ */
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/*
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* Copyright (c) 1995 Carnegie-Mellon University.
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* All rights reserved.
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*
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* Author: Chris G. Demetriou
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*
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* Permission to use, copy, modify and distribute this software and
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* its documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON ALLOWS FREE USE OF THIS SOFTWARE IN ITS "AS IS"
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* CONDITION. CARNEGIE MELLON DISCLAIMS ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie the
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* rights to redistribute these changes.
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/time.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/device.h>
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#include <vm/vm.h>
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#include <dev/isa/isavar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <alpha/pci/apecsvar.h>
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#include <alpha/pci/pci_2100_a50.h>
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#include <alpha/pci/siovar.h>
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#include "sio.h"
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void *dec_2100_a50_pci_map_int __P((void *, pci_conftag_t,
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pci_intr_pin_t, pci_intr_line_t, pci_intrlevel_t,
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int (*func)(void *), void *));
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void dec_2100_a50_pci_unmap_int __P((void *, void *));
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__const struct pci_intr_fns dec_2100_a50_pci_intr_fns = {
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dec_2100_a50_pci_map_int,
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dec_2100_a50_pci_unmap_int,
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};
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void *
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dec_2100_a50_pci_map_int(acv, tag, pin, line, level, func, arg)
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void *acv;
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pci_conftag_t tag;
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pci_intr_pin_t pin;
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pci_intr_line_t line;
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pci_intrlevel_t level;
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int (*func) __P((void *));
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void *arg;
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{
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struct apecs_config *acp = acv;
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int bus, device, pirq;
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pci_confreg_t irreg, pirqreg;
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u_int8_t pirqline;
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if (pin == 0) {
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/* No IRQ used. */
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return 0;
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}
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if (pin > 4) {
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printf("pci_map_int: bad interrupt pin %d\n", pin);
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return NULL;
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}
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device = PCI_TAG_DEVICE(tag);
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switch (device) {
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case 6: /* NCR SCSI */
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pirq = 3;
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break;
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case 11: /* slot 1 */
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switch (pin) {
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case PCI_INTERRUPT_PIN_A:
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case PCI_INTERRUPT_PIN_D:
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pirq = 0;
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break;
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case PCI_INTERRUPT_PIN_B:
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pirq = 2;
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break;
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case PCI_INTERRUPT_PIN_C:
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pirq = 1;
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break;
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};
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break;
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case 12: /* slot 2 */
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switch (pin) {
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case PCI_INTERRUPT_PIN_A:
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case PCI_INTERRUPT_PIN_D:
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pirq = 1;
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break;
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case PCI_INTERRUPT_PIN_B:
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pirq = 0;
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break;
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case PCI_INTERRUPT_PIN_C:
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pirq = 2;
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break;
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};
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break;
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case 13: /* slot 3 */
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switch (pin) {
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case PCI_INTERRUPT_PIN_A:
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case PCI_INTERRUPT_PIN_D:
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pirq = 2;
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break;
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case PCI_INTERRUPT_PIN_B:
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pirq = 1;
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break;
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case PCI_INTERRUPT_PIN_C:
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pirq = 0;
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break;
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};
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break;
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}
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pirqreg = PCI_CONF_READ(acp->ac_conffns, acp->ac_confarg,
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PCI_MAKE_TAG(0, 7, 0), 0x60); /* XXX */
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#if 0
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printf("pci_2100_a50_map_int: device %d pin %c: pirq %d, reg = %x\n",
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device, '@' + pin, pirq, pirqreg);
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#endif
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pirqline = (pirqreg >> (pirq * 8)) & 0xff;
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if ((pirqline & 0x80) != 0)
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return 0; /* not routed? */
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pirqline &= 0xf;
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#if 0
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printf("pci_2100_a50_map_int: device %d pin %c: mapped to line %d\n",
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device, '@' + pin, pirqline);
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#endif
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#if NSIO
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return ISA_INTR_ESTABLISH(&sio_isa_intr_fns, NULL, /* XXX */
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pirqline, ISA_IST_LEVEL, pci_intrlevel_to_isa(level),
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func, arg);
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#else
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panic("dec_2100_a50_pci_map_int: no sio!");
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#endif
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}
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void
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dec_2100_a50_pci_unmap_int(pifa, cookie)
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void *pifa;
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void *cookie;
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{
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panic("dec_2100_a50_pci_unmap_int not implemented"); /* XXX */
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}
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void
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pci_2100_a50_pickintr(pcf, pcfa, ppf, ppfa, pifp, pifap)
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__const struct pci_conf_fns *pcf;
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__const struct pci_pio_fns *ppf;
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void *pcfa, *ppfa;
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__const struct pci_intr_fns **pifp;
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void **pifap;
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{
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pci_confreg_t sioclass;
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int sioII;
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/* XXX MAGIC NUMBER */
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sioclass = PCI_CONF_READ(pcf, pcfa, PCI_MAKE_TAG(0, 7, 0),
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PCI_CLASS_REG);
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sioII = (sioclass & 0xff) >= 3;
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if (!sioII)
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printf("WARNING: SIO NOT SIO II... NO BETS...\n");
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*pifp = &dec_2100_a50_pci_intr_fns;
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*pifap = pcfa; /* XXX assumes apecs_config ptr */
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#if NSIO
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sio_intr_setup(ppf, ppfa);
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set_iointr(&sio_iointr);
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#else
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panic("pci_2100_a50_pickintr: no I/O interrupt handler (no sio)");
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#endif
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}
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