168 lines
7.0 KiB
C
168 lines
7.0 KiB
C
/* $NetBSD: atavar.h,v 1.14 1999/10/20 15:22:25 enami Exp $ */
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/*
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* Copyright (c) 1998 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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/* Hight-level functions and structures used by both ATA and ATAPI devices */
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/* Datas common to drives and controller drivers */
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struct ata_drive_datas {
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u_int8_t drive; /* drive number */
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int8_t ata_vers; /* ATA version supported */
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u_int16_t drive_flags; /* bitmask for drives present/absent and cap */
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#define DRIVE_ATA 0x0001
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#define DRIVE_ATAPI 0x0002
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#define DRIVE_OLD 0x0004
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#define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD)
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#define DRIVE_CAP32 0x0008
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#define DRIVE_DMA 0x0010
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#define DRIVE_UDMA 0x0020
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#define DRIVE_MODE 0x0040 /* the drive reported its mode */
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#define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */
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#define DRIVE_DMAERR 0x0100 /* Udma transfer had crc error, don't try DMA */
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/*
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* Current setting of drive's PIO, DMA and UDMA modes.
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* Is initialised by the disks drivers at attach time, and may be
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* changed later by the controller's code if needed
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*/
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u_int8_t PIO_mode; /* Current setting of drive's PIO mode */
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u_int8_t DMA_mode; /* Current setting of drive's DMA mode */
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u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */
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/* Supported modes for this drive */
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u_int8_t PIO_cap; /* supported drive's PIO mode */
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u_int8_t DMA_cap; /* supported drive's DMA mode */
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u_int8_t UDMA_cap; /* supported drive's UDMA mode */
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/*
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* Drive state. This is drive-type (ATA or ATAPI) dependant
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* This is reset to 0 after a channel reset.
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*/
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u_int8_t state;
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/* Number of DMA errors. Reset to 0 after every successful transfers. */
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u_int8_t n_dmaerrs;
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/* downgrade mode after this many successive errors */
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#define NERRS_MAX 2
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struct device *drv_softc; /* ATA drives softc, if any */
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void* chnl_softc; /* channel softc */
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};
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/* ATA/ATAPI common attachement datas */
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struct ata_atapi_attach {
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u_int8_t aa_type; /* Type of device */
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#define T_ATA 0
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#define T_ATAPI 1
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u_int8_t aa_channel; /* controller's channel */
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u_int8_t aa_openings; /* Number of simultaneous commands possible */
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struct ata_drive_datas *aa_drv_data;
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void *aa_bus_private; /* infos specifics to this bus */
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};
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/* User config flags that force (or disable) the use of a mode */
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#define ATA_CONFIG_PIO_MODES 0x0007
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#define ATA_CONFIG_PIO_SET 0x0008
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#define ATA_CONFIG_PIO_OFF 0
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#define ATA_CONFIG_DMA_MODES 0x0070
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#define ATA_CONFIG_DMA_SET 0x0080
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#define ATA_CONFIG_DMA_DISABLE 0x0070
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#define ATA_CONFIG_DMA_OFF 4
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#define ATA_CONFIG_UDMA_MODES 0x0700
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#define ATA_CONFIG_UDMA_SET 0x0800
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#define ATA_CONFIG_UDMA_DISABLE 0x0700
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#define ATA_CONFIG_UDMA_OFF 8
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/*
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* ATA/ATAPI commands description
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*
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* This structure defines the interface between the ATA/ATAPI device driver
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* and the controller for short commands. It contains the command's parameter,
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* the len of data's to read/write (if any), and a function to call upon
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* completion.
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* If no sleep is allowed, the driver can poll for command completion.
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* Once the command completed, if the error registed is valid, the flag
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* AT_ERROR is set and the error register value is copied to r_error .
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* A separate interface is needed for read/write or ATAPI packet commands
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* (which need multiple interrupts per commands).
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*/
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struct wdc_command {
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u_int8_t r_command; /* Parameters to upload to registers */
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u_int8_t r_head;
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u_int16_t r_cyl;
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u_int8_t r_sector;
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u_int8_t r_count;
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u_int8_t r_precomp;
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u_int8_t r_st_bmask; /* status register mask to wait for before command */
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u_int8_t r_st_pmask; /* status register mask to wait for after command */
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u_int8_t r_error; /* error register after command done */
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volatile u_int16_t flags;
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#define AT_READ 0x0001 /* There is data to read */
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#define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */
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#define AT_WAIT 0x0008 /* wait in controller code for command completion */
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#define AT_POLL 0x0010 /* poll for command completion (no interrupts) */
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#define AT_DONE 0x0020 /* command is done */
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#define AT_ERROR 0x0040 /* command is done with error */
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#define AT_TIMEOU 0x0080 /* command timed out */
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#define AT_DF 0x0100 /* Drive fault */
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#define AT_READREG 0x0200 /* Read registers on completion */
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int timeout; /* timeout (in ms) */
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void *data; /* Data buffer address */
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int bcount; /* number of bytes to transfer */
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void (*callback) __P((void*)); /* command to call once command completed */
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void *callback_arg; /* argument passed to *callback() */
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};
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int wdc_exec_command __P((struct ata_drive_datas *, struct wdc_command*));
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#define WDC_COMPLETE 0x01
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#define WDC_QUEUED 0x02
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#define WDC_TRY_AGAIN 0x03
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void wdc_probe_caps __P((struct ata_drive_datas*));
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int wdc_downgrade_mode __P((struct ata_drive_datas*));
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void wdc_reset_channel __P((struct ata_drive_datas *));
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int wdc_ata_addref __P((struct ata_drive_datas *));
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void wdc_ata_delref __P((struct ata_drive_datas *));
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void wdc_ata_kill_pending __P((struct ata_drive_datas *));
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struct ataparams;
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int ata_get_params __P((struct ata_drive_datas*, u_int8_t,
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struct ataparams *));
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int ata_set_mode __P((struct ata_drive_datas*, u_int8_t, u_int8_t));
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/* return code for these cmds */
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#define CMD_OK 0
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#define CMD_ERR 1
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#define CMD_AGAIN 2
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void ata_perror __P((struct ata_drive_datas *, int, char *));
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