448 lines
13 KiB
C
448 lines
13 KiB
C
/* $NetBSD: hypervisor_machdep.c,v 1.13 2009/10/23 02:32:34 snj Exp $ */
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/*
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*
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* Copyright (c) 2004 Christian Limpach.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/******************************************************************************
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* hypervisor.c
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*
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* Communication to/from hypervisor.
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*
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* Copyright (c) 2002-2004, K A Fraser
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: hypervisor_machdep.c,v 1.13 2009/10/23 02:32:34 snj Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kmem.h>
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#include <uvm/uvm_extern.h>
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#include <machine/vmparam.h>
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#include <machine/pmap.h>
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#include <xen/xen.h>
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#include <xen/hypervisor.h>
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#include <xen/evtchn.h>
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#include <xen/xenpmap.h>
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#include "opt_xen.h"
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/*
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* arch-dependent p2m frame lists list (L3 and L2)
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* used by Xen for save/restore mappings
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*/
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static unsigned long * l3_p2m_page;
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static unsigned long * l2_p2m_page;
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static int l2_p2m_page_size; /* size of L2 page, in pages */
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static void build_p2m_frame_list_list(void);
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static void update_p2m_frame_list_list(void);
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// #define PORT_DEBUG 4
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// #define EARLY_DEBUG_EVENT
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int stipending(void);
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int
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stipending(void)
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{
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unsigned long l1;
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unsigned long l2;
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unsigned int l1i, l2i, port;
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volatile shared_info_t *s = HYPERVISOR_shared_info;
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struct cpu_info *ci;
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volatile struct vcpu_info *vci;
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int ret;
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ret = 0;
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ci = curcpu();
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vci = ci->ci_vcpu;
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#if 0
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if (HYPERVISOR_shared_info->events)
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printf("stipending events %08lx mask %08lx ilevel %d\n",
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HYPERVISOR_shared_info->events,
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HYPERVISOR_shared_info->events_mask, ci->ci_ilevel);
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#endif
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#ifdef EARLY_DEBUG_EVENT
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if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) {
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xen_debug_handler(NULL);
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xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port);
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}
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#endif
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/*
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* we're only called after STIC, so we know that we'll have to
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* STI at the end
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*/
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while (vci->evtchn_upcall_pending) {
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cli();
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vci->evtchn_upcall_pending = 0;
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/* NB. No need for a barrier here -- XCHG is a barrier
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* on x86. */
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l1 = xen_atomic_xchg(&vci->evtchn_pending_sel, 0);
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while ((l1i = xen_ffs(l1)) != 0) {
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l1i--;
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l1 &= ~(1UL << l1i);
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l2 = s->evtchn_pending[l1i] & ~s->evtchn_mask[l1i];
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/*
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* mask and clear event. More efficient than calling
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* hypervisor_mask/clear_event for each event.
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*/
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xen_atomic_setbits_l(&s->evtchn_mask[l1i], l2);
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xen_atomic_clearbits_l(&s->evtchn_pending[l1i], l2);
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while ((l2i = xen_ffs(l2)) != 0) {
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l2i--;
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l2 &= ~(1UL << l2i);
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port = (l1i << LONG_SHIFT) + l2i;
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if (evtsource[port]) {
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hypervisor_set_ipending(
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evtsource[port]->ev_imask,
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l1i, l2i);
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evtsource[port]->ev_evcnt.ev_count++;
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if (ret == 0 && ci->ci_ilevel <
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evtsource[port]->ev_maxlevel)
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ret = 1;
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}
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#ifdef DOM0OPS
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else {
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/* set pending event */
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xenevt_setipending(l1i, l2i);
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}
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#endif
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}
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}
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sti();
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}
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#if 0
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if (ci->ci_ipending & 0x1)
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printf("stipending events %08lx mask %08lx ilevel %d ipending %08x\n",
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HYPERVISOR_shared_info->events,
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HYPERVISOR_shared_info->events_mask, ci->ci_ilevel,
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ci->ci_ipending);
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#endif
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return (ret);
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}
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void
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do_hypervisor_callback(struct intrframe *regs)
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{
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unsigned long l1;
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unsigned long l2;
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unsigned int l1i, l2i, port;
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volatile shared_info_t *s = HYPERVISOR_shared_info;
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struct cpu_info *ci;
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volatile struct vcpu_info *vci;
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int level;
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ci = curcpu();
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vci = ci->ci_vcpu;
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level = ci->ci_ilevel;
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// DDD printf("do_hypervisor_callback\n");
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#ifdef EARLY_DEBUG_EVENT
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if (xen_atomic_test_bit(&s->evtchn_pending[0], debug_port)) {
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xen_debug_handler(NULL);
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xen_atomic_clear_bit(&s->evtchn_pending[0], debug_port);
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}
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#endif
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while (vci->evtchn_upcall_pending) {
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vci->evtchn_upcall_pending = 0;
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/* NB. No need for a barrier here -- XCHG is a barrier
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* on x86. */
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l1 = xen_atomic_xchg(&vci->evtchn_pending_sel, 0);
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while ((l1i = xen_ffs(l1)) != 0) {
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l1i--;
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l1 &= ~(1UL << l1i);
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l2 = s->evtchn_pending[l1i] & ~s->evtchn_mask[l1i];
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/*
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* mask and clear the pending events.
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* Doing it here for all event that will be processed
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* avoids a race with stipending (which can be called
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* though evtchn_do_event->splx) that could cause an
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* event to be both processed and marked pending.
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*/
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xen_atomic_setbits_l(&s->evtchn_mask[l1i], l2);
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xen_atomic_clearbits_l(&s->evtchn_pending[l1i], l2);
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while ((l2i = xen_ffs(l2)) != 0) {
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l2i--;
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l2 &= ~(1UL << l2i);
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port = (l1i << LONG_SHIFT) + l2i;
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#ifdef PORT_DEBUG
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if (port == PORT_DEBUG)
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printf("do_hypervisor_callback event %d\n", port);
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#endif
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if (evtsource[port])
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call_evtchn_do_event(port, regs);
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#ifdef DOM0OPS
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else {
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if (ci->ci_ilevel < IPL_HIGH) {
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/* fast path */
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int oipl = ci->ci_ilevel;
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ci->ci_ilevel = IPL_HIGH;
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call_xenevt_event(port);
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ci->ci_ilevel = oipl;
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} else {
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/* set pending event */
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xenevt_setipending(l1i, l2i);
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}
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}
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#endif
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}
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}
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}
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#ifdef DIAGNOSTIC
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if (level != ci->ci_ilevel)
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printf("hypervisor done %08x level %d/%d ipending %08x\n",
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(uint)vci->evtchn_pending_sel,
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level, ci->ci_ilevel, ci->ci_ipending);
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#endif
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}
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void
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hypervisor_unmask_event(unsigned int ev)
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{
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volatile shared_info_t *s = HYPERVISOR_shared_info;
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volatile struct vcpu_info *vci = curcpu()->ci_vcpu;
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#ifdef PORT_DEBUG
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if (ev == PORT_DEBUG)
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printf("hypervisor_unmask_event %d\n", ev);
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#endif
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xen_atomic_clear_bit(&s->evtchn_mask[0], ev);
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/*
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* The following is basically the equivalent of
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* 'hw_resend_irq'. Just like a real IO-APIC we 'lose the
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* interrupt edge' if the channel is masked.
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*/
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if (xen_atomic_test_bit(&s->evtchn_pending[0], ev) &&
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!xen_atomic_test_and_set_bit(&vci->evtchn_pending_sel, ev>>LONG_SHIFT)) {
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xen_atomic_set_bit(&vci->evtchn_upcall_pending, 0);
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if (!vci->evtchn_upcall_mask)
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hypervisor_force_callback();
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}
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}
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void
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hypervisor_mask_event(unsigned int ev)
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{
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volatile shared_info_t *s = HYPERVISOR_shared_info;
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#ifdef PORT_DEBUG
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if (ev == PORT_DEBUG)
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printf("hypervisor_mask_event %d\n", ev);
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#endif
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xen_atomic_set_bit(&s->evtchn_mask[0], ev);
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}
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void
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hypervisor_clear_event(unsigned int ev)
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{
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volatile shared_info_t *s = HYPERVISOR_shared_info;
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#ifdef PORT_DEBUG
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if (ev == PORT_DEBUG)
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printf("hypervisor_clear_event %d\n", ev);
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#endif
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xen_atomic_clear_bit(&s->evtchn_pending[0], ev);
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}
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void
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hypervisor_enable_ipl(unsigned int ipl)
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{
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u_long l1, l2;
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int l1i, l2i;
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struct cpu_info *ci = curcpu();
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/*
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* enable all events for ipl. As we only set an event in ipl_evt_mask
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* for its lowest IPL, and pending IPLs are processed high to low,
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* we know that all callback for this event have been processed.
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*/
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l1 = ci->ci_isources[ipl]->ipl_evt_mask1;
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ci->ci_isources[ipl]->ipl_evt_mask1 = 0;
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while ((l1i = xen_ffs(l1)) != 0) {
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l1i--;
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l1 &= ~(1UL << l1i);
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l2 = ci->ci_isources[ipl]->ipl_evt_mask2[l1i];
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ci->ci_isources[ipl]->ipl_evt_mask2[l1i] = 0;
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while ((l2i = xen_ffs(l2)) != 0) {
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int evtch;
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l2i--;
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l2 &= ~(1UL << l2i);
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evtch = (l1i << LONG_SHIFT) + l2i;
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hypervisor_enable_event(evtch);
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}
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}
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}
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void
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hypervisor_set_ipending(uint32_t iplmask, int l1, int l2)
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{
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int ipl;
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struct cpu_info *ci = curcpu();
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/* set pending bit for the appropriate IPLs */
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ci->ci_ipending |= iplmask;
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/*
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* And set event pending bit for the lowest IPL. As IPL are handled
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* from high to low, this ensure that all callbacks will have been
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* called when we ack the event
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*/
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ipl = ffs(iplmask);
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KASSERT(ipl > 0);
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ipl--;
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ci->ci_isources[ipl]->ipl_evt_mask1 |= 1UL << l1;
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ci->ci_isources[ipl]->ipl_evt_mask2[l1] |= 1UL << l2;
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}
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void
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hypervisor_machdep_attach(void)
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{
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/* dom0 does not require the arch-dependent P2M translation table */
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if ( !xendomain_is_dom0() ) {
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build_p2m_frame_list_list();
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}
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}
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/*
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* Generate the p2m_frame_list_list table,
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* needed for guest save/restore
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*/
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static void
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build_p2m_frame_list_list(void)
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{
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int fpp; /* number of page (frame) pointer per page */
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unsigned long max_pfn;
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/*
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* The p2m list is composed of three levels of indirection,
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* each layer containing MFNs pointing to lower level pages
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* The indirection is used to convert a given PFN to its MFN
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* Each N level page can point to @fpp (N-1) level pages
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* For example, for x86 32bit, we have:
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* - PAGE_SIZE: 4096 bytes
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* - fpp: 1024 (one L3 page can address 1024 L2 pages)
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* A L1 page contains the list of MFN we are looking for
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*/
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max_pfn = xen_start_info.nr_pages;
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fpp = PAGE_SIZE / sizeof(paddr_t);
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/* we only need one L3 page */
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l3_p2m_page = kmem_alloc(PAGE_SIZE, KM_NOSLEEP);
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if (l3_p2m_page == NULL)
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panic("could not allocate memory for l3_p2m_page");
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/*
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* Determine how many L2 pages we need for the mapping
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* Each L2 can map a total of @fpp L1 pages
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*/
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l2_p2m_page_size = howmany(max_pfn, fpp);
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l2_p2m_page = kmem_alloc(l2_p2m_page_size * PAGE_SIZE, KM_NOSLEEP);
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if (l2_p2m_page == NULL)
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panic("could not allocate memory for l2_p2m_page");
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/* We now have L3 and L2 pages ready, update L1 mapping */
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update_p2m_frame_list_list();
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}
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/*
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* Update the L1 p2m_frame_list_list mapping (during guest boot or resume)
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*/
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static void
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update_p2m_frame_list_list(void)
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{
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int i;
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int fpp; /* number of page (frame) pointer per page */
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unsigned long max_pfn;
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max_pfn = xen_start_info.nr_pages;
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fpp = PAGE_SIZE / sizeof(paddr_t);
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for (i = 0; i < l2_p2m_page_size; i++) {
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/*
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* Each time we start a new L2 page,
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* store its MFN in the L3 page
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*/
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if ((i % fpp) == 0) {
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l3_p2m_page[i/fpp] = vtomfn(
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(vaddr_t)&l2_p2m_page[i]);
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}
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/*
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* we use a shortcut
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* since @xpmap_phys_to_machine_mapping array
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* already contains PFN to MFN mapping, we just
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* set the l2_p2m_page MFN pointer to the MFN of the
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* according frame of @xpmap_phys_to_machine_mapping
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*/
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l2_p2m_page[i] = vtomfn((vaddr_t)
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&xpmap_phys_to_machine_mapping[i*fpp]);
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}
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HYPERVISOR_shared_info->arch.pfn_to_mfn_frame_list_list =
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vtomfn((vaddr_t)l3_p2m_page);
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HYPERVISOR_shared_info->arch.max_pfn = max_pfn;
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}
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