630 lines
14 KiB
C
630 lines
14 KiB
C
/* $NetBSD: vr.c,v 1.42 2003/07/15 02:29:34 lukem Exp $ */
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/*-
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* Copyright (c) 1999-2002
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* Shin Takemura and PocketBSD Project. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the PocketBSD project
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* and its contributors.
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* 4. Neither the name of the project nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: vr.c,v 1.42 2003/07/15 02:29:34 lukem Exp $");
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#include "opt_vr41xx.h"
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#include "opt_tx39xx.h"
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#include "opt_kgdb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/reboot.h>
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#include <uvm/uvm_extern.h>
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#include <machine/sysconf.h>
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#include <machine/bootinfo.h>
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#include <machine/bus.h>
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#include <machine/bus_space_hpcmips.h>
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#include <machine/platid.h>
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#include <machine/platid_mask.h>
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#include <dev/hpc/hpckbdvar.h>
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#include <hpcmips/vr/vr.h>
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#include <hpcmips/vr/vr_asm.h>
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#include <hpcmips/vr/vrcpudef.h>
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#include <hpcmips/vr/vripreg.h>
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#include <hpcmips/vr/rtcreg.h>
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#include <mips/cache.h>
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#include "vrip_common.h"
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#if NVRIP_COMMON > 0
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#include <hpcmips/vr/vripvar.h>
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#endif
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#include "vrbcu.h"
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#if NVRBCU > 0
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#include <hpcmips/vr/bcuvar.h>
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#endif
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#include "vrdsu.h"
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#if NVRDSU > 0
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#include <hpcmips/vr/vrdsuvar.h>
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#endif
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#include "com.h"
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#include "com_vrip.h"
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#include "com_hpcio.h"
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#if NCOM > 0
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#include <sys/termios.h>
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#include <sys/ttydefaults.h>
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#include <dev/ic/comreg.h>
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#include <dev/ic/comvar.h>
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#if NCOM_VRIP > 0
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#include <hpcmips/vr/siureg.h>
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#include <hpcmips/vr/com_vripvar.h>
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#endif
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#if NCOM_HPCIO > 0
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#include <hpcmips/dev/com_hpciovar.h>
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#endif
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#ifndef CONSPEED
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#define CONSPEED TTYDEF_SPEED
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#endif
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#endif
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#include "hpcfb.h"
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#include "vrkiu.h"
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#if (NVRKIU > 0) || (NHPCFB > 0)
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#include <dev/wscons/wsdisplayvar.h>
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#include <dev/rasops/rasops.h>
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#endif
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#if NHPCFB > 0
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#include <dev/hpc/hpcfbvar.h>
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#endif
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#if NVRKIU > 0
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#include <arch/hpcmips/vr/vrkiureg.h>
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#include <arch/hpcmips/vr/vrkiuvar.h>
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#endif
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#ifdef DEBUG
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#define STATIC
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#else
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#define STATIC static
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#endif
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/*
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* This is a mask of bits to clear in the SR when we go to a
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* given interrupt priority level.
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*/
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const u_int32_t __ipl_sr_bits_vr[_IPL_N] = {
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0, /* IPL_NONE */
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MIPS_SOFT_INT_MASK_0, /* IPL_SOFT */
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MIPS_SOFT_INT_MASK_0, /* IPL_SOFTCLOCK */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1, /* IPL_SOFTNET */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1, /* IPL_SOFTSERIAL */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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MIPS_INT_MASK_0, /* IPL_BIO */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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MIPS_INT_MASK_0, /* IPL_NET */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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MIPS_INT_MASK_0, /* IPL_{TTY,SERIAL} */
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MIPS_SOFT_INT_MASK_0|
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MIPS_SOFT_INT_MASK_1|
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MIPS_INT_MASK_0|
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MIPS_INT_MASK_1, /* IPL_{CLOCK,HIGH} */
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};
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#if defined(VR41XX) && defined(TX39XX)
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#define VR_INTR vr_intr
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#else
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#define VR_INTR cpu_intr /* locore_mips3 directly call this */
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#endif
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void vr_init(void);
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void VR_INTR(u_int32_t, u_int32_t, u_int32_t, u_int32_t);
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extern void vr_idle(void);
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STATIC void vr_cons_init(void);
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STATIC void vr_fb_init(caddr_t *);
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STATIC void vr_mem_init(paddr_t);
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STATIC void vr_find_dram(paddr_t, paddr_t);
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STATIC void vr_reboot(int, char *);
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/*
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* CPU interrupt dispatch table (HwInt[0:3])
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*/
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STATIC int vr_null_handler(void *, u_int32_t, u_int32_t);
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STATIC int (*vr_intr_handler[4])(void *, u_int32_t, u_int32_t) =
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{
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vr_null_handler,
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vr_null_handler,
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vr_null_handler,
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vr_null_handler
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};
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STATIC void *vr_intr_arg[4];
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#if NCOM > 0
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/*
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* machine dependent serial console info
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*/
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static struct vr_com_platdep {
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platid_mask_t *platidmask;
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int (*attach)(bus_space_tag_t, int, int, int, tcflag_t, int);
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int addr;
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int freq;
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} platdep_com_table[] = {
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#if NCOM_HPCIO > 0
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{
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&platid_mask_MACH_NEC_MCR_SIGMARION2,
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com_hpcio_cndb_attach, /* attach proc */
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0x0b600000, /* base address */
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COM_FREQ, /* frequency */
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},
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#endif
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#if NCOM_VRIP > 0
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#ifdef VR4102
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{
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&platid_mask_CPU_MIPS_VR_4102,
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com_vrip_cndb_attach, /* attach proc */
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VR4102_SIU_ADDR, /* base address */
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VRCOM_FREQ, /* frequency */
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},
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#endif /* VR4102 */
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#ifdef VR4111
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{
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&platid_mask_CPU_MIPS_VR_4111,
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com_vrip_cndb_attach, /* attach proc */
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VR4102_SIU_ADDR, /* base address */
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VRCOM_FREQ, /* frequency */
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},
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#endif /* VR4111 */
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#ifdef VR4121
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{
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&platid_mask_CPU_MIPS_VR_4121,
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com_vrip_cndb_attach, /* attach proc */
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VR4102_SIU_ADDR, /* base address */
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VRCOM_FREQ, /* frequency */
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},
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#endif /* VR4121 */
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#ifdef VR4122
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{
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&platid_mask_CPU_MIPS_VR_4122,
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com_vrip_cndb_attach, /* attach proc */
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VR4122_SIU_ADDR, /* base address */
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VRCOM_FREQ, /* frequency */
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},
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#endif /* VR4122 */
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#ifdef VR4131
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{
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&platid_mask_CPU_MIPS_VR_4122,
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com_vrip_cndb_attach, /* attach proc */
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VR4122_SIU_ADDR, /* base address */
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VRCOM_FREQ, /* frequency */
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},
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#endif /* VR4131 */
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#ifdef SINGLE_VRIP_BASE
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{
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&platid_wild,
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com_vrip_cndb_attach, /* attach proc */
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VRIP_SIU_ADDR, /* base address */
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VRCOM_FREQ, /* frequency */
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},
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#endif /* SINGLE_VRIP_BASE */
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#else /* NCOM_VRIP > 0 */
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/* dummy */
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{
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&platid_wild,
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NULL, /* attach proc */
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0, /* base address */
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0, /* frequency */
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},
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#endif /* NCOM_VRIP > 0 */
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};
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#endif /* NCOM > 0 */
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#if NVRKIU > 0
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/*
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* machine dependent keyboard info
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*/
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static struct vr_kiu_platdep {
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platid_mask_t *platidmask;
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int addr;
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} platdep_kiu_table[] = {
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#ifdef VR4102
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{
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&platid_mask_CPU_MIPS_VR_4102,
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VR4102_KIU_ADDR, /* base address */
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},
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#endif /* VR4102 */
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#ifdef VR4111
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{
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&platid_mask_CPU_MIPS_VR_4111,
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VR4102_KIU_ADDR, /* base address */
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},
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#endif /* VR4111 */
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#ifdef VR4121
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{
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&platid_mask_CPU_MIPS_VR_4121,
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VR4102_KIU_ADDR, /* base address */
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},
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#endif /* VR4121 */
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{
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&platid_wild,
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#ifdef SINGLE_VRIP_BASE
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VRIP_KIU_ADDR, /* base address */
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#else
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VRIP_NO_ADDR, /* base address */
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#endif /* SINGLE_VRIP_BASE */
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},
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};
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#endif /* NVRKIU > 0 */
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void
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vr_init()
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{
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/*
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* Platform Specific Function Hooks
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*/
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platform.cpu_idle = vr_idle;
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platform.cpu_intr = VR_INTR;
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platform.cons_init = vr_cons_init;
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platform.fb_init = vr_fb_init;
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platform.mem_init = vr_mem_init;
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platform.reboot = vr_reboot;
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#if NVRBCU > 0
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sprintf(cpu_name, "NEC %s rev%d.%d %d.%03dMHz",
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vrbcu_vrip_getcpuname(),
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vrbcu_vrip_getcpumajor(),
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vrbcu_vrip_getcpuminor(),
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vrbcu_vrip_getcpuclock() / 1000000,
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(vrbcu_vrip_getcpuclock() % 1000000) / 1000);
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#else
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sprintf(cpu_name, "NEC VR41xx");
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#endif
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}
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void
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vr_mem_init(paddr_t kernend)
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{
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mem_clusters[0].start = 0;
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mem_clusters[0].size = kernend;
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mem_cluster_cnt = 1;
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vr_find_dram(kernend, 0x02000000);
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vr_find_dram(0x02000000, 0x04000000);
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vr_find_dram(0x04000000, 0x06000000);
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vr_find_dram(0x06000000, 0x08000000);
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}
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void
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vr_find_dram(paddr_t addr, paddr_t end)
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{
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int n;
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caddr_t page;
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#ifdef NARLY_MEMORY_PROBE
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int x, i;
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#endif
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#ifdef VR_FIND_DRAMLIM
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if (VR_FIND_DRAMLIM < end)
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end = VR_FIND_DRAMLIM;
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#endif /* VR_FIND_DRAMLIM */
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n = mem_cluster_cnt;
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for (; addr < end; addr += PAGE_SIZE) {
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page = (void *)MIPS_PHYS_TO_KSEG1(addr);
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if (badaddr(page, 4))
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goto bad;
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/* stop memory probing at first memory image */
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if (bcmp(page, (void *)MIPS_PHYS_TO_KSEG0(0), 128) == 0)
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return;
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*(volatile int *)(page+0) = 0xa5a5a5a5;
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*(volatile int *)(page+4) = 0x5a5a5a5a;
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wbflush();
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if (*(volatile int *)(page+0) != 0xa5a5a5a5)
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goto bad;
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*(volatile int *)(page+0) = 0x5a5a5a5a;
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*(volatile int *)(page+4) = 0xa5a5a5a5;
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wbflush();
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if (*(volatile int *)(page+0) != 0x5a5a5a5a)
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goto bad;
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#ifdef NARLY_MEMORY_PROBE
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x = random();
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for (i = 0; i < PAGE_SIZE; i += 4)
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*(volatile int *)(page+i) = (x ^ i);
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wbflush();
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for (i = 0; i < PAGE_SIZE; i += 4)
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if (*(volatile int *)(page+i) != (x ^ i))
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goto bad;
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x = random();
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for (i = 0; i < PAGE_SIZE; i += 4)
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*(volatile int *)(page+i) = (x ^ i);
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wbflush();
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for (i = 0; i < PAGE_SIZE; i += 4)
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if (*(volatile int *)(page+i) != (x ^ i))
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goto bad;
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#endif /* NARLY_MEMORY_PROBE */
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if (!mem_clusters[n].size)
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mem_clusters[n].start = addr;
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mem_clusters[n].size += PAGE_SIZE;
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continue;
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bad:
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if (mem_clusters[n].size)
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++n;
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continue;
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}
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if (mem_clusters[n].size)
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++n;
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mem_cluster_cnt = n;
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}
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void
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vr_fb_init(caddr_t *kernend)
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{
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/* Nothing to do */
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}
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void
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vr_cons_init()
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{
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#if NCOM > 0 || NHPCFB > 0 || NVRKIU > 0
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bus_space_tag_t iot = hpcmips_system_bus_space();
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#endif
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#if NCOM > 0
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static struct vr_com_platdep *com_info;
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#endif
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#if NVRKIU > 0
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static struct vr_kiu_platdep *kiu_info;
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#endif
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#if NCOM > 0
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com_info = platid_search(&platid, platdep_com_table,
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sizeof(platdep_com_table)/sizeof(*platdep_com_table),
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sizeof(*platdep_com_table));
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#ifdef KGDB
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if (com_info->attach != NULL) {
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/* if KGDB is defined, always use the serial port for KGDB */
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if ((*com_info->attach)(iot, com_info->addr, 9600,
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com_info->freq,
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(TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 1)) {
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printf("%s(%d): can't init kgdb's serial port",
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__FILE__, __LINE__);
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}
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#else /* KGDB */
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if (com_info->attach != NULL && (bootinfo->bi_cnuse&BI_CNUSE_SERIAL)) {
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/* Serial console */
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if ((*com_info->attach)(iot, com_info->addr, CONSPEED,
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com_info->freq,
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(TTYDEF_CFLAG & ~(CSIZE | PARENB)) | CS8, 0)) {
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printf("%s(%d): can't init serial console",
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__FILE__, __LINE__);
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} else {
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return;
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}
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}
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#endif /* KGDB */
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#endif /* NCOM > 0 */
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#if NHPCFB > 0
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if (hpcfb_cnattach(NULL)) {
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printf("%s(%d): can't init fb console", __FILE__, __LINE__);
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} else {
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goto find_keyboard;
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}
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find_keyboard:
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#endif /* NHPCFB > 0 */
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#if NVRKIU > 0
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kiu_info = platid_search(&platid, platdep_kiu_table,
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sizeof(platdep_kiu_table)/sizeof(*platdep_kiu_table),
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sizeof(*platdep_kiu_table));
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if (kiu_info->addr != VRIP_NO_ADDR) {
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if (vrkiu_cnattach(iot, kiu_info->addr)) {
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printf("%s(%d): can't init vrkiu as console",
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__FILE__, __LINE__);
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} else {
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return;
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}
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}
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#endif /* NVRKIU > 0 */
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}
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extern char vr_hibernate[];
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extern char evr_hibernate[];
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void
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vr_reboot(int howto, char *bootstr)
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{
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/*
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* power down
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*/
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if ((howto & RB_POWERDOWN) == RB_POWERDOWN) {
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printf("fake powerdown\n");
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/*
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* copy vr_hibernate() to top of physical memory.
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*/
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memcpy((void *)MIPS_KSEG0_START, vr_hibernate,
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evr_hibernate - (char *)vr_hibernate);
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/* sync I&D cache */
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mips_dcache_wbinv_all();
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mips_icache_sync_all();
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/*
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* call vr_hibernate() at MIPS_KSEG0_START.
|
|
*/
|
|
((void (*)(void *,int))MIPS_KSEG0_START)(
|
|
(void *)MIPS_KSEG0_START, ptoa(physmem));
|
|
/* not reach */
|
|
vr_reboot(howto&~RB_HALT, bootstr);
|
|
}
|
|
/*
|
|
* halt
|
|
*/
|
|
if (howto & RB_HALT) {
|
|
#if NVRIP_COMMON > 0
|
|
_spllower(~MIPS_INT_MASK_0);
|
|
vrip_intr_suspend();
|
|
#else
|
|
splhigh();
|
|
#endif
|
|
__asm(".set noreorder");
|
|
__asm(__CONCAT(".word ",___STRING(VR_OPCODE_SUSPEND)));
|
|
__asm("nop");
|
|
__asm("nop");
|
|
__asm("nop");
|
|
__asm("nop");
|
|
__asm("nop");
|
|
__asm(".set reorder");
|
|
#if NVRIP_COMMON > 0
|
|
vrip_intr_resume();
|
|
#endif
|
|
}
|
|
/*
|
|
* reset
|
|
*/
|
|
#if NVRDSU
|
|
vrdsu_reset();
|
|
#else
|
|
printf("%s(%d): There is no DSU.", __FILE__, __LINE__);
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Handle interrupts.
|
|
*/
|
|
void
|
|
VR_INTR(u_int32_t status, u_int32_t cause, u_int32_t pc, u_int32_t ipending)
|
|
{
|
|
uvmexp.intrs++;
|
|
|
|
if (ipending & MIPS_INT_MASK_5) {
|
|
/*
|
|
* spl* uses MIPS_INT_MASK not MIPS3_INT_MASK. it causes
|
|
* INT5 interrupt.
|
|
*/
|
|
mips3_cp0_compare_write(mips3_cp0_count_read());
|
|
}
|
|
|
|
/* for spllowersoftclock */
|
|
_splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
|
|
|
|
if (ipending & MIPS_INT_MASK_1) {
|
|
(*vr_intr_handler[1])(vr_intr_arg[1], pc, status);
|
|
|
|
cause &= ~MIPS_INT_MASK_1;
|
|
_splset(((status & ~cause) & MIPS_HARD_INT_MASK)
|
|
| MIPS_SR_INT_IE);
|
|
}
|
|
|
|
if (ipending & MIPS_INT_MASK_0) {
|
|
(*vr_intr_handler[0])(vr_intr_arg[0], pc, status);
|
|
|
|
cause &= ~MIPS_INT_MASK_0;
|
|
}
|
|
_splset(((status & ~cause) & MIPS_HARD_INT_MASK) | MIPS_SR_INT_IE);
|
|
|
|
softintr(ipending);
|
|
}
|
|
|
|
void *
|
|
vr_intr_establish(int line, int (*ih_fun)(void *, u_int32_t, u_int32_t),
|
|
void *ih_arg)
|
|
{
|
|
|
|
KDASSERT(vr_intr_handler[line] == vr_null_handler);
|
|
|
|
vr_intr_handler[line] = ih_fun;
|
|
vr_intr_arg[line] = ih_arg;
|
|
|
|
return ((void *)line);
|
|
}
|
|
|
|
void
|
|
vr_intr_disestablish(void *ih)
|
|
{
|
|
int line = (int)ih;
|
|
|
|
vr_intr_handler[line] = vr_null_handler;
|
|
vr_intr_arg[line] = NULL;
|
|
}
|
|
|
|
int
|
|
vr_null_handler(void *arg, u_int32_t pc, u_int32_t status)
|
|
{
|
|
|
|
printf("vr_null_handler\n");
|
|
|
|
return (0);
|
|
}
|
|
|
|
/*
|
|
int x4181 = VR4181;
|
|
int x4101 = VR4101;
|
|
int x4102 = VR4102;
|
|
int x4111 = VR4111;
|
|
int x4121 = VR4121;
|
|
int x4122 = VR4122;
|
|
int xo4181 = ONLY_VR4181;
|
|
int xo4101 = ONLY_VR4101;
|
|
int xo4102 = ONLY_VR4102;
|
|
int xo4111_4121 = ONLY_VR4111_4121;
|
|
int g4101=VRGROUP_4101;
|
|
int g4102=VRGROUP_4102;
|
|
int g4181=VRGROUP_4181;
|
|
int g4102_4121=VRGROUP_4102_4121;
|
|
int g4111_4121=VRGROUP_4111_4121;
|
|
int g4102_4122=VRGROUP_4102_4122;
|
|
int g4111_4122=VRGROUP_4111_4122;
|
|
int single_vrip_base=SINGLE_VRIP_BASE;
|
|
int vrip_base_addr=VRIP_BASE_ADDR;
|
|
*/
|