975ce0ba8d
Previously spi would configure the controller to use the lowest speed of all connected devices since the kernel started and to fail attempted mode changes. This is now improved to keep individual modes and speeds for each slave and to reconfigure the controller as necessary for each transfer. Added man page for spi(9).
149 lines
4.8 KiB
C
149 lines
4.8 KiB
C
/* $NetBSD: spivar.h,v 1.7 2019/02/23 10:43:25 mlelstv Exp $ */
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/*-
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* Copyright (c) 2006 Urbana-Champaign Independent Media Center.
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* Copyright (c) 2006 Garrett D'Amore.
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* All rights reserved.
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*
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* Portions of this code were written by Garrett D'Amore for the
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* Champaign-Urbana Community Wireless Network Project.
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*
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* Redistribution and use in source and binary forms, with or
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* without modification, are permitted provided that the following
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* conditions are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above
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* copyright notice, this list of conditions and the following
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* disclaimer in the documentation and/or other materials provided
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* with the distribution.
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* 3. All advertising materials mentioning features or use of this
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* software must display the following acknowledgements:
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* This product includes software developed by the Urbana-Champaign
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* Independent Media Center.
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* This product includes software developed by Garrett D'Amore.
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* 4. Urbana-Champaign Independent Media Center's name and Garrett
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* D'Amore's name may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER AND GARRETT D'AMORE ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
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* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE URBANA-CHAMPAIGN INDEPENDENT
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* MEDIA CENTER OR GARRETT D'AMORE BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
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* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER
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* CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
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* STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _DEV_SPI_SPIVAR_H_
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#define _DEV_SPI_SPIVAR_H_
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#include <sys/queue.h>
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/*
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* Serial Peripheral Interface bus. This is a 4-wire bus common for
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* connecting flash, clocks, sensors, and various other low-speed
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* peripherals.
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*/
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struct spi_handle;
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struct spi_transfer;
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/*
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* De facto standard latching modes.
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*/
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#define SPI_MODE_0 0 /* CPOL = 0, CPHA = 0 */
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#define SPI_MODE_1 1 /* CPOL = 0, CPHA = 1 */
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#define SPI_MODE_2 2 /* CPOL = 1, CPHA = 0 */
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#define SPI_MODE_3 3 /* CPOL = 1, CPHA = 1 */
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/* Philips' Microwire is just Mode 0 */
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#define SPI_MODE_MICROWIRE SPI_MODE_0
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struct spi_controller {
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void *sct_cookie; /* controller private data */
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int sct_nslaves;
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int (*sct_configure)(void *, int, int, int);
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int (*sct_transfer)(void *, struct spi_transfer *);
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};
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int spibus_print(void *, const char *);
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/* one per chip select */
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struct spibus_attach_args {
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struct spi_controller *sba_controller;
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};
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struct spi_attach_args {
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struct spi_handle *sa_handle;
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};
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/*
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* This is similar in some respects to struct buf, but we cannot use
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* that structure because it was not designed to support full-duplex
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* IO.
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*/
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struct spi_chunk {
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struct spi_chunk *chunk_next;
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int chunk_count;
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uint8_t *chunk_read;
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const uint8_t *chunk_write;
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/* for private use by framework and bus driver */
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uint8_t *chunk_rptr;
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const uint8_t *chunk_wptr;
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int chunk_rresid;
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int chunk_wresid;
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};
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struct spi_transfer {
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struct spi_chunk *st_chunks; /* chained bufs */
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SIMPLEQ_ENTRY(spi_transfer) st_chain; /* chain of submitted jobs */
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int st_flags;
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int st_errno;
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int st_slave;
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void *st_private;
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void (*st_done)(struct spi_transfer *);
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kmutex_t st_lock;
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kcondvar_t st_cv;
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void *st_busprivate;
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void *st_spiprivate;
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};
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/* declare a list of transfers */
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SIMPLEQ_HEAD(spi_transq, spi_transfer);
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#define spi_transq_init(q) \
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SIMPLEQ_INIT(q)
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#define spi_transq_enqueue(q, trans) \
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SIMPLEQ_INSERT_TAIL(q, trans, st_chain)
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#define spi_transq_dequeue(q) \
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SIMPLEQ_REMOVE_HEAD(q, st_chain)
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#define spi_transq_first(q) \
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SIMPLEQ_FIRST(q)
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#define SPI_F_DONE 0x0001
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#define SPI_F_ERROR 0x0002
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int spi_configure(struct spi_handle *, int mode, int speed);
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int spi_transfer(struct spi_handle *, struct spi_transfer *);
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void spi_transfer_init(struct spi_transfer *);
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void spi_chunk_init(struct spi_chunk *, int, const uint8_t *, uint8_t *);
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void spi_transfer_add(struct spi_transfer *, struct spi_chunk *);
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void spi_wait(struct spi_transfer *);
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void spi_done(struct spi_transfer *, int);
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/* convenience wrappers */
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int spi_send(struct spi_handle *, int, const uint8_t *);
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int spi_recv(struct spi_handle *, int, uint8_t *);
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int spi_send_recv(struct spi_handle *, int, const uint8_t *, int, uint8_t *);
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#endif /* _DEV_SPI_SPIVAR_H_ */
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