244 lines
8.5 KiB
C
244 lines
8.5 KiB
C
/* $NetBSD: viper.h,v 1.2 2003/11/23 17:09:29 chs Exp $ */
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/* $OpenBSD: viper.h,v 1.2 1999/06/29 20:56:10 mickey Exp $ */
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/*
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* Copyright 1996 1995 by Open Software Foundation, Inc.
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* All Rights Reserved
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*
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* Permission to use, copy, modify, and distribute this software and
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* its documentation for any purpose and without fee is hereby granted,
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* provided that the above copyright notice appears in all copies and
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* that both the copyright notice and this permission notice appear in
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* supporting documentation.
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*
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* OSF DISCLAIMS ALL WARRANTIES WITH REGARD TO THIS SOFTWARE
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* INCLUDING ALL IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS
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* FOR A PARTICULAR PURPOSE.
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*
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* IN NO EVENT SHALL OSF BE LIABLE FOR ANY SPECIAL, INDIRECT, OR
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* CONSEQUENTIAL DAMAGES OR ANY DAMAGES WHATSOEVER RESULTING FROM
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* LOSS OF USE, DATA OR PROFITS, WHETHER IN ACTION OF CONTRACT,
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* NEGLIGENCE, OR OTHER TORTIOUS ACTION, ARISING OUT OF OR IN CONNECTION
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* WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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/*
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* Copyright (c) 1991,1994 The University of Utah and
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* the Computer Systems Laboratory (CSL). All rights reserved.
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*
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* Permission to use, copy, modify and distribute this software is hereby
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* granted provided that (1) source code retains these copyright, permission,
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* and disclaimer notices, and (2) redistributions including binaries
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* reproduce the notices in supporting documentation, and (3) all advertising
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* materials mentioning features or use of this software display the following
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* acknowledgement: ``This product includes software developed by the
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* Computer Systems Laboratory at the University of Utah.''
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*
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* THE UNIVERSITY OF UTAH AND CSL ALLOW FREE USE OF THIS SOFTWARE IN ITS "AS
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* IS" CONDITION. THE UNIVERSITY OF UTAH AND CSL DISCLAIM ANY LIABILITY OF
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* ANY KIND FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* CSL requests users of this software to return to csl-dist@cs.utah.edu any
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* improvements that they make and grant CSL redistribution rights.
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*
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* Utah $Hdr: viper.h 1.8 94/12/14$
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*/
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#define VIPER_HPA 0xfffbf000
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/*
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* Viper control register.
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*
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* With respect to arbitration preference (*_prf), only one of these may be
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* set at any one time. "preference" means that a particular device will
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* be granted the bus on every other arbitration cycle; these bits default
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* to unset (0). Similarly, a device may be denied the bus (*_den); these
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* bits default to *set* (1).
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*
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* The macros V_CTRL_ANYPRF or V_CTRL_ANYDEN should be used to determine
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* if any preference or deny bits are set.
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*/
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#define VIPER_BITS "\020\001eisa_den\002eisa_prf\003core_den\004core_prf" \
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"\005sgc1_den\006sgc1_prf\007sgc0_den\010sgc0_prf" \
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"\012cpu_prf\021lpmc_en\022ipref_en"
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struct vi_ctrl { /* (WO) */
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u_int vsc_tout:13, /* VSC clocks to wait before buserr timeout */
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: 1,
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ipref_en: 1, /* enable instruction prefetching */
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lpmc_en : 1, /* enable Low Priority Machine Checks */
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: 6,
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cpu_prf : 1, /* CPU has arbitration preference */
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: 1,
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sgc0_prf: 1, /* SGC0 has arbitration preference */
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sgc0_den: 1, /* SGC0 denied bus grants */
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sgc1_prf: 1, /* SGC1 has arbitration preference */
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sgc1_den: 1, /* SGC1 denied bus grants */
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core_prf: 1, /* CORE bus has arbitration preference */
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core_den: 1, /* CORE denied bus grants */
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eisa_prf: 1, /* EISA bus has arbitration preference */
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eisa_den: 1; /* EISA denied bus grants */
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};
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#define VI_CTRL_ANYPRF 0x02AA
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#define VI_CTRL_ANYDEN 0x0055
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#define VI_CTRL PAGE0->pz_Pdep.pd_Viper.v_Ctrlcpy
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#define VI_STAT_BITS "\020\001grf_buserr\002cpu_buserr\003ven_tmo" \
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"\004ven_buserr\005toc\006hardecc\007softecc\010cmdrst"
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struct vi_stat { /* (RO) */
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u_int hw_rev :24, /* Viper hardware revision (24 bits!) */
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cmdreset: 1, /* set if last chip reset caused by CMD_RESET */
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softecc : 1, /* correctable memory error (lpmc_en set) */
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hardecc : 1, /* uncorrectable memory error (HPMC) */
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toc : 1, /* Transfer Of Control signaled */
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vn_ader : 1, /* Venom address error (lpmc_en set) */
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vn_vscto: 1, /* Venom VSC timeout (lpmc_en set) */
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cpu_ader: 1, /* CPU address error or timeout (HPMC) */
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grf_ader: 1; /* Graphics address error */
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};
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/*
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* Viper TRS. The structures have been defined above; the remaining
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* fields are described here.
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*
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* vi_intrwd (WO)
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* If a high to low transition of the interrupt line occurs,
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* Viper will send this to the CPU to be or'd into it's EIR.
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* In general, this is an ASP interrupt request.
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*
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* vi_mem_ctrl (WO)
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* Set various DRAM attributes (row, cols, refresh, etc).
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*
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* vi_mem_wrchk (WO), vi_mem_rdchk (RO)
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* read/write data to be for copyin/memtest.
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*
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* vi_mem_limit (WO)
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* Set an upper limit for non-IO memory accesses; this must
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* be less than the actual memory size, low 22 bits ignored.
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*
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* vi_merr_w0, vi_merr_w1, vi_merr_ckbyte, vi_merr_addr (RO)
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* If memory error detection enabled and soft/hard ECC error,
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* raw double word is stored here (w0: most significant word).
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* The raw checkbyte data is stored in "vi_merr_ckbyte".
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* The address of last logged error is in "vi_merr_addr".
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*
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*/
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struct vi_trs {
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u_int vi_control; /* PAGE0->pz_Pdep.pd_Viper.v_Ctrlcpy */
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struct vi_stat vi_status;
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u_int vi_intrwd;
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u_int vi_resv1[13];
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u_int vi_mem_ctrl;
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u_int vi_mem_wrchk;
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u_int vi_mem_limit;
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u_int vi_resv2[1];
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u_int vi_merr_w1;
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u_int vi_merr_w2;
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u_int vi_merr_ckbyte;
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u_int vi_mem_rdchk;
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u_int vi_merr_addr;
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u_int vi_resv3[135];
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};
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/*
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** Viper also creates HPA registers for the graphics accelerator (Venom).
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** Venom has two sets of resisters; the User HPA contains registers that
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** users are allowed to access, while the Supervisor HPA is only accessible
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** by code running at the most priviliged level. Both sets of registers
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** are defined below.
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*/
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#define VENOM_USER ((struct vn_user *)0xFFFBC000)
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#define VENOM_SUPR ((struct vn_supr *)0xFFFBD000)
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/*
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* Define bits in the Venom "User Control" register.
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*/
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struct vnu_ctl {
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u_int sdt_msk :16, /* screen door transparancy mask */
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: 6,
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d_z_intp: 1, /* disable Z Interpolation when set */
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d_c_intp: 1, /* disable Color Interpolation when set */
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d_ad_inc: 1, /* disable I/O Addr Incrementing when set */
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: 1,
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z_fast : 1, /* enable Fast Z Interpolation when set */
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c_pseudo: 1, /* enable Pseudo Color when set (disable RG) */
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z_prec24: 1, /* enable 24-bit Z integer precision (o/w 16) */
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cmp_intp: 3; /* enable cond: Z intp owrites old Z (<,>,=) */
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};
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/*
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* When vnu_ctl's "z_prec24" is set, 24-bit Z integer precision is enabled
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* (otherwise 16-bit integer precision is used). When enabled, the format
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* of various User Control registers is changed; `vnu_prec' (defined below)
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* should make this format more clear.
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*/
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union vnu_prec { /* 16 or 24 bit precision */
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struct {
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u_int zero1; /* must be zero */
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u_int intg :16, /* integer part (16 bits) */
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frac :12, /* fractional part (12 bits) */
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zero2 : 4; /* must be zero */
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} prec16;
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struct {
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u_int frac_lo : 4, /* fractional part (lower 4 bits) */
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zero1 :28; /* must be zero */
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u_int intg :24, /* integer part (24 bits) */
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frac_hi : 8; /* fractional part (upper 8 bits) */
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} prec24;
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};
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#define vnu_p16i prec16.intg
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#define vnu_p16f prec16.frac
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#define vnu_p24i prec24.intg
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#define vnu_p24f ((prec24.frac_hi << 4) | prec24.frac_lo)
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#define vnu_p24fh prec24.frac_hi
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#define vnu_p24fl prec24.frac_lo
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/*
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* Venom User HPA registers.
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*/
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struct vn_user {
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u_int vnu_resv1[32];
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struct vnu_ctl vnu_uctl; /* user control */
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u_int vnu_spancnt; /* span count (13 bits, signed) */
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u_int vnu_graddr; /* graphics address (24 bits: 6-29) */
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u_int vnu_resv2;
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union vnu_prec vnu_zslope; /* Z Slope */
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union vnu_prec vnu_z; /* Z */
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u_int vnu_resv3[8];
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u_int vnu_bslope; /* Blue Slope (12-19:int, 20-31:fra) */
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u_int vnu_bcolor; /* Blue Color (12-19:int, 20-31:fra) */
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u_int vnu_resv4[2];
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u_int vnu_rslope; /* Red Slope (12-19:int, 20-31:fra) */
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u_int vnu_rcolor; /* Red Color (12-19:int, 20-31:fra) */
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u_int vnu_resv5[2];
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u_int vnu_gslope; /* Green Slope (12-19:int, 20-31:fra) */
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u_int vnu_gcolor; /* Green Color (12-19:int, 20-31:fra) */
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};
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/*
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* Define bits in Venom "Supervisor Control" register.
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*/
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struct vns_ctl {
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u_int : 4,
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ioaddr : 2, /* graphics addr (bits 4 & 5 of `vnu_graddr') */
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d_venom : 1, /* disable Venom operation processing */
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:25;
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};
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/*
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* Venom Supervisor HPA registers.
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*/
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struct vn_supr {
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u_int vns_resv1[32];
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struct vns_ctl vns_sctl; /* supervisor control */
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u_int vns_zaddr; /* Z Buffer Address (RO) */
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};
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void viper_setintrwnd(uint32_t);
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void viper_eisa_en(void);
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