274 lines
7.1 KiB
C
274 lines
7.1 KiB
C
/* $NetBSD: gti2c.c,v 1.9 2007/12/16 14:21:43 he Exp $ */
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/*
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* Copyright (c) 2005 Brocade Communcations, inc.
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* All rights reserved.
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*
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* Written by Matt Thomas for Brocade Communcations, Inc.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of Brocade Communications, Inc. may not be used to endorse
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* or promote products derived from this software without specific prior
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* written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BROCADE COMMUNICATIONS, INC. ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL EITHER BROCADE COMMUNICATIONS, INC. BE
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* LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED
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* OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: gti2c.c,v 1.9 2007/12/16 14:21:43 he Exp $");
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#include <sys/param.h>
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#include <sys/device.h>
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#include <sys/conf.h>
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#include <sys/proc.h>
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#include <sys/mutex.h>
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#include <sys/intr.h>
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#include <sys/bus.h>
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#include <dev/marvell/gtintrreg.h>
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#include <dev/marvell/gti2creg.h>
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#include <dev/marvell/gtvar.h>
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#include <dev/i2c/i2cvar.h>
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struct gti2c_softc {
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struct device sc_dev;
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struct evcnt sc_ev_intr;
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struct i2c_controller sc_i2c;
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struct gt_softc *sc_gt;
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kmutex_t sc_lock;
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};
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static int gt_i2c_match(struct device *, struct cfdata *, void *);
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static void gt_i2c_attach(struct device *, struct device *, void *);
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CFATTACH_DECL(gtiic, sizeof(struct gti2c_softc),
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gt_i2c_match, gt_i2c_attach, NULL, NULL);
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extern struct cfdriver gtiic_cd;
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static int
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gt_i2c_wait(struct gti2c_softc *sc, uint32_t control,
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uint32_t desired_status, int flags)
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{
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uint32_t status;
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int error = 0;
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again:
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if (flags & I2C_F_POLL)
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control |= I2C_Control_IntEn;
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if (desired_status != I2C_Status_MasterReadAck)
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gt_write(sc->sc_gt, I2C_REG_Control, control);
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for (;;) {
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control = gt_read(sc->sc_gt, I2C_REG_Control);
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if (control & I2C_Control_IFlg)
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break;
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error = tsleep(sc, PZERO, "gti2cwait",
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(flags & I2C_F_POLL) ? 1 : 0);
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if (error && (error != ETIMEDOUT || !(flags & I2C_F_POLL)))
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return error;
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}
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status = gt_read(sc->sc_gt, I2C_REG_Status);
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if (status != desired_status)
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return EIO;
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if ((flags & I2C_F_LAST) &&
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desired_status != I2C_Status_MasterReadAck) {
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control = I2C_Control_Stop;
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goto again;
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}
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return error;
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}
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static int
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gt_i2c_acquire_bus(void *cookie, int flags)
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{
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struct gti2c_softc * const sc = cookie;
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uint32_t status;
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if (flags & I2C_F_POLL)
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return 0;
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mutex_enter(&sc->sc_lock);
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status = gt_read(sc->sc_gt, I2C_REG_Status);
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if (status != I2C_Status_Idle) {
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gt_write(sc->sc_gt, I2C_REG_SoftReset, 1);
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}
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return 0;
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}
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static void
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gt_i2c_release_bus(void *cookie, int flags)
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{
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struct gti2c_softc * const sc = cookie;
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mutex_exit(&sc->sc_lock);
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}
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static int
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gt_i2c_send_start(void *cookie, int flags)
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{
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struct gti2c_softc * const sc = cookie;
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return gt_i2c_wait(sc, I2C_Control_Start, I2C_Status_Started, flags);
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}
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static int
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gt_i2c_send_stop(void *cookie, int flags)
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{
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struct gti2c_softc * const sc = cookie;
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return gt_i2c_wait(sc, I2C_Control_Stop, I2C_Status_Idle, flags);
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}
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static int
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gt_i2c_initiate_xfer(void *cookie, i2c_addr_t addr, int flags)
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{
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struct gti2c_softc * const sc = cookie;
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uint32_t data, wanted_status;
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uint8_t read_mask = (flags & I2C_F_READ) != 0;
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int error;
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if (read_mask) {
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wanted_status = I2C_Status_AddrReadAck;
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} else {
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wanted_status = I2C_Status_AddrWriteAck;
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}
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/*
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* First byte contains whether this xfer is a read or write.
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*/
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data = read_mask;
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if (addr > 0x7f) {
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/*
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* If this is a 10bit request, the first address byte is
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* 0b11110<b9><b8><r/w>.
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*/
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data |= 0xf0 | ((addr & 0x30) >> 7);
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gt_write(sc->sc_gt, I2C_REG_Data, data);
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error = gt_i2c_wait(sc, 0, wanted_status, flags);
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if (error)
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return error;
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/*
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* The first address byte has been sent, now to send
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* the second one.
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*/
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if (read_mask) {
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wanted_status = I2C_Status_2ndAddrReadAck;
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} else {
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wanted_status = I2C_Status_2ndAddrWriteAck;
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}
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data = (uint8_t) addr;
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} else {
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data |= (addr << 1);
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}
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gt_write(sc->sc_gt, I2C_REG_Data, data);
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return gt_i2c_wait(sc, 0, wanted_status, flags);
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}
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static int
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gt_i2c_read_byte(void *cookie, uint8_t *dp, int flags)
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{
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struct gti2c_softc * const sc = cookie;
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int error;
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gt_write(sc->sc_gt, I2C_REG_Data, *dp);
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error = gt_i2c_wait(sc, 0, I2C_Status_MasterReadAck, flags);
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if (error == 0) {
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*dp = gt_read(sc->sc_gt, I2C_REG_Data);
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}
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if (flags & I2C_F_LAST)
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gt_write(sc->sc_gt, I2C_REG_Control, 0);
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return error;
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}
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static int
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gt_i2c_write_byte(void *cookie, uint8_t v, int flags)
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{
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struct gti2c_softc * const sc = cookie;
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gt_write(sc->sc_gt, I2C_REG_Data, v);
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return gt_i2c_wait(sc, 0, I2C_Status_MasterWriteAck, flags);
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}
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static int
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gt_i2c_intr(void *aux)
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{
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struct gti2c_softc * const sc = aux;
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uint32_t v;
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v = gt_read(sc->sc_gt, I2C_REG_Control);
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if ((v & I2C_Control_IFlg) == 0)
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return 0;
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gt_write(sc->sc_gt, I2C_REG_Control, v & ~I2C_Control_IntEn);
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sc->sc_ev_intr.ev_count++;
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wakeup(sc);
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return 1;
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}
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int
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gt_i2c_match(struct device *parent, struct cfdata *cfdata, void *aux)
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{
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struct gt_softc * const gt = device_private(parent);
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struct gt_attach_args * const ga = aux;
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return GT_I2COK(gt, ga, >iic_cd);
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}
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void
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gt_i2c_attach(struct device *parent, struct device *self, void *aux)
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{
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struct gt_softc * const gt = device_private(parent);
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struct gti2c_softc * const sc = device_private(self);
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struct gt_attach_args * const ga = aux;
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struct i2cbus_attach_args iba;
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sc->sc_gt = gt;
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GT_I2CFOUND(gt, ga);
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mutex_init(&sc->sc_lock, MUTEX_DEFAULT, IPL_NONE);
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sc->sc_i2c.ic_cookie = sc;
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sc->sc_i2c.ic_acquire_bus = gt_i2c_acquire_bus;
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sc->sc_i2c.ic_release_bus = gt_i2c_release_bus;
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sc->sc_i2c.ic_release_bus = gt_i2c_release_bus;
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sc->sc_i2c.ic_send_start = gt_i2c_send_start;
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sc->sc_i2c.ic_send_stop = gt_i2c_send_stop;
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sc->sc_i2c.ic_initiate_xfer = gt_i2c_initiate_xfer;
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sc->sc_i2c.ic_read_byte = gt_i2c_read_byte;
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sc->sc_i2c.ic_write_byte = gt_i2c_write_byte;
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intr_establish(IRQ_I2C, IST_LEVEL, IPL_VM, gt_i2c_intr, sc);
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evcnt_attach_dynamic(&sc->sc_ev_intr, EVCNT_TYPE_INTR, NULL,
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sc->sc_dev.dv_xname, "intr");
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iba.iba_tag = &sc->sc_i2c;
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config_found_ia(self, "i2cbus", &iba, iicbus_print);
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}
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