328 lines
9.9 KiB
C
328 lines
9.9 KiB
C
/* $NetBSD: if_rl_pci.c,v 1.7 2000/05/01 15:08:55 tsutsui Exp $ */
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/*
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* Copyright (c) 1997, 1998
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* Bill Paul <wpaul@ctr.columbia.edu>. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Bill Paul.
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* 4. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY Bill Paul AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL Bill Paul OR THE VOICES IN HIS HEAD
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
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* THE POSSIBILITY OF SUCH DAMAGE.
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*
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* FreeBSD Id: if_rl.c,v 1.17 1999/06/19 20:17:37 wpaul Exp
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*/
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/*
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* RealTek 8129/8139 PCI NIC driver
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*
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* Supports several extremely cheap PCI 10/100 adapters based on
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* the RealTek chipset. Datasheets can be obtained from
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* www.realtek.com.tw.
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*
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* Written by Bill Paul <wpaul@ctr.columbia.edu>
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* Electrical Engineering Department
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* Columbia University, New York City
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*/
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/*
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* The RealTek 8139 PCI NIC redefines the meaning of 'low end.' This is
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* probably the worst PCI ethernet controller ever made, with the possible
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* exception of the FEAST chip made by SMC. The 8139 supports bus-master
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* DMA, but it has a terrible interface that nullifies any performance
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* gains that bus-master DMA usually offers.
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*
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* For transmission, the chip offers a series of four TX descriptor
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* registers. Each transmit frame must be in a contiguous buffer, aligned
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* on a longword (32-bit) boundary. This means we almost always have to
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* do mbuf copies in order to transmit a frame, except in the unlikely
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* case where a) the packet fits into a single mbuf, and b) the packet
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* is 32-bit aligned within the mbuf's data area. The presence of only
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* four descriptor registers means that we can never have more than four
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* packets queued for transmission at any one time.
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*
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* Reception is not much better. The driver has to allocate a single large
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* buffer area (up to 64K in size) into which the chip will DMA received
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* frames. Because we don't know where within this region received packets
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* will begin or end, we have no choice but to copy data from the buffer
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* area into mbufs in order to pass the packets up to the higher protocol
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* levels.
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*
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* It's impossible given this rotten design to really achieve decent
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* performance at 100Mbps, unless you happen to have a 400Mhz PII or
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* some equally overmuscled CPU to drive it.
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*
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* On the bright side, the 8139 does have a built-in PHY, although
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* rather than using an MDIO serial interface like most other NICs, the
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* PHY registers are directly accessible through the 8139's register
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* space. The 8139 supports autonegotiation, as well as a 64-bit multicast
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* filter.
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*
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* The 8129 chip is an older version of the 8139 that uses an external PHY
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* chip. The 8129 has a serial MDIO interface for accessing the MII where
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* the 8139 lets you directly access the on-board PHY registers. We need
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* to select which interface to use depending on the chip type.
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*/
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#include "opt_inet.h"
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#include "opt_ns.h"
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#include "bpfilter.h"
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#include "rnd.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/callout.h>
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#include <sys/device.h>
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#include <sys/sockio.h>
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#include <sys/mbuf.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/socket.h>
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#include <net/if.h>
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#include <net/if_arp.h>
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#include <net/if_ether.h>
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#include <net/if_dl.h>
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#include <net/if_media.h>
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#ifdef INET
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#include <netinet/in.h>
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#include <netinet/if_inarp.h>
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#endif
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#ifdef NS
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#include <netns/ns.h>
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#include <netns/ns_if.h>
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#endif
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#if NBPFILTER > 0
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#include <net/bpf.h>
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#endif
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#include <machine/bus.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcidevs.h>
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#include <dev/mii/mii.h>
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#include <dev/mii/miivar.h>
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/*
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* Default to using PIO access for this driver. On SMP systems,
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* there appear to be problems with memory mapped mode: it looks like
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* doing too many memory mapped access back to back in rapid succession
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* can hang the bus. I'm inclined to blame this on crummy design/construction
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* on the part of RealTek. Memory mapped mode does appear to work on
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* uniprocessor systems though.
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*/
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#define RL_USEIOSPACE
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#include <dev/ic/rtl81x9reg.h>
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#include <dev/ic/rtl81x9var.h>
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struct rl_pci_softc {
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struct rl_softc sc_rl; /* real rl softc */
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/* PCI-specific goo.*/
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void *sc_ih;
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pci_chipset_tag_t sc_pc; /* PCI chipset */
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pcitag_t sc_pcitag; /* PCI tag */
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};
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static struct rl_type rl_pci_devs[] = {
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{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8129,
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"RealTek 8129 10/100BaseTX" },
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{ PCI_VENDOR_REALTEK, PCI_PRODUCT_REALTEK_RT8139,
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"RealTek 8139 10/100BaseTX" },
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{ PCI_VENDOR_ACCTON, PCI_PRODUCT_ACCTON_MPX5030,
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"Accton MPX 5030/5038 10/100BaseTX" },
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{ PCI_VENDOR_DELTA, PCI_PRODUCT_DELTA_8139,
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"Delta Electronics 8139 10/100BaseTX" },
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{ PCI_VENDOR_ADDTRON, PCI_PRODUCT_ADDTRON_8139,
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"Addtron Technology 8139 10/100BaseTX" },
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#if 0
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{ SIS_VENDORID, SIS_DEVICEID_8139,
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"SiS 900 10/100BaseTX" },
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#endif
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{ 0, 0, NULL }
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};
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const struct rl_type *rl_pci_lookup
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__P((const struct pci_attach_args *));
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int rl_pci_match __P((struct device *, struct cfdata *, void *));
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void rl_pci_attach __P((struct device *, struct device *, void *));
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struct cfattach rtk_pci_ca = {
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sizeof(struct rl_pci_softc), rl_pci_match, rl_pci_attach,
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};
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const struct rl_type *
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rl_pci_lookup(pa)
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const struct pci_attach_args *pa;
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{
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struct rl_type *t;
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for (t = rl_pci_devs; t->rl_name != NULL; t++){
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if (PCI_VENDOR(pa->pa_id) == t->rl_vid &&
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PCI_PRODUCT(pa->pa_id) == t->rl_did) {
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return (t);
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}
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}
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return (NULL);
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}
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int
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rl_pci_match(parent, match, aux)
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struct device *parent;
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struct cfdata *match;
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void *aux;
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{
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struct pci_attach_args *pa = aux;
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if (rl_pci_lookup(pa) != NULL)
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return (1);
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return (0);
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}
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/*
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* Attach the interface. Allocate softc structures, do ifmedia
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* setup and ethernet/BPF attach.
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*/
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void
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rl_pci_attach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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int s, pmreg;
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pcireg_t command;
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struct rl_pci_softc *psc = (struct rl_pci_softc *)self;
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struct rl_softc *sc = &psc->sc_rl;
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struct pci_attach_args *pa = aux;
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pci_chipset_tag_t pc = pa->pa_pc;
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pci_intr_handle_t ih;
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const char *intrstr = NULL;
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const struct rl_type *t;
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psc->sc_pc = pa->pa_pc;
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psc->sc_pcitag = pa->pa_tag;
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t = rl_pci_lookup(pa);
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if (t == NULL) {
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printf("\n");
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panic("rl_pci_attach: impossible");
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}
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printf(": %s\n", t->rl_name);
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s = splimp();
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/*
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* Handle power management nonsense.
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*/
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if (pci_get_capability(pc, pa->pa_tag, PCI_CAP_PWRMGMT, &pmreg, 0)) {
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command = pci_conf_read(pc, pa->pa_tag, pmreg + 4);
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if (command & RL_PSTATE_MASK) {
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pcireg_t iobase, membase, irq;
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/* Save important PCI config data. */
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iobase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOIO);
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membase = pci_conf_read(pc, pa->pa_tag, RL_PCI_LOMEM);
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irq = pci_conf_read(pc, pa->pa_tag,
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PCI_PRODUCT_DELTA_8139);
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/* Reset the power state. */
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printf("%s: chip is is in D%d power mode "
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"-- setting to D0\n", sc->sc_dev.dv_xname,
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command & RL_PSTATE_MASK);
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command &= 0xFFFFFFFC;
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pci_conf_write(pc, pa->pa_tag, pmreg + 4, command);
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/* Restore PCI config data. */
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pci_conf_write(pc, pa->pa_tag, RL_PCI_LOIO, iobase);
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pci_conf_write(pc, pa->pa_tag, RL_PCI_LOMEM, membase);
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pci_conf_write(pc, pa->pa_tag,
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PCI_PRODUCT_DELTA_8139, irq);
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}
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}
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/*
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* Map control/status registers.
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*/
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#ifdef RL_USEIOSPACE
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if (pci_mapreg_map(pa, RL_PCI_LOIO, PCI_MAPREG_TYPE_IO, 0,
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&sc->rl_btag, &sc->rl_bhandle, NULL, NULL)) {
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printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
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goto fail;
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}
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#else
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if (pci_mapreg_map(pa, RL_PCI_LOMEM, PCI_MAPREG_TYPE_MEM, 0,
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&sc->rl_btag, &sc->rl_bhandle, NULL, NULL)) {
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printf("%s: can't map i/o space\n", sc->sc_dev.dv_xname);
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goto fail;
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}
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#endif
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/* Allocate interrupt */
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if (pci_intr_map(pc, pa->pa_intrtag, pa->pa_intrpin,
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pa->pa_intrline, &ih)) {
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printf("%s: couldn't map interrupt\n", sc->sc_dev.dv_xname);
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goto fail;
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}
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intrstr = pci_intr_string(pc, ih);
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psc->sc_ih = pci_intr_establish(pc, ih, IPL_NET, rl_intr, sc);
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if (psc->sc_ih == NULL) {
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printf("%s: couldn't establish interrupt",
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sc->sc_dev.dv_xname);
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if (intrstr != NULL)
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printf(" at %s", intrstr);
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printf("\n");
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goto fail;
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}
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if (t->rl_did == PCI_PRODUCT_REALTEK_RT8139 ||
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t->rl_did == PCI_PRODUCT_ACCTON_MPX5030 ||
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t->rl_did == PCI_PRODUCT_DELTA_8139 ||
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t->rl_did == PCI_PRODUCT_ADDTRON_8139
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#if 0
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|| t->rl_did == SIS_DEVICEID_8139
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#endif
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) {
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sc->rl_type = RL_8139;
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} else if (t->rl_did == PCI_PRODUCT_REALTEK_RT8129) {
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sc->rl_type = RL_8129;
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} else {
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goto fail;
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}
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printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname, intrstr);
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sc->sc_dmat = pa->pa_dmat;
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rl_attach(sc);
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fail:
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splx(s);
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return;
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}
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