148 lines
5.8 KiB
C
148 lines
5.8 KiB
C
/* $NetBSD: bus.h,v 1.2 2002/03/24 23:37:43 bjh21 Exp $ */
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/*-
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* Copyright (c) 2000 Ben Harris
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* bus.h - Bus space functions for brivers
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*/
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#ifndef _ACORN26_BUS_H_
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#define _ACORN26_BUS_H_
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#include <arm/blockio.h>
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/*
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* I believe that there's only one sensible bus space on the Archimedes,
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* which corresponds to the system I/O bus.
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*
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* Some IDE cards have an odd shift applied to their registers. This is
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* contained in the bus_space_tag_t.
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*/
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/* Addresses (in bus space). */
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typedef u_int bus_addr_t;
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typedef u_int bus_size_t;
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/* Access methods for bus space. */
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typedef int bus_space_tag_t;
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typedef struct bus_space_handle {
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bus_addr_t a1; /* Address for 8-bit operations */
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bus_addr_t a2; /* Address for 16-bit operations */
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} bus_space_handle_t;
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/* Mapping and unmapping operations. */
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#define BUS_SPACE_MAP_CACHEABLE 0x01
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#define BUS_SPACE_MAP_LINEAR 0x02
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extern int bus_space_map(bus_space_tag_t, bus_addr_t, bus_size_t, int,
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bus_space_handle_t *);
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#define bus_space_unmap(t,h,s) /* Do nothing */
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extern int bus_space_subregion(bus_space_tag_t, bus_space_handle_t, bus_size_t,
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bus_size_t, bus_space_handle_t *);
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extern int bus_space_shift(bus_space_tag_t, bus_space_handle_t, int,
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bus_space_tag_t *, bus_space_handle_t *);
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/* Allocating and freeing bus space */
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#define bus_space_alloc(t, rs, re, s, a, b, c, ap, hp) (-1)
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#define bus_space_free(t, h, s) /* Do nothing */
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/* Mapping bus space into user address space (impossible on acorn26) */
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#define bus_space_mmap(t, a, o, p, f) (-1)
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/* Used by ne2000.c */
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#define BUS_SPACE_ALIGNED_POINTER ALIGNED_POINTER
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/* Bus barrier operations. */
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#define BUS_SPACE_BARRIER_READ 0
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#define BUS_SPACE_BARRIER_WRITE 0
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#define bus_space_barrier(t, h, o, l, f) /* Do nothing */
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/* Bus read (single) operations. */
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#define bus_space_read_1(t, h, o) \
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(*(volatile u_int8_t *)((h.a1) + ((o) << (t))))
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#define bus_space_read_2(t, h, o) \
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(*(volatile u_int16_t *)((h.a2) + ((o) << (t))))
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/* Bus write (single) operations. */
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#define bus_space_write_1(t, h, o, v) \
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(*(volatile u_int8_t *)((h.a1) + ((o) << (t))) = (v))
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#define bus_space_write_2(t, h, o, v) \
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(*(volatile u_int32_t *)((h.a2) + ((o) << (t))) = (v) | ((v) << 16))
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/* Bus read multiple operations. */
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#define bus_space_read_multi_1(t, h, o, d, c) \
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(read_multi_1((h.a1) + ((o) << (t)), (d), (c)))
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extern void bus_space_read_multi_2(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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#define bus_space_read_multi_4(t, h, o, d, s) panic("bus_space_read_multi_4")
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/* Bus write multiple operations. */
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#define bus_space_write_multi_1(t, h, o, d, c) \
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(write_multi_1((h.a1) + ((o) << (t)), (d), (c)))
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extern void bus_space_write_multi_2(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int16_t const *, bus_size_t);
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#define bus_space_write_multi_4(t, h, o, d, s) panic("bus_space_write_multi_4")
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/* Bus set multiple operations. */
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extern void bus_space_set_multi_1(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t);
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extern void bus_space_set_multi_2(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t);
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/* Bus read region operations. */
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extern void bus_space_read_region_1(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int8_t *, bus_size_t);
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extern void bus_space_read_region_2(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int16_t *, bus_size_t);
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/* Bus write region operations. */
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extern void bus_space_write_region_1(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int8_t const *, bus_size_t);
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extern void bus_space_write_region_2(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int16_t const *,
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bus_size_t);
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/* Bus set region operations. */
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extern void bus_space_set_region_1(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int8_t, bus_size_t);
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extern void bus_space_set_region_2(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, u_int16_t, bus_size_t);
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/* Copy operations. */
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extern void bus_space_copy_region_1(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
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extern void bus_space_copy_region_2(bus_space_tag_t, bus_space_handle_t,
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bus_size_t, bus_space_handle_t, bus_size_t, bus_size_t);
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/*
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* bus_dma stuff. We don't support bus_dma yet, but some drivers need
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* this.
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*/
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typedef void *bus_dmamap_t;
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#endif /* _ACORN26_BUS_H_ */
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