008816ea4f
Adds (most) support for ARC platform to port-independent mips code. Some changes (e.g., clean up of overlapping CPU/FPU ids) inspired by comparison to the OpenBSD 2.1 codebase of Soda's ARC port. Open issues: * Still no support for r4600 or mipsIV CPUs with two-way L1 cache. Code derived from Per Fogelstrom's OpenBSD source doesn't work on mips3 pmaxes with L2 cache. * Still some port-specific #ifdefs, for interrupt enable and pmax L2 cache-size. Needs more thought, but overlaps with work-in-progress by Tohru and Tsubai on spl()s and related stuff.
108 lines
3.4 KiB
C
108 lines
3.4 KiB
C
/* $NetBSD: profile.h,v 1.12 1998/09/11 16:46:31 jonathan Exp $ */
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/*
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* Copyright (c) 1992, 1993
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* The Regents of the University of California. All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* Ralph Campbell.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* @(#)profile.h 8.1 (Berkeley) 6/10/93
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*/
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#ifndef _MIPS_PROFILE_H_
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#define _MIPS_PROFILE_H_
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#ifdef _KERNEL
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/*
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* Declare non-profiled _splhigh() /_splx() entrypoints for _mcount.
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* see MCOUNT_ENTER and MCOUNT_EXIT.
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*/
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#define _KERNEL_MCOUNT_DECL \
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extern int _splhigh __P((void)); extern int _splx __P((int));
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#else /* !_KERNEL */
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/* Make __mcount static. */
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#define _KERNEL_MCOUNT_DECL static
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#endif /* !_KERNEL */
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#ifdef _KERNEL
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# define _PROF_CPLOAD ""
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#else
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# define _PROF_CPLOAD ".cpload $25;"
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#endif
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#define _MCOUNT_DECL \
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_KERNEL_MCOUNT_DECL \
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void __attribute__((unused)) __mcount
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#define MCOUNT \
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__asm__(".globl _mcount;" \
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".type _mcount,@function;" \
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"_mcount:;" \
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".set noreorder;" \
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".set noat;" \
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_PROF_CPLOAD \
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"sw $4,8($29);" \
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"sw $5,12($29);" \
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"sw $6,16($29);" \
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"sw $7,20($29);" \
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"sw $1,0($29);" \
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"sw $31,4($29);" \
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"move $5,$31;" \
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"jal __mcount;" \
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"move $4,$1;" \
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"lw $4,8($29);" \
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"lw $5,12($29);" \
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"lw $6,16($29);" \
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"lw $7,20($29);" \
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"lw $31,4($29);" \
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"lw $1,0($29);" \
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"addu $29,$29,8;" \
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"j $31;" \
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"move $31,$1;" \
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".set reorder;" \
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".set at");
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#ifdef _KERNEL
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/*
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* The following two macros do splhigh and splx respectively.
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* They have to be defined this way because these are real
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* functions on the MIPS, and we do not want to invoke mcount
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* recursively.
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*/
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#define MCOUNT_ENTER s = _splhigh()
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#define MCOUNT_EXIT _splx(s)
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#endif /* _KERNEL */
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#endif /* _MIPS_PROFILE_H_ */
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