468 lines
12 KiB
C
468 lines
12 KiB
C
/* $NetBSD: bcu_vrip.c,v 1.16 2002/02/10 13:23:55 takemura Exp $ */
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/*-
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* Copyright (c) 1999-2001 SATO Kazumi. All rights reserved.
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* Copyright (c) 1999, 2002 PocketBSD Project. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the PocketBSD project
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* and its contributors.
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* 4. Neither the name of the project nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/device.h>
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#include <sys/reboot.h>
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#include <machine/bus.h>
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#include <machine/debug.h>
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#include <machine/platid.h>
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#include <machine/platid_mask.h>
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#include <mips/cpuregs.h>
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#include "opt_vr41xx.h"
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#include <hpcmips/vr/vr.h>
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#include <hpcmips/vr/vrcpudef.h>
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#include <hpcmips/vr/vripif.h>
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#include <hpcmips/vr/vripvar.h>
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#include <hpcmips/vr/vripreg.h>
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#include <hpcmips/vr/bcureg.h>
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#include <hpcmips/vr/bcuvar.h>
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static int vrbcu_match(struct device *, struct cfdata *, void *);
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static void vrbcu_attach(struct device *, struct device *, void *);
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static void vrbcu_write(struct vrbcu_softc *, int, unsigned short);
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static unsigned short vrbcu_read(struct vrbcu_softc *, int);
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static void vrbcu_dump_regs(void);
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char *vr_cpuname=NULL;
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int vr_major=-1;
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int vr_minor=-1;
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int vr_cpuid=-1;
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struct cfattach vrbcu_ca = {
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sizeof(struct vrbcu_softc), vrbcu_match, vrbcu_attach
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};
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struct vrbcu_softc *the_bcu_sc = NULL;
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#ifdef SINGLE_VRIP_BASE
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#define vrbcu_addr() VRIP_BCU_ADDR
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#else
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static bus_addr_t vrbcu_addr(void);
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static bus_addr_t
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vrbcu_addr()
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{
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static bus_addr_t addr = NULL;
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static struct platid_data addrs[] = {
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{ &platid_mask_CPU_MIPS_VR_4102, (void *)VR4102_BCU_ADDR },
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{ &platid_mask_CPU_MIPS_VR_4111, (void *)VR4102_BCU_ADDR },
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{ &platid_mask_CPU_MIPS_VR_4121, (void *)VR4102_BCU_ADDR },
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{ &platid_mask_CPU_MIPS_VR_4122, (void *)VR4122_BCU_ADDR },
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{ &platid_mask_CPU_MIPS_VR_4131, (void *)VR4122_BCU_ADDR },
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{ &platid_mask_CPU_MIPS_VR_4181, (void *)VR4181_BCU_ADDR },
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{ NULL, NULL } /* terminator, don't delete */
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};
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struct platid_data *p;
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if (addr == NULL) {
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if ((p = platid_search_data(&platid, addrs)) == NULL)
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panic("%s: can't find VR BCU address\n", __FUNCTION__);
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addr = (bus_addr_t)p->data;
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}
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return (addr);
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}
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#endif /* SINGLE_VRIP_BASE */
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static inline void
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vrbcu_write(struct vrbcu_softc *sc, int port, unsigned short val)
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{
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bus_space_write_2(sc->sc_iot, sc->sc_ioh, port, val);
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}
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static inline unsigned short
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vrbcu_read(struct vrbcu_softc *sc, int port)
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{
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return (bus_space_read_2(sc->sc_iot, sc->sc_ioh, port));
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}
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static int
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vrbcu_match(struct device *parent, struct cfdata *cf, void *aux)
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{
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return (2);
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}
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static void
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vrbcu_attach(struct device *parent, struct device *self, void *aux)
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{
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struct vrip_attach_args *va = aux;
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struct vrbcu_softc *sc = (struct vrbcu_softc *)self;
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sc->sc_iot = va->va_iot;
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bus_space_map(sc->sc_iot, va->va_addr, va->va_size,
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0, /* no flags */
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&sc->sc_ioh);
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printf("\n");
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the_bcu_sc = sc;
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vrbcu_dump_regs();
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}
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static void
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vrbcu_dump_regs()
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{
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struct vrbcu_softc *sc = the_bcu_sc;
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int cpuclock = 0, tclock = 0, vtclock = 0, cpuid;
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#if !defined(ONLY_VR4102)
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int spdreg;
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#endif
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#ifdef VRBCUDEBUG
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int reg;
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#endif /* VRBCUDEBUG */
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cpuid = vrbcu_vrip_getcpuid();
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#if !defined(ONLY_VR4181) && !defined(ONLY_VR4102)
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if (cpuid != BCUREVID_FIXRID_4181
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&& cpuid <= BCUREVID_RID_4131
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&& cpuid >= BCUREVID_RID_4111) {
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spdreg = vrbcu_read(sc, BCUCLKSPEED_REG_W);
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#ifdef VRBCUDEBUG
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printf("vrbcu: CLKSPEED %x: \n", spdreg);
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#endif /* VRBCUDEBUG */
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}
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#endif
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#if defined VR4181
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if (cpuid == BCUREVID_FIXRID_4181){
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spdreg = vrbcu_read(sc, BCU81CLKSPEED_REG_W);
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#ifdef VRBCUDEBUG
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printf("vrbcu: CLKSPEED %x: \n", spdreg);
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#endif /* VRBCUDEBUG */
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}
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#endif
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cpuclock = vrbcu_vrip_getcpuclock();
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switch (cpuid) {
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#if defined VR4181
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case BCUREVID_FIXRID_4181:
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switch ((spdreg & BCU81CLKSPEED_DIVTMASK) >>
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BCU81CLKSPEED_DIVTSHFT){
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case BCU81CLKSPEED_DIVT1:
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vtclock = tclock = cpuclock;
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break;
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case BCU81CLKSPEED_DIVT2:
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vtclock = tclock = cpuclock/2;
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break;
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case BCU81CLKSPEED_DIVT3:
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vtclock = tclock = cpuclock/3;
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break;
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case BCU81CLKSPEED_DIVT4:
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vtclock = tclock = cpuclock/4;
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break;
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default:
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vtclock = tclock = 0;
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}
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break;
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#endif /* VR4181 */
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case BCUREVID_RID_4101:
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case BCUREVID_RID_4102:
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vtclock = tclock = cpuclock/2;
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break;
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#if defined VR4111
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case BCUREVID_RID_4111:
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if ((spdreg&BCUCLKSPEED_DIVT2B) == 0)
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vtclock = tclock = cpuclock/2;
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else if ((spdreg&BCUCLKSPEED_DIVT3B) == 0)
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vtclock = tclock = cpuclock/3;
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else if ((spdreg&BCUCLKSPEED_DIVT4B) == 0)
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vtclock = tclock = cpuclock/4;
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else
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vtclock = tclock = 0; /* XXX */
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break;
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#endif /* VR4111 */
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#if defined VR4121
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case BCUREVID_RID_4121:
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{
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int vt;
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tclock = cpuclock / ((spdreg & BCUCLKSPEED_DIVTMASK) >>
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BCUCLKSPEED_DIVTSHFT);
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vt = ((spdreg & BCUCLKSPEED_DIVVTMASK) >>
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BCUCLKSPEED_DIVVTSHFT);
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if (vt == 0)
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vtclock = 0; /* XXX */
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else if (vt < 0x9)
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vtclock = cpuclock / vt;
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else
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vtclock = cpuclock / ((vt - 8)*2+1) * 2;
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}
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break;
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#endif /* VR4121 */
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#if defined VR4122 || defined VR4131
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case BCUREVID_RID_4122:
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case BCUREVID_RID_4131:
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{
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int vtdiv;
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vtdiv = ((spdreg & BCUCLKSPEED_VTDIVMODE) >>
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BCUCLKSPEED_VTDIVSHFT);
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if (vtdiv == 0 || vtdiv > BCUCLKSPEED_VTDIV6)
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vtclock = 0; /* XXX */
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else
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vtclock = cpuclock / vtdiv;
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tclock = vtclock /
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(((spdreg & BCUCLKSPEED_TDIVMODE) >>
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BCUCLKSPEED_TDIVSHFT) ? 4 : 2);
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}
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break;
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#endif /* VR4122 || VR4131 */
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default:
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break;
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}
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if (tclock)
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printf("%s: cpu %d.%03dMHz, bus %d.%03dMHz, ram %d.%03dMHz\n",
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sc->sc_dev.dv_xname,
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cpuclock/1000000, (cpuclock%1000000)/1000,
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tclock/1000000, (tclock%1000000)/1000,
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vtclock/1000000, (vtclock%1000000)/1000);
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else {
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printf("%s: cpu %d.%03dMHz\n",
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sc->sc_dev.dv_xname,
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cpuclock/1000000, (cpuclock%1000000)/1000);
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printf("%s: UNKNOWN BUS CLOCK SPEED:"
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" CPU is UNKNOWN or NOT CONFIGURED\n",
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sc->sc_dev.dv_xname);
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}
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#ifdef VRBCUDEBUG
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reg = vrbcu_read(sc, BCUCNT1_REG_W);
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printf("vrbcu: CNT1 %x: ", reg);
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dbg_bit_print(reg);
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#if !defined(ONLY_VR4181)
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if (cpuid != BCUREVID_FIXRID_4181
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&& cpuid <= BCUREVID_RID_4121
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&& cpuid >= BCUREVID_RID_4102) {
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reg = vrbcu_read(sc, BCUCNT2_REG_W);
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printf("vrbcu: CNT2 %x: ", reg);
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dbg_bit_print(reg);
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}
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#endif /* !defined ONLY_VR4181 */
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#if !defined(ONLY_VR4181) || !defined(ONLY_VR4122_4131)
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if (cpuid != BCUREVID_FIXRID_4181
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&& cpuid <= BCUREVID_RID_4121
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&& cpuid >= BCUREVID_RID_4102) {
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reg = vrbcu_read(sc, BCUSPEED_REG_W);
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printf("vrbcu: SPEED %x: ", reg);
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dbg_bit_print(reg);
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reg = vrbcu_read(sc, BCUERRST_REG_W);
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printf("vrbcu: ERRST %x: ", reg);
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dbg_bit_print(reg);
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reg = vrbcu_read(sc, BCURFCNT_REG_W);
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printf("vrbcu: RFCNT %x\n", reg);
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reg = vrbcu_read(sc, BCUREFCOUNT_REG_W);
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printf("vrbcu: RFCOUNT %x\n", reg);
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}
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#endif /* !defined(ONLY_VR4181) || !defined(ONLY_VR4122_4131) */
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#if !defined(ONLY_VR4181)
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if (cpuid != BCUREVID_FIXRID_4181
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&& cpuid <= BCUREVID_RID_4131
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&& cpuid >= BCUREVID_RID_4111)
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{
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reg = vrbcu_read(sc, BCUCNT3_REG_W);
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printf("vrbcu: CNT3 %x: ", reg);
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dbg_bit_print(reg);
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}
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#endif /* !defined ONLY_VR4181 */
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#endif /* VRBCUDEBUG */
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}
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static char *cpuname[] = {
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"VR4101", /* 0 */
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"VR4102", /* 1 */
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"VR4111", /* 2 */
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"VR4121", /* 3 */
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"VR4122", /* 4 */
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"VR4131", /* 5 */
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"UNKNOWN",
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"VR4181", /* 0x10 + 0 */
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};
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int
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vrbcu_vrip_getcpuid(void)
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{
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volatile u_int16_t *revreg;
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if (vr_cpuid != -1)
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return (vr_cpuid);
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if (vr_cpuid == -1) {
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if (vrbcu_addr() == VR4181_BCU_ADDR)
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revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1
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((vrbcu_addr() + BCU81REVID_REG_W));
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else
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revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1
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((vrbcu_addr() + BCUREVID_REG_W));
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vr_cpuid = *revreg;
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vr_cpuid = (vr_cpuid&BCUREVID_RIDMASK)>>BCUREVID_RIDSHFT;
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if (vrbcu_addr() == VR4181_BCU_ADDR
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&& vr_cpuid == BCUREVID_RID_4181) /* conflict vr4101 */
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vr_cpuid = BCUREVID_FIXRID_4181;
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}
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return (vr_cpuid);
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}
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char *
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vrbcu_vrip_getcpuname(void)
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{
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int cpuid;
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if (vr_cpuname != NULL)
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return (vr_cpuname);
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cpuid = vrbcu_vrip_getcpuid();
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vr_cpuname = cpuname[cpuid];
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return (vr_cpuname);
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}
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int
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vrbcu_vrip_getcpumajor(void)
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{
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volatile u_int16_t *revreg;
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if (vr_major != -1)
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return (vr_major);
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revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1
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((vrbcu_addr() + BCUREVID_REG_W));
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vr_major = *revreg;
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vr_major = (vr_major&BCUREVID_MJREVMASK)>>BCUREVID_MJREVSHFT;
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return (vr_major);
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}
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int
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vrbcu_vrip_getcpuminor(void)
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{
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volatile u_int16_t *revreg;
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if (vr_minor != -1)
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return (vr_minor);
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revreg = (u_int16_t *)MIPS_PHYS_TO_KSEG1
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((vrbcu_addr() + BCUREVID_REG_W));
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vr_minor = *revreg;
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vr_minor = (vr_minor&BCUREVID_MNREVMASK)>>BCUREVID_MNREVSHFT;
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return (vr_minor);
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}
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#define CLKX 18432000 /* CLKX1,CLKX2: 18.432MHz */
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#define MHZ 1000000
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int
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vrbcu_vrip_getcpuclock(void)
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{
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u_int16_t clksp;
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int cpuid, cpuclock;
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cpuid = vrbcu_vrip_getcpuid();
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if (cpuid != BCUREVID_FIXRID_4181 && cpuid >= BCUREVID_RID_4111) {
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clksp = *(u_int16_t *)MIPS_PHYS_TO_KSEG1
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((vrbcu_addr() + BCUCLKSPEED_REG_W)) &
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BCUCLKSPEED_CLKSPMASK;
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} else if (cpuid == BCUREVID_FIXRID_4181) {
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clksp = *(u_int16_t *)MIPS_PHYS_TO_KSEG1
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((vrbcu_addr() + BCU81CLKSPEED_REG_W)) &
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BCUCLKSPEED_CLKSPMASK;
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}
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switch (cpuid) {
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case BCUREVID_FIXRID_4181:
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cpuclock = CLKX / clksp * 64;
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/* branch delay is 1 clock; 2 clock/loop */
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cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ;
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break;
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case BCUREVID_RID_4101:
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/* assume 33MHz */
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cpuclock = 33000000;
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/* branch delay is 1 clock; 2 clock/loop */
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cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ;
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break;
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case BCUREVID_RID_4102:
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cpuclock = CLKX / clksp * 32;
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/* branch delay is 1 clock; 2 clock/loop */
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cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ;
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break;
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case BCUREVID_RID_4111:
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cpuclock = CLKX / clksp * 64;
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/* branch delay is 1 clock; 2 clock/loop */
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cpuspeed = (cpuclock / 2 + MHZ / 2) / MHZ;
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break;
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case BCUREVID_RID_4121:
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cpuclock = CLKX / clksp * 64;
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/* branch delay is 2 clock; 3 clock/loop */
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cpuspeed = (cpuclock / 3 + MHZ / 2) / MHZ;
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break;
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case BCUREVID_RID_4122:
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cpuclock = CLKX / clksp * 98;
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/* branch delay is 2 clock; 3 clock/loop */
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cpuspeed = (cpuclock / 3 + MHZ / 2) / MHZ;
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break;
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case BCUREVID_RID_4131:
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cpuclock = CLKX / clksp * 98;
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/* branch delay is 2 clock; 3 clock/loop */
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cpuspeed = (cpuclock / 3 + MHZ / 2) / MHZ;
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break;
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default:
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panic("unknown CPU type %d\n", cpuid);
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break;
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}
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return (cpuclock);
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}
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