fb9c150c48
- Most changes are comment cleanups. _ iomd.h is no longer an exported header. - Added intr.h for MI interrupt definitions. - Added definitions for ARM8 cpu. - Added bus dma support.
234 lines
7.0 KiB
C
234 lines
7.0 KiB
C
/* $NetBSD: frame.h,v 1.5 1997/10/14 09:20:15 mark Exp $ */
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/*
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* Copyright (c) 1994-1997 Mark Brinicombe.
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* Copyright (c) 1994 Brini.
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* All rights reserved.
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*
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* This code is derived from software written for Brini by Mark Brinicombe
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Brini.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY BRINI ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL BRINI OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* RiscBSD kernel project
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*
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* frame.h
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*
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* Stack frames structures
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*
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* Created : 30/09/94
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*/
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#ifndef _ARM32_FRAME_H_
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#define _ARM32_FRAME_H_
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#ifndef _LOCORE
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#include <sys/signal.h>
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/*
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* System stack frames.
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*/
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typedef struct irqframe {
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unsigned int if_spsr;
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unsigned int if_r0;
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unsigned int if_r1;
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unsigned int if_r2;
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unsigned int if_r3;
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unsigned int if_r4;
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unsigned int if_r5;
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unsigned int if_r6;
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unsigned int if_r7;
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unsigned int if_r8;
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unsigned int if_r9;
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unsigned int if_r10;
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unsigned int if_r11;
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unsigned int if_r12;
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unsigned int if_usr_sp;
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unsigned int if_usr_lr;
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unsigned int if_svc_lr;
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unsigned int if_pc;
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} irqframe_t;
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#define clockframe irqframe
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typedef struct trapframe {
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unsigned int tf_spsr;
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unsigned int tf_r0;
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unsigned int tf_r1;
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unsigned int tf_r2;
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unsigned int tf_r3;
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unsigned int tf_r4;
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unsigned int tf_r5;
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unsigned int tf_r6;
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unsigned int tf_r7;
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unsigned int tf_r8;
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unsigned int tf_r9;
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unsigned int tf_r10;
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unsigned int tf_r11;
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unsigned int tf_r12;
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unsigned int tf_usr_sp;
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unsigned int tf_usr_lr;
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unsigned int tf_svc_lr;
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unsigned int tf_pc;
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} trapframe_t;
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/*
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* Signal frame
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*/
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struct sigframe {
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int sf_signum;
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int sf_code;
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struct sigcontext *sf_scp;
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sig_t sf_handler;
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struct sigcontext sf_sc;
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};
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/*
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* Switch frame
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*/
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struct switchframe {
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int sf_spl;
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u_int sf_r4;
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u_int sf_r5;
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u_int sf_r6;
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u_int sf_r7;
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u_int sf_pc;
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};
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/*
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* Stack frame. Used during stack traces (db_trace.c)
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*/
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struct frame {
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u_int fr_fp;
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u_int fr_sp;
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u_int fr_lr;
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u_int fr_pc;
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};
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#ifdef _KERNEL
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void validate_trapframe __P((trapframe_t *, int));
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#endif /* _KERNEL */
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#else /* _LOCORE */
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/*
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* ASM macros for pushing and pulling trapframes from the stack
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*
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* These macros are used to handle the irqframe and trapframe structures
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* defined above.
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*/
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/*
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* PUSHFRAME - macro to push a trap frame on the stack in the current mode
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* Since the current mode is used, the SVC R14 field is not defined.
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*
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* NOTE: r13 and r14 are stored separately as a work around for the
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* SA110 rev 2 STM^ bug
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*/
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#define PUSHFRAME \
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str lr, [sp, #-4]!; /* Push the return address */ \
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sub sp, sp, #0x00000004; /* Skip SVC R14 */ \
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sub sp, sp, #(4*15); /* Adjust the stack pointer */ \
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stmia sp, {r0-r12}; /* Push the user mode registers */ \
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add r0, sp, #(4*13); /* Adjust the stack pointer */ \
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stmia r0, {r13-r14}^; /* Push the user mode registers */ \
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mov r0, r0; /* NOP for previous instruction */ \
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mrs r0, spsr_all; /* Put the SPSR on the stack */ \
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str r0, [sp, #-4]!;
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/*
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* PULLFRAME - macro to pull a trap frame from the stack in the current mode
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* Since the current mode is used, the SVC R14 field is ignored.
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*/
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#define PULLFRAME \
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ldr r0, [sp], #0x0004; /* Get the SPSR from stack */ \
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msr spsr_all, r0; \
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ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
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mov r0, r0; /* NOP for previous instruction */ \
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add sp, sp, #(4*15); /* Adjust the stack pointer */ \
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add sp, sp, #0x00000004; /* Skip SVC R14 */ \
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ldr lr, [sp], #0x0004; /* Pull the return address */
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/*
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* PUSHFRAMEINSVC - macro to push a trap frame on the stack in SVC32 mode
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* This should only be used if the processor is not currently in SVC32
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* mode. The processor mode is switched to SVC mode and the trap frame is
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* stored. The SVC R14 field is used to store the previous value of
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* R14 in SVC mode.
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*
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* NOTE: r13 and r14 are stored separately as a work around for the
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* SA110 rev 2 STM^ bug
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*/
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#define PUSHFRAMEINSVC \
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stmdb sp, {r0-r3}; /* Save 4 registers */ \
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mov r0, lr; /* Save xxx32 r14 */ \
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mov r1, sp; /* Save xxx32 sp */ \
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mrs r3, spsr_all; /* Save xxx32 spsr */ \
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mrs r2, cpsr_all; /* Get the CPSR */ \
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bic r2, r2, #(PSR_MODE); /* Fix for SVC mode */ \
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orr r2, r2, #(PSR_SVC32_MODE); \
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msr cpsr_all, r2; /* Punch into SVC mode */ \
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str r0, [sp, #-4]!; /* Push return address */ \
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str lr, [sp, #-4]!; /* Push SVC r14 */ \
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msr spsr_all, r3; /* Restore correct spsr */ \
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ldmdb r1, {r0-r3}; /* Restore 4 regs from xxx mode */ \
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sub sp, sp, #(4*15); /* Adjust the stack pointer */ \
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stmia sp, {r0-r12}; /* Push the user mode registers */ \
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add r0, sp, #(4*13); /* Adjust the stack pointer */ \
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stmia r0, {r13-r14}^; /* Push the user mode registers */ \
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mov r0, r0; /* NOP for previous instruction */ \
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mrs r0, spsr_all; /* Put the SPSR on the stack */ \
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str r0, [sp, #-4]!
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/*
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* PULLFRAMEFROMSVCANDEXIT - macro to pull a trap frame from the stack
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* in SVC32 mode and restore the saved processor mode and PC.
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* This should be used when the SVC R14 register needs to be restored on
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* exit.
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*/
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#define PULLFRAMEFROMSVCANDEXIT \
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ldr r0, [sp], #0x0004; /* Get the SPSR from stack */ \
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msr spsr_all, r0; /* restore SPSR */ \
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ldmia sp, {r0-r14}^; /* Restore registers (usr mode) */ \
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mov r0, r0; /* NOP for previous instruction */ \
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add sp, sp, #(4*15); /* Adjust the stack pointer */ \
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ldmia sp!, {lr, pc}^ /* Restore lr and exit */
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#endif _LOCORE
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#endif /* _ARM32_FRAME_H_ */
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/* End of frame.h */
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