NetBSD/sys/dev/mii/mii_bitbang.h
msaitoh a5cdd4b441 Change MII PHY read/write API from:
int (*mii_readreg_t)(device_t, int, int);
	void (*mii_writereg_t)(device_t, int, int, int);
to:

	int (*mii_readreg_t)(device_t, int, int, uint16_t *);
	int (*mii_writereg_t)(device_t, int, int, uint16_t);

Now we can test if a read/write operation failed or not by the return value.

 In 802.3 spec says that the PHY shall not respond to read/write transaction
to the unimplemented register(22.2.4.3). Detecting timeout can be used to
check whether a register is implemented or not (if the register conforms to
the spec). ukphy(4) can be used this for MII_MMDACR and MII_MMDAADR.

 Note that I noticed that the following code do infinite loop in the
read/wirte function. If it accesses unimplemented PHY register, it will hang.
It should be fixed:

	arm/at91/at91emac.c
	arm/ep93xx/epe.c
	arm/omap/omapl1x_emac.c
	mips/ralink/ralink_eth.c
	arch/powerpc/booke/dev/pq3etsec.c(read)
	dev/cadence/if_cemac.c <- hkenken
	dev/ic/lan9118.c


Tested with the following device:

	axe+ukphy
	axe+rgephy
	axen+rgephy	(tested by Andrius V)
	wm+atphy
	wm+ukphy
	wm+igphy
	wm+ihphy
	wm+makphy
	sk+makphy
	sk+brgphy
	sk+gentbi
	msk+makphy
	sip+icsphy
	sip+ukphy
	re+rgephy
	bge+brgphy
	bnx+brgphy
	gsip+gphyter
	rtk+rlphy
	fxp+inphy	(tested by Andrius V)
	tlp+acphy
	ex+exphy
	epic+qsphy
	vge+ciphy	(tested by Andrius V)
	vr+ukphy	(tested by Andrius V)
	vte+ukphy	(tested by Andrius V)

Not tested (MAC):
	arm:at91emac
	arm:cemac
	arm:epe
	arm:geminigmac
	arm:enet
	arm:cpsw
	arm:emac(omac)
	arm:emac(sunxi)
	arm:npe
	evbppc:temac
	macppc:bm
	macppc:gm
	mips:aumac
	mips:ae
	mips:cnmac
	mips:reth
	mips:sbmac
	playstation2:smap
	powerpc:tsec
	powerpc:emac(ibm4xx)
	sgimips:mec
	sparc:be
	sf
	ne(ax88190, dl10019)
	awge
	ep
	gem
	hme
	smsh
	mtd
	sm
	age
	alc
	ale
	bce
	cas
	et
	jme
	lii
	nfe
	pcn
	ste
	stge
	tl
	xi
	aue
	mue
	smsc
	udav
	url

Not tested (PHY):
	amhphy
	bmtphy
	dmphy
	etphy
	glxtphy
	ikphy
	iophy
	lxtphy
	nsphyter
	pnaphy
	rdcphy
	sqphy
	tlphy
	tqphy
	urlphy
2019-01-22 03:42:24 +00:00

50 lines
2.2 KiB
C

/* $NetBSD: mii_bitbang.h,v 1.7 2019/01/22 03:42:27 msaitoh Exp $ */
/*-
* Copyright (c) 1999 The NetBSD Foundation, Inc.
* All rights reserved.
*
* This code is derived from software contributed to The NetBSD Foundation
* by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
* NASA Ames Research Center.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
*
* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
* POSSIBILITY OF SUCH DAMAGE.
*/
#define MII_BIT_MDO 0 /* data out (host->PHY) */
#define MII_BIT_MDI 1 /* data in (PHY->host) */
#define MII_BIT_MDC 2 /* clock */
#define MII_BIT_DIR_HOST_PHY 3 /* set direction: host->PHY */
#define MII_BIT_DIR_PHY_HOST 4 /* set direction: PHY->host */
#define MII_NBITS 5
struct mii_bitbang_ops {
uint32_t (*mbo_read)(device_t);
void (*mbo_write)(device_t, uint32_t);
uint32_t mbo_bits[MII_NBITS];
};
typedef const struct mii_bitbang_ops *mii_bitbang_ops_t;
int mii_bitbang_readreg(device_t, mii_bitbang_ops_t, int, int, uint16_t *);
int mii_bitbang_writereg(device_t, mii_bitbang_ops_t, int, int, uint16_t);