thorpej de974ff82d Add an internal bus space method alpha_bus_space_translate(), which ... provides a method to translate an address on an I/O bus into a sysBus address, along with acccess method information.		2000-02-25 00:45:04 +00:00
..
a12c.c	Allow rd/line, rd/mult, and wr/inval.	1999-11-04 19:15:22 +00:00
a12c_bus_mem.c	ovbcopy->memmove	1999-03-12 22:56:21 +00:00
a12c_dma.c	…
a12c_pci.c	…
a12creg.h	…
a12cvar.h	…
apecs.c	Allow rd/line, rd/mult, and wr/inval.	1999-11-04 19:15:22 +00:00
apecs_bus_io.c	…
apecs_bus_mem.c	…
apecs_dma.c	vm_offset_t -> {paddr_t,vaddr_t}, vm_size_t -> vsize_t	1998-08-14 16:50:00 +00:00
apecs_pci.c	* sprintf -> snprintf	1999-06-29 17:10:57 +00:00
apecsreg.h	…
apecsvar.h	…
cia.c	Don't force BWX on Pyxis by default; it's just not reliable enough.	2000-02-09 01:39:20 +00:00
cia_bwx_bus_io.c	CIA core logic with BWX enabled appears on both EV56 and PCA56. We	1999-12-02 19:43:25 +00:00
cia_bwx_bus_mem.c	CIA core logic with BWX enabled appears on both EV56 and PCA56. We	1999-12-02 19:43:25 +00:00
cia_dma.c	If we have a Pyxis with the DMA page crossing bug, don't allow coalescing	2000-02-06 01:26:50 +00:00
cia_pci.c	* sprintf -> snprintf	1999-06-29 17:10:57 +00:00
cia_swiz_bus_io.c	…
cia_swiz_bus_mem.c	…
ciareg.h	Define a REGVAL64() for some Pyxis registers.	1998-06-06 20:40:14 +00:00
ciavar.h	Don't do rd/line, rd/mult, or wr/inval on the buggy Miata 1's.	1999-11-04 19:11:51 +00:00
dwlpx.c	Allow rd/line, rd/mult, and wr/inval.	1999-11-04 19:15:22 +00:00
dwlpx_bus_io.c	…
dwlpx_bus_mem.c	…
dwlpx_dma.c	Fix garbled words in copyright statement.	1999-04-06 19:26:32 +00:00
dwlpx_pci.c	…
dwlpxreg.h	…
dwlpxvar.h	…
lca.c	Allow rd/line, rd/mult, and wr/inval.	1999-11-04 19:15:22 +00:00
lca_bus_io.c	…
lca_bus_mem.c	…
lca_dma.c	vm_offset_t -> {paddr_t,vaddr_t}, vm_size_t -> vsize_t	1998-08-14 16:50:00 +00:00
lca_pci.c	…
lcareg.h	…
lcavar.h	…
mcpcia.c	Make sure a MCPCIA exists before trying to initialize it. Also make	1999-11-16 18:33:11 +00:00
mcpcia_bus_io.c	CHIP_EX_MALLOC_SAFE() now must pay attention in class.	1999-04-15 22:31:16 +00:00
mcpcia_bus_mem.c	CHIP_EX_MALLOC_SAFE() now must pay attention in class.	1999-04-15 22:31:16 +00:00
mcpcia_dma.c	Fix a silly bug present since rev 1.1; the direct-mapped window is	1999-04-15 23:47:52 +00:00
mcpcia_pci.c	…
mcpciareg.h	Add support for a single statically-allocated MCPCIA configuration structure,	1999-04-15 22:27:40 +00:00
mcpciavar.h	Add SGMAP stuff for Window 2, and rename Window 0's SGMAP stuff to indicate	1999-04-16 02:18:07 +00:00
pci_550.c	Fix printf format problems on Alpha.	1999-02-12 06:25:13 +00:00
pci_550.h	Revert...Jason didn't use Andrew's diffs.	1998-06-05 15:28:40 +00:00
pci_1000.c	Key off NSIO and NPCEB for (E)ISA interrupt support.	1999-12-15 22:30:40 +00:00
pci_1000.h	New platforms: Mikasa and Mikasa/Pinnacle, aka Pinkasa.	1998-06-26 21:45:56 +00:00
pci_1000a.c	Key off NSIO and NPCEB for (E)ISA interrupt support.	1999-12-15 22:31:04 +00:00
pci_1000a.h	Kill off some EVCNT_COUNTERS calls, since [A] it has to be rewritten anyway	1998-06-26 21:59:46 +00:00
pci_2100_a50.c	#include <machine/intrcnt.h>	1998-11-19 02:35:39 +00:00
pci_2100_a50.h	…
pci_6600.c	Support for EV6 Tsunami core logic and system type 6600.	1999-06-29 06:46:46 +00:00
pci_6600.h	Support for EV6 Tsunami core logic and system type 6600.	1999-06-29 06:46:46 +00:00
pci_a12.c	…
pci_a12.h	…
pci_alphabook1.c	#include <machine/intrcnt.h>	1998-11-19 02:35:39 +00:00
pci_alphabook1.h	Very preliminary support for the Tadpole/DEC AlphaBook. These are basically	1998-06-26 05:42:34 +00:00
pci_axppci_33.c	#include <machine/intrcnt.h>	1998-11-19 02:35:39 +00:00
pci_axppci_33.h	…
pci_bwx_bus_io_chipdep.c	Add an internal bus space method alpha_bus_space_translate(), which	2000-02-25 00:45:04 +00:00
pci_bwx_bus_mem_chipdep.c	Add an internal bus space method alpha_bus_space_translate(), which	2000-02-25 00:45:04 +00:00
pci_eb64plus.c	Fix printf format problems on Alpha.	1999-02-12 06:25:13 +00:00
pci_eb64plus.h	…
pci_eb64plus_intr.s	…
pci_eb66.c	Fix printf format problems on Alpha.	1999-02-12 06:25:13 +00:00
pci_eb66.h	Take a stab at EB66 support. An EB66 is basically an EB64+ with a	1998-06-27 10:10:51 +00:00
pci_eb66_intr.s	Take a stab at EB66 support. An EB66 is basically an EB64+ with a	1998-06-27 10:10:51 +00:00
pci_eb164.c	Fix printf format problems on Alpha.	1999-02-12 06:25:13 +00:00
pci_eb164.h	…
pci_eb164_intr.s	…
pci_kn8ae.c	Fix printf format problems on Alpha.	1999-02-12 06:25:13 +00:00
pci_kn8ae.h	…
pci_kn20aa.c	Key off NSIO and NPCEB for (E)ISA interrupt support.	1999-12-15 22:28:15 +00:00
pci_kn20aa.h	…
pci_kn300.c	Reset maxstray count if we get a good interrupt for a level.	2000-02-10 07:45:43 +00:00
pci_kn300.h	…
pci_machdep.c	pull in new PC display headers	1998-05-28 16:59:31 +00:00
pci_sgmap_pte32.c	…
pci_sgmap_pte32.h	…
pci_sgmap_pte64.c	…
pci_sgmap_pte64.h	…
pci_swiz_bus_io_chipdep.c	Add an internal bus space method alpha_bus_space_translate(), which	2000-02-25 00:45:04 +00:00
pci_swiz_bus_mem_chipdep.c	Add an internal bus space method alpha_bus_space_translate(), which	2000-02-25 00:45:04 +00:00
pciide_machdep.c	…
sio.c	recognise the ACER labs M1543 PCI-ISA Bridge in siomatch(). the DS10 now boots!	1999-11-12 22:07:28 +00:00
sio_pic.c	Fix the 16-bytes-of-death bug by generating specific-EOI cycles during	1999-07-30 20:33:43 +00:00
sioreg.h	…
siovar.h	Prototype sio_intr_alloc().	1998-05-23 21:36:33 +00:00
tsc.c	Allow rd/line, rd/mult, and wr/inval.	1999-11-04 19:15:22 +00:00
tsp_bus_io.c	CIA core logic with BWX enabled appears on EV6. We require at least	1999-12-02 19:43:58 +00:00
tsp_bus_mem.c	CIA core logic with BWX enabled appears on EV6. We require at least	1999-12-02 19:43:58 +00:00
tsp_dma.c	Support for EV6 Tsunami core logic and system type 6600.	1999-06-29 06:46:46 +00:00
tsp_pci.c	Support for EV6 Tsunami core logic and system type 6600.	1999-06-29 06:46:46 +00:00
tsreg.h	Support for EV6 Tsunami core logic and system type 6600.	1999-06-29 06:46:46 +00:00
tsvar.h	Support for EV6 Tsunami core logic and system type 6600.	1999-06-29 06:46:46 +00:00