957 lines
22 KiB
C
957 lines
22 KiB
C
/* $NetBSD: zs.c,v 1.15 2000/03/16 02:36:57 eeh Exp $ */
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/*-
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* Copyright (c) 1996 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* This code is derived from software contributed to The NetBSD Foundation
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* by Gordon W. Ross.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Zilog Z8530 Dual UART driver (machine-dependent part)
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*
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* Runs two serial lines per chip using slave drivers.
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* Plain tty/async lines use the zs_async slave.
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* Sun keyboard/mouse uses the zs_kbd/zs_ms slaves.
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*/
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#include "opt_ddb.h"
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <sys/file.h>
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#include <sys/ioctl.h>
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#include <sys/kernel.h>
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#include <sys/proc.h>
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#include <sys/tty.h>
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#include <sys/time.h>
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#include <sys/syslog.h>
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#include <machine/autoconf.h>
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#include <machine/openfirm.h>
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#include <machine/bsd_openprom.h>
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#include <machine/conf.h>
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#include <machine/cpu.h>
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#include <machine/eeprom.h>
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#include <machine/psl.h>
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#include <machine/z8530var.h>
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#include <dev/cons.h>
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#include <dev/ic/z8530reg.h>
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#include <sparc64/sparc64/vaddrs.h>
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#include <sparc64/sparc64/auxreg.h>
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#include <sparc64/dev/cons.h>
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#include "kbd.h" /* NKBD */
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#include "zs.h" /* NZS */
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/* Make life easier for the initialized arrays here. */
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#if NZS < 3
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#undef NZS
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#define NZS 3
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#endif
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/*
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* Some warts needed by z8530tty.c -
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* The default parity REALLY needs to be the same as the PROM uses,
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* or you can not see messages done with printf during boot-up...
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*/
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int zs_def_cflag = (CREAD | CS8 | HUPCL);
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int zs_major = 12;
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/*
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* The Sun provides a 4.9152 MHz clock to the ZS chips.
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*/
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#define PCLK (9600 * 512) /* PCLK pin input clock rate */
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#define ZS_DELAY()
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/* The layout of this is hardware-dependent (padding, order). */
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struct zschan {
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volatile u_char zc_csr; /* ctrl,status, and indirect access */
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u_char zc_xxx0;
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volatile u_char zc_data; /* data */
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u_char zc_xxx1;
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};
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struct zsdevice {
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/* Yes, they are backwards. */
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struct zschan zs_chan_b;
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struct zschan zs_chan_a;
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};
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/* Saved PROM mappings */
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static struct zsdevice *zsaddr[NZS];
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/* Flags from cninit() */
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static int zs_hwflags[NZS][2];
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/* Default speed for each channel */
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static int zs_defspeed[NZS][2] = {
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{ 9600, /* ttya */
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9600 }, /* ttyb */
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{ 1200, /* keyboard */
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1200 }, /* mouse */
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{ 9600, /* ttyc */
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9600 }, /* ttyd */
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};
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static u_char zs_init_reg[16] = {
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0, /* 0: CMD (reset, etc.) */
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0, /* 1: No interrupts yet. */
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0, /* 2: IVECT */
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ZSWR3_RX_8 | ZSWR3_RX_ENABLE,
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ZSWR4_CLK_X16 | ZSWR4_ONESB | ZSWR4_EVENP,
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ZSWR5_TX_8 | ZSWR5_TX_ENABLE,
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0, /* 6: TXSYNC/SYNCLO */
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0, /* 7: RXSYNC/SYNCHI */
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0, /* 8: alias for data port */
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ZSWR9_MASTER_IE | ZSWR9_NO_VECTOR,
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0, /*10: Misc. TX/RX control bits */
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ZSWR11_TXCLK_BAUD | ZSWR11_RXCLK_BAUD,
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((PCLK/32)/9600)-2, /*12: BAUDLO (default=9600) */
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0, /*13: BAUDHI (default=9600) */
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ZSWR14_BAUD_ENA | ZSWR14_BAUD_FROM_PCLK,
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ZSWR15_BREAK_IE,
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};
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struct zschan *
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zs_get_chan_addr(zs_unit, channel)
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int zs_unit, channel;
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{
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struct zsdevice *addr;
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struct zschan *zc;
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if (zs_unit >= NZS)
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return (NULL);
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addr = zsaddr[zs_unit];
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#ifdef DEBUG
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if (addr == NULL) {
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db_printf("zs_get_chan_addr(): unit %d channel %d not found\n", zs_unit, channel);
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Debugger();
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}
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#endif
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if (addr == NULL)
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return (NULL);
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if (channel == 0) {
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zc = &addr->zs_chan_a;
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} else {
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zc = &addr->zs_chan_b;
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}
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return (zc);
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}
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/****************************************************************
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* Autoconfig
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****************************************************************/
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/* Definition of the driver for autoconfig. */
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static int zs_match_sbus __P((struct device *, struct cfdata *, void *));
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static int zs_match_mainbus __P((struct device *, struct cfdata *, void *));
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static int zs_match_obio __P((struct device *, struct cfdata *, void *));
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static void zs_attach_sbus __P((struct device *, struct device *, void *));
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static void zs_attach_mainbus __P((struct device *, struct device *, void *));
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static void zs_attach_obio __P((struct device *, struct device *, void *));
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static void zs_attach __P((struct zsc_softc *, int));
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static int zs_print __P((void *, const char *name));
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struct cfattach zs_ca = {
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sizeof(struct zsc_softc), zs_match_sbus, zs_attach_sbus
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};
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struct cfattach zs_mainbus_ca = {
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sizeof(struct zsc_softc), zs_match_mainbus, zs_attach_mainbus
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};
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struct cfattach zs_obio_ca = {
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sizeof(struct zsc_softc), zs_match_obio, zs_attach_obio
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};
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extern struct cfdriver zs_cd;
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extern struct consdev consdev_kd;
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extern struct consdev consdev_zs;
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extern struct consdev *cn_hw;
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extern int stdinnode;
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extern int fbnode;
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/* Interrupt handlers. */
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static int zshard __P((void *));
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static int zssoft __P((void *));
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static struct intrhand levelsoft = { zssoft };
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static int zs_get_speed __P((struct zs_chanstate *));
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/*
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* Is the zs chip present?
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*/
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static int
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zs_match_mainbus(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct mainbus_attach_args *ma = aux;
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if (strcmp(cf->cf_driver->cd_name, ma->ma_name) != 0)
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return (0);
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return (getpropint(ma->ma_node, "slave", -2) == cf->cf_unit);
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}
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static int
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zs_match_sbus(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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struct sbus_attach_args *sa = aux;
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if (strcmp(cf->cf_driver->cd_name, sa->sa_name) != 0)
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return (0);
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return 1;
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}
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static int
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zs_match_obio(parent, cf, aux)
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struct device *parent;
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struct cfdata *cf;
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void *aux;
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{
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#ifdef SUN4U
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return 0;
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#else
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union obio_attach_args *uoba = aux;
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struct obio4_attach_args *oba;
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if (uoba->uoba_isobio4 == 0) {
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struct sbus_attach_args *sa = &uoba->uoba_sbus;
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if (strcmp(cf->cf_driver->cd_name, sa->sa_name) != 0)
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return (0);
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return (getpropint(sa->sa_node, "slave", -2) == cf->cf_unit);
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}
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oba = &uoba->uoba_oba4;
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return (bus_space_probe(oba->oba_bustag, 0, oba->oba_paddr,
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1, 0, 0, NULL, NULL));
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#endif
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}
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static void
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zs_attach_mainbus(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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#ifdef SUN4U
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return;
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#else
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struct zsc_softc *zsc = (void *) self;
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struct mainbus_attach_args *ma = aux;
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int zs_unit = zsc->zsc_dev.dv_unit;
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zsc->zsc_bustag = ma->ma_bustag;
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zsc->zsc_dmatag = ma->ma_dmatag;
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/* Use the mapping setup by the Sun PROM. */
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if (zsaddr[zs_unit] == NULL)
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zsaddr[zs_unit] = findzs(zs_unit);
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if ((void*)zsaddr[zs_unit] != (void*)(u_long)ma->ma_address[0])
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panic("zsattach_mainbus");
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zs_attach(zsc, ma->ma_pri);
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#endif
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}
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static void
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zs_attach_sbus(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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struct zsc_softc *zsc = (void *) self;
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struct sbus_attach_args *sa = aux;
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int zs_unit = zsc->zsc_dev.dv_unit;
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struct consdev *cn = NULL;
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zsc->zsc_bustag = sa->sa_bustag;
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zsc->zsc_dmatag = sa->sa_dmatag;
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/* Use the mapping setup by the Sun PROM. */
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if (zsaddr[zs_unit] == NULL) {
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if (sa->sa_npromvaddrs) {
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/*
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* We're converting from a 32-bit pointer to a 64-bit
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* pointer. Since the 32-bit entity is negative, but
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* the kernel is still mapped into the lower 4GB
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* range, this needs to be zero-extended.
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*
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* XXXXX If we map the kernel and devices into the
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* high 4GB range, this needs to be changed to
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* sign-extend the address.
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*/
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zsaddr[zs_unit] =
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(struct zsdevice *)
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(unsigned long)sa->sa_promvaddrs[0];
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} else {
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bus_space_handle_t kvaddr;
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if (sbus_bus_map(sa->sa_bustag, sa->sa_slot,
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sa->sa_offset,
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sa->sa_size,
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BUS_SPACE_MAP_LINEAR,
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0, &kvaddr) != 0) {
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printf("%s @ sbus: cannot map registers\n",
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self->dv_xname);
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return;
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}
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zsaddr[zs_unit] = (struct zsdevice *)
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(long)kvaddr;
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}
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}
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/*
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* Check to see if we're the console. We presume the input comes from
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* the same location as the output, although that may not be true.
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* To support input from the serial line but output to a display we
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* would need to generate some really weird consdev vectors.
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*/
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if (sa->sa_node == stdinnode) {
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char buf[256];
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int chan = 0;
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int len;
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if ((len = OF_instance_to_path(sa->sa_node, buf, sizeof(buf))) > 0) {
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/* With zs nodes, the last :a or :b selects the channel */
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if (buf[len] == 0) len--;
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if (buf[len] == 'b') chan = 1;
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/* But keyboards don't have a :a or :b */
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}
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zs_hwflags[zs_unit][chan] = ZS_HWFLAG_CONSOLE;
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zs_conschan = zs_get_chan_addr(zs_unit, chan);
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if (OF_getproplen(sa->sa_node, "keyboard") >= 0) {
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cn_hw = &consdev_zs;
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cn = &consdev_kd;
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} else {
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cn = &consdev_zs;
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}
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}
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zs_attach(zsc, sa->sa_pri);
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if (cn) {
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cn_tab = cn;
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(*cn->cn_init)(cn);
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#ifdef KGDB
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zs_kgdb_init();
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#endif
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}
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}
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static void
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zs_attach_obio(parent, self, aux)
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struct device *parent;
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struct device *self;
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void *aux;
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{
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#ifndef SUN4U
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struct zsc_softc *zsc = (void *) self;
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union obio_attach_args *uoba = aux;
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int zs_unit = zsc->zsc_dev.dv_unit;
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/* Use the mapping setup by the Sun PROM. */
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if (zsaddr[zs_unit] == NULL)
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zsaddr[zs_unit] = findzs(zs_unit);
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if (uoba->uoba_isobio4 == 0) {
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struct sbus_attach_args *sa = &uoba->uoba_sbus;
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zsc->zsc_bustag = sa->sa_bustag;
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zsc->zsc_dmatag = sa->sa_dmatag;
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zs_attach(zsc, sa->sa_pri);
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} else {
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struct obio4_attach_args *oba = &uoba->uoba_oba4;
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zsc->zsc_bustag = oba->oba_bustag;
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zsc->zsc_dmatag = oba->oba_dmatag;
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zs_attach(zsc, oba->oba_pri);
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}
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#endif
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}
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/*
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* Attach a found zs.
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*
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* USE ROM PROPERTIES port-a-ignore-cd AND port-b-ignore-cd FOR
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* SOFT CARRIER, AND keyboard PROPERTY FOR KEYBOARD/MOUSE?
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*/
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static void
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zs_attach(zsc, pri)
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struct zsc_softc *zsc;
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int pri;
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{
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struct zsc_attach_args zsc_args;
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volatile struct zschan *zc;
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struct zs_chanstate *cs;
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int s, zs_unit, channel;
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static int didintr, prevpri;
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printf(" softpri %d\n", PIL_TTY);
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/*
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* Initialize software state for each channel.
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*/
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zs_unit = zsc->zsc_dev.dv_unit;
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for (channel = 0; channel < 2; channel++) {
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zsc_args.channel = channel;
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zsc_args.hwflags = zs_hwflags[zs_unit][channel];
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cs = &zsc->zsc_cs_store[channel];
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zsc->zsc_cs[channel] = cs;
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cs->cs_channel = channel;
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cs->cs_private = NULL;
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cs->cs_ops = &zsops_null;
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cs->cs_brg_clk = PCLK / 16;
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zc = zs_get_chan_addr(zs_unit, channel);
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if (zs_hwflags[zs_unit][channel] == ZS_HWFLAG_CONSOLE) {
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zs_conschan = (struct zschan *)zc;
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}
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cs->cs_reg_csr = &zc->zc_csr;
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cs->cs_reg_data = &zc->zc_data;
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bcopy(zs_init_reg, cs->cs_creg, 16);
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bcopy(zs_init_reg, cs->cs_preg, 16);
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/* XXX: Get these from the PROM properties! */
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/* XXX: See the mvme167 code. Better. */
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if (zsc_args.hwflags & ZS_HWFLAG_CONSOLE)
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cs->cs_defspeed = zs_get_speed(cs);
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else
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cs->cs_defspeed = zs_defspeed[zs_unit][channel];
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cs->cs_defcflag = zs_def_cflag;
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/* Make these correspond to cs_defcflag (-crtscts) */
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cs->cs_rr0_dcd = ZSRR0_DCD;
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cs->cs_rr0_cts = 0;
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cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
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cs->cs_wr5_rts = 0;
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/*
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* Clear the master interrupt enable.
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* The INTENA is common to both channels,
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* so just do it on the A channel.
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*/
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if (channel == 0) {
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zs_write_reg(cs, 9, 0);
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}
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/*
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* Look for a child driver for this channel.
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* The child attach will setup the hardware.
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*/
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if (!config_found(&zsc->zsc_dev, (void *)&zsc_args, zs_print)) {
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/* No sub-driver. Just reset it. */
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u_char reset = (channel == 0) ?
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ZSWR9_A_RESET : ZSWR9_B_RESET;
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s = splzs();
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zs_write_reg(cs, 9, reset);
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splx(s);
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}
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}
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|
|
/*
|
|
* Now safe to install interrupt handlers. Note the arguments
|
|
* to the interrupt handlers aren't used. Note, we only do this
|
|
* once since both SCCs interrupt at the same level and vector.
|
|
*/
|
|
if (!didintr) {
|
|
didintr = 1;
|
|
prevpri = pri;
|
|
bus_intr_establish(zsc->zsc_bustag, pri, 0, zshard, NULL);
|
|
intr_establish(PIL_TTY, &levelsoft);
|
|
} else if (pri != prevpri)
|
|
panic("broken zs interrupt scheme");
|
|
|
|
evcnt_attach(&zsc->zsc_dev, "intr", &zsc->zsc_intrcnt);
|
|
|
|
/*
|
|
* Set the master interrupt enable and interrupt vector.
|
|
* (common to both channels, do it on A)
|
|
*/
|
|
cs = zsc->zsc_cs[0];
|
|
s = splhigh();
|
|
/* interrupt vector */
|
|
zs_write_reg(cs, 2, zs_init_reg[2]);
|
|
/* master interrupt control (enable) */
|
|
zs_write_reg(cs, 9, zs_init_reg[9]);
|
|
splx(s);
|
|
|
|
#if 0
|
|
/*
|
|
* XXX: L1A hack - We would like to be able to break into
|
|
* the debugger during the rest of autoconfiguration, so
|
|
* lower interrupts just enough to let zs interrupts in.
|
|
* This is done after both zs devices are attached.
|
|
*/
|
|
if (zs_unit == 1) {
|
|
printf("zs1: enabling zs interrupts\n");
|
|
(void)splfd(); /* XXX: splzs - 1 */
|
|
}
|
|
#endif
|
|
}
|
|
|
|
static int
|
|
zs_print(aux, name)
|
|
void *aux;
|
|
const char *name;
|
|
{
|
|
struct zsc_attach_args *args = aux;
|
|
|
|
if (name != NULL)
|
|
printf("%s: ", name);
|
|
|
|
if (args->channel != -1)
|
|
printf(" channel %d", args->channel);
|
|
|
|
return (UNCONF);
|
|
}
|
|
|
|
static volatile int zssoftpending;
|
|
|
|
/*
|
|
* Our ZS chips all share a common, autovectored interrupt,
|
|
* so we have to look at all of them on each interrupt.
|
|
*/
|
|
static int
|
|
zshard(arg)
|
|
void *arg;
|
|
{
|
|
register struct zsc_softc *zsc;
|
|
register int unit, rr3, rval, softreq;
|
|
|
|
rval = softreq = 0;
|
|
for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
|
|
zsc = zs_cd.cd_devs[unit];
|
|
if (zsc == NULL)
|
|
continue;
|
|
rr3 = zsc_intr_hard(zsc);
|
|
/* Count up the interrupts. */
|
|
if (rr3) {
|
|
rval |= rr3;
|
|
zsc->zsc_intrcnt.ev_count++;
|
|
}
|
|
softreq |= zsc->zsc_cs[0]->cs_softreq;
|
|
softreq |= zsc->zsc_cs[1]->cs_softreq;
|
|
}
|
|
|
|
/* We are at splzs here, so no need to lock. */
|
|
if (softreq && (zssoftpending == 0)) {
|
|
zssoftpending = PIL_TTY;
|
|
send_softint(-1, PIL_TTY, &levelsoft);
|
|
}
|
|
return (rval);
|
|
}
|
|
|
|
/*
|
|
* Similar scheme as for zshard (look at all of them)
|
|
*/
|
|
static int
|
|
zssoft(arg)
|
|
void *arg;
|
|
{
|
|
register struct zsc_softc *zsc;
|
|
register int s, unit;
|
|
|
|
/* This is not the only ISR on this IPL. */
|
|
if (zssoftpending == 0)
|
|
return (0);
|
|
zssoftpending = 0;
|
|
|
|
/* Make sure we call the tty layer at spltty. */
|
|
s = spltty();
|
|
for (unit = 0; unit < zs_cd.cd_ndevs; unit++) {
|
|
zsc = zs_cd.cd_devs[unit];
|
|
if (zsc == NULL)
|
|
continue;
|
|
(void)zsc_intr_soft(zsc);
|
|
#ifdef TTY_DEBUG
|
|
{
|
|
struct zstty_softc *zst0 = zsc->zsc_cs[0]->cs_private;
|
|
struct zstty_softc *zst1 = zsc->zsc_cs[1]->cs_private;
|
|
if (zst0->zst_overflows || zst1->zst_overflows ) {
|
|
struct trapframe *frame = (struct trapframe *)arg;
|
|
|
|
printf("zs silo overflow from %p\n",
|
|
(long)frame->tf_pc);
|
|
}
|
|
}
|
|
#endif
|
|
}
|
|
splx(s);
|
|
return (1);
|
|
}
|
|
|
|
|
|
/*
|
|
* Compute the current baud rate given a ZS channel.
|
|
*/
|
|
static int
|
|
zs_get_speed(cs)
|
|
struct zs_chanstate *cs;
|
|
{
|
|
int tconst;
|
|
|
|
tconst = zs_read_reg(cs, 12);
|
|
tconst |= zs_read_reg(cs, 13) << 8;
|
|
return (TCONST_TO_BPS(cs->cs_brg_clk, tconst));
|
|
}
|
|
|
|
/*
|
|
* MD functions for setting the baud rate and control modes.
|
|
*/
|
|
int
|
|
zs_set_speed(cs, bps)
|
|
struct zs_chanstate *cs;
|
|
int bps; /* bits per second */
|
|
{
|
|
int tconst, real_bps;
|
|
|
|
if (bps == 0)
|
|
return (0);
|
|
|
|
#ifdef DIAGNOSTIC
|
|
if (cs->cs_brg_clk == 0)
|
|
panic("zs_set_speed");
|
|
#endif
|
|
|
|
tconst = BPS_TO_TCONST(cs->cs_brg_clk, bps);
|
|
if (tconst < 0)
|
|
return (EINVAL);
|
|
|
|
/* Convert back to make sure we can do it. */
|
|
real_bps = TCONST_TO_BPS(cs->cs_brg_clk, tconst);
|
|
|
|
/* XXX - Allow some tolerance here? */
|
|
if (real_bps != bps)
|
|
return (EINVAL);
|
|
|
|
cs->cs_preg[12] = tconst;
|
|
cs->cs_preg[13] = tconst >> 8;
|
|
|
|
/* Caller will stuff the pending registers. */
|
|
return (0);
|
|
}
|
|
|
|
int
|
|
zs_set_modes(cs, cflag)
|
|
struct zs_chanstate *cs;
|
|
int cflag; /* bits per second */
|
|
{
|
|
int s;
|
|
|
|
/*
|
|
* Output hardware flow control on the chip is horrendous:
|
|
* if carrier detect drops, the receiver is disabled, and if
|
|
* CTS drops, the transmitter is stoped IN MID CHARACTER!
|
|
* Therefore, NEVER set the HFC bit, and instead use the
|
|
* status interrupt to detect CTS changes.
|
|
*/
|
|
s = splzs();
|
|
cs->cs_rr0_pps = 0;
|
|
if ((cflag & (CLOCAL | MDMBUF)) != 0) {
|
|
cs->cs_rr0_dcd = 0;
|
|
if ((cflag & MDMBUF) == 0)
|
|
cs->cs_rr0_pps = ZSRR0_DCD;
|
|
} else
|
|
cs->cs_rr0_dcd = ZSRR0_DCD;
|
|
if ((cflag & CRTSCTS) != 0) {
|
|
cs->cs_wr5_dtr = ZSWR5_DTR;
|
|
cs->cs_wr5_rts = ZSWR5_RTS;
|
|
cs->cs_rr0_cts = ZSRR0_CTS;
|
|
} else if ((cflag & CDTRCTS) != 0) {
|
|
cs->cs_wr5_dtr = 0;
|
|
cs->cs_wr5_rts = ZSWR5_DTR;
|
|
cs->cs_rr0_cts = ZSRR0_CTS;
|
|
} else if ((cflag & MDMBUF) != 0) {
|
|
cs->cs_wr5_dtr = 0;
|
|
cs->cs_wr5_rts = ZSWR5_DTR;
|
|
cs->cs_rr0_cts = ZSRR0_DCD;
|
|
} else {
|
|
cs->cs_wr5_dtr = ZSWR5_DTR | ZSWR5_RTS;
|
|
cs->cs_wr5_rts = 0;
|
|
cs->cs_rr0_cts = 0;
|
|
}
|
|
splx(s);
|
|
|
|
/* Caller will stuff the pending registers. */
|
|
return (0);
|
|
}
|
|
|
|
|
|
/*
|
|
* Read or write the chip with suitable delays.
|
|
*/
|
|
|
|
u_char
|
|
zs_read_reg(cs, reg)
|
|
struct zs_chanstate *cs;
|
|
u_char reg;
|
|
{
|
|
u_char val;
|
|
|
|
*cs->cs_reg_csr = reg;
|
|
ZS_DELAY();
|
|
val = *cs->cs_reg_csr;
|
|
ZS_DELAY();
|
|
return (val);
|
|
}
|
|
|
|
void
|
|
zs_write_reg(cs, reg, val)
|
|
struct zs_chanstate *cs;
|
|
u_char reg, val;
|
|
{
|
|
*cs->cs_reg_csr = reg;
|
|
ZS_DELAY();
|
|
*cs->cs_reg_csr = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
u_char
|
|
zs_read_csr(cs)
|
|
struct zs_chanstate *cs;
|
|
{
|
|
register u_char val;
|
|
|
|
val = *cs->cs_reg_csr;
|
|
ZS_DELAY();
|
|
return (val);
|
|
}
|
|
|
|
void zs_write_csr(cs, val)
|
|
struct zs_chanstate *cs;
|
|
u_char val;
|
|
{
|
|
*cs->cs_reg_csr = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
u_char zs_read_data(cs)
|
|
struct zs_chanstate *cs;
|
|
{
|
|
register u_char val;
|
|
|
|
val = *cs->cs_reg_data;
|
|
ZS_DELAY();
|
|
return (val);
|
|
}
|
|
|
|
void zs_write_data(cs, val)
|
|
struct zs_chanstate *cs;
|
|
u_char val;
|
|
{
|
|
*cs->cs_reg_data = val;
|
|
ZS_DELAY();
|
|
}
|
|
|
|
/****************************************************************
|
|
* Console support functions (Sun specific!)
|
|
* Note: this code is allowed to know about the layout of
|
|
* the chip registers, and uses that to keep things simple.
|
|
* XXX - I think I like the mvme167 code better. -gwr
|
|
****************************************************************/
|
|
|
|
extern void Debugger __P((void));
|
|
void *zs_conschan;
|
|
|
|
/*
|
|
* Handle user request to enter kernel debugger.
|
|
*/
|
|
void
|
|
zs_abort(cs)
|
|
struct zs_chanstate *cs;
|
|
{
|
|
register volatile struct zschan *zc = zs_conschan;
|
|
int rr0;
|
|
|
|
/* Wait for end of break to avoid PROM abort. */
|
|
/* XXX - Limit the wait? */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while (rr0 & ZSRR0_BREAK);
|
|
|
|
#if defined(KGDB)
|
|
zskgdb(cs);
|
|
#elif defined(DDB)
|
|
{
|
|
extern int db_active;
|
|
|
|
if (!db_active)
|
|
Debugger();
|
|
else
|
|
/* Debugger is probably hozed */
|
|
callrom();
|
|
}
|
|
#else
|
|
printf("stopping on keyboard abort\n");
|
|
callrom();
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Polled input char.
|
|
*/
|
|
int
|
|
zs_getc(arg)
|
|
void *arg;
|
|
{
|
|
register volatile struct zschan *zc = arg;
|
|
register int s, c, rr0;
|
|
|
|
s = splhigh();
|
|
/* Wait for a character to arrive. */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while ((rr0 & ZSRR0_RX_READY) == 0);
|
|
|
|
c = zc->zc_data;
|
|
ZS_DELAY();
|
|
splx(s);
|
|
|
|
/*
|
|
* This is used by the kd driver to read scan codes,
|
|
* so don't translate '\r' ==> '\n' here...
|
|
*/
|
|
return (c);
|
|
}
|
|
|
|
/*
|
|
* Polled output char.
|
|
*/
|
|
void
|
|
zs_putc(arg, c)
|
|
void *arg;
|
|
int c;
|
|
{
|
|
register volatile struct zschan *zc = arg;
|
|
register int s, rr0;
|
|
|
|
s = splhigh();
|
|
|
|
/* Wait for transmitter to become ready. */
|
|
do {
|
|
rr0 = zc->zc_csr;
|
|
ZS_DELAY();
|
|
} while ((rr0 & ZSRR0_TX_READY) == 0);
|
|
|
|
/*
|
|
* Send the next character.
|
|
* Now you'd think that this could be followed by a ZS_DELAY()
|
|
* just like all the other chip accesses, but it turns out that
|
|
* the `transmit-ready' interrupt isn't de-asserted until
|
|
* some period of time after the register write completes
|
|
* (more than a couple instructions). So to avoid stray
|
|
* interrupts we put in the 2us delay regardless of cpu model.
|
|
*/
|
|
zc->zc_data = c;
|
|
delay(2);
|
|
|
|
splx(s);
|
|
}
|
|
|
|
/*****************************************************************/
|
|
|
|
static void zscninit __P((struct consdev *));
|
|
static int zscngetc __P((dev_t));
|
|
static void zscnputc __P((dev_t, int));
|
|
static void zscnpollc __P((dev_t, int));
|
|
/*
|
|
* Console table shared by ttya, ttyb
|
|
*/
|
|
struct consdev consdev_zs = {
|
|
nullcnprobe,
|
|
zscninit,
|
|
zscngetc,
|
|
zscnputc,
|
|
zscnpollc,
|
|
NULL,
|
|
};
|
|
|
|
static void
|
|
zscninit(cn)
|
|
struct consdev *cn;
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Polled console input putchar.
|
|
*/
|
|
static int
|
|
zscngetc(dev)
|
|
dev_t dev;
|
|
{
|
|
return (zs_getc(zs_conschan));
|
|
}
|
|
|
|
/*
|
|
* Polled console output putchar.
|
|
*/
|
|
static void
|
|
zscnputc(dev, c)
|
|
dev_t dev;
|
|
int c;
|
|
{
|
|
zs_putc(zs_conschan, c);
|
|
}
|
|
|
|
int swallow_zsintrs;
|
|
|
|
static void
|
|
zscnpollc(dev, on)
|
|
dev_t dev;
|
|
int on;
|
|
{
|
|
/*
|
|
* Need to tell zs driver to acknowledge all interrupts or we get
|
|
* annoying spurious interrupt messages. This is because mucking
|
|
* with spl() levels during polling does not prevent interrupts from
|
|
* being generated.
|
|
*/
|
|
|
|
if (on) swallow_zsintrs++;
|
|
else swallow_zsintrs--;
|
|
}
|