1114 lines
27 KiB
C
1114 lines
27 KiB
C
/* tc-a29k.c -- Assemble for the AMD 29000.
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Copyright (C) 1989, 1990, 1991, 1992 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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GAS is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2, or (at your option)
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any later version.
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GAS is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with GAS; see the file COPYING. If not, write to
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the Free Software Foundation, 675 Mass Ave, Cambridge, MA 02139, USA. */
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/* John Gilmore has reorganized this module somewhat, to make it easier
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to convert it to new machines' assemblers as desired. There was too
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much bloody rewriting required before. There still probably is. */
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#include "as.h"
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#include "opcode/a29k.h"
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/* Make it easier to clone this machine desc into another one. */
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#define machine_opcode a29k_opcode
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#define machine_opcodes a29k_opcodes
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#define machine_ip a29k_ip
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#define machine_it a29k_it
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const relax_typeS md_relax_table[] = { 0 };
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#define IMMEDIATE_BIT 0x01000000 /* Turns RB into Immediate */
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#define ABSOLUTE_BIT 0x01000000 /* Turns PC-relative to Absolute */
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#define CE_BIT 0x00800000 /* Coprocessor enable in LOAD */
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#define UI_BIT 0x00000080 /* Unsigned integer in CONVERT */
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/* handle of the OPCODE hash table */
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static struct hash_control *op_hash = NULL;
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struct machine_it {
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char *error;
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unsigned long opcode;
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struct nlist *nlistp;
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expressionS exp;
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int pcrel;
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int reloc_offset; /* Offset of reloc within insn */
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enum reloc_type reloc;
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} the_insn;
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#if __STDC__ == 1
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/* static int getExpression(char *str); */
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static void machine_ip(char *str);
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/* static void print_insn(struct machine_it *insn); */
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static void s_data1(void);
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static void s_use(void);
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#else /* not __STDC__ */
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/* static int getExpression(); */
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static void machine_ip();
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/* static void print_insn(); */
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static void s_data1();
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static void s_use();
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#endif /* not __STDC__ */
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const pseudo_typeS
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md_pseudo_table[] = {
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{ "align", s_align_bytes, 4 },
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{ "block", s_space, 0 },
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{ "cputype", s_ignore, 0 }, /* CPU as 29000 or 29050 */
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{ "reg", s_lsym, 0 }, /* Register equate, same as equ */
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{ "space", s_ignore, 0 }, /* Listing control */
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{ "sect", s_ignore, 0 }, /* Creation of coff sections */
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{ "use", s_use, 0 },
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{ "word", cons, 4 },
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{ NULL, 0, 0 },
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};
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int md_short_jump_size = 4;
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int md_long_jump_size = 4;
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#if defined(BFD_HEADERS)
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#ifdef RELSZ
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const int md_reloc_size = RELSZ; /* Coff headers */
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#else
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const int md_reloc_size = 12; /* something else headers */
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#endif
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#else
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const int md_reloc_size = 12; /* Not bfdized*/
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#endif
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/* This array holds the chars that always start a comment. If the
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pre-processor is disabled, these aren't very useful */
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char comment_chars[] = ";";
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/* This array holds the chars that only start a comment at the beginning of
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a line. If the line seems to have the form '# 123 filename'
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.line and .file directives will appear in the pre-processed output */
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/* Note that input_file.c hand checks for '#' at the beginning of the
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first line of the input file. This is because the compiler outputs
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#NO_APP at the beginning of its output. */
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/* Also note that comments like this one will always work */
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char line_comment_chars[] = "#";
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/* We needed an unused char for line separation to work around the
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lack of macros, using sed and such. */
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char line_separator_chars[] = "@";
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/* Chars that can be used to separate mant from exp in floating point nums */
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char EXP_CHARS[] = "eE";
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/* Chars that mean this number is a floating point constant */
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/* As in 0f12.456 */
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/* or 0d1.2345e12 */
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char FLT_CHARS[] = "rRsSfFdDxXpP";
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/* Also be aware that MAXIMUM_NUMBER_OF_CHARS_FOR_FLOAT may have to be
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changed in read.c. Ideally it shouldn't have to know about it at all,
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but nothing is ideal around here.
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*/
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static unsigned char octal[256];
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#define isoctal(c) octal[c]
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static unsigned char toHex[256];
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/*
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* anull bit - causes the branch delay slot instructions to not be executed
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*/
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#define ANNUL (1 << 29)
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static void
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s_use()
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{
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if (strncmp(input_line_pointer, ".text", 5) == 0) {
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input_line_pointer += 5;
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s_text();
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return;
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}
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if (strncmp(input_line_pointer, ".data", 5) == 0) {
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input_line_pointer += 5;
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s_data();
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return;
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}
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if (strncmp(input_line_pointer, ".data1", 6) == 0) {
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input_line_pointer += 6;
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s_data1();
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return;
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}
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/* Literals can't go in the text segment because you can't read
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from instruction memory on some 29k's. So, into initialized data. */
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if (strncmp(input_line_pointer, ".lit", 4) == 0) {
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input_line_pointer += 4;
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subseg_new(SEG_DATA, 200);
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demand_empty_rest_of_line();
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return;
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}
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as_bad("Unknown segment type");
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demand_empty_rest_of_line();
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return;
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}
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static void
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s_data1()
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{
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subseg_new(SEG_DATA, 1);
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demand_empty_rest_of_line();
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return;
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}
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/* Install symbol definition that maps REGNAME to REGNO.
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FIXME-SOON: These are not recognized in mixed case. */
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static void
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insert_sreg (regname, regnum)
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char *regname;
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int regnum;
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{
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/* FIXME-SOON, put something in these syms so they won't be output to the symbol
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table of the resulting object file. */
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/* Must be large enough to hold the names of the special registers. */
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char buf[80];
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int i;
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symbol_table_insert(symbol_new(regname, SEG_REGISTER, regnum, &zero_address_frag));
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for (i = 0; regname[i]; i++)
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buf[i] = islower (regname[i]) ? toupper (regname[i]) : regname[i];
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buf[i] = '\0';
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symbol_table_insert(symbol_new(buf, SEG_REGISTER, regnum, &zero_address_frag));
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} /* insert_sreg() */
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/* Install symbol definitions for assorted special registers.
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See ASM29K Ref page 2-9. */
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void define_some_regs() {
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#define SREG 256
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/* Protected special-purpose register names */
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insert_sreg ("vab", SREG+0);
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insert_sreg ("ops", SREG+1);
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insert_sreg ("cps", SREG+2);
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insert_sreg ("cfg", SREG+3);
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insert_sreg ("cha", SREG+4);
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insert_sreg ("chd", SREG+5);
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insert_sreg ("chc", SREG+6);
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insert_sreg ("rbp", SREG+7);
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insert_sreg ("tmc", SREG+8);
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insert_sreg ("tmr", SREG+9);
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insert_sreg ("pc0", SREG+10);
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insert_sreg ("pc1", SREG+11);
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insert_sreg ("pc2", SREG+12);
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insert_sreg ("mmu", SREG+13);
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insert_sreg ("lru", SREG+14);
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/* Unprotected special-purpose register names */
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insert_sreg ("ipc", SREG+128);
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insert_sreg ("ipa", SREG+129);
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insert_sreg ("ipb", SREG+130);
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insert_sreg ("q", SREG+131);
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insert_sreg ("alu", SREG+132);
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insert_sreg ("bp", SREG+133);
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insert_sreg ("fc", SREG+134);
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insert_sreg ("cr", SREG+135);
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insert_sreg ("fpe", SREG+160);
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insert_sreg ("inte",SREG+161);
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insert_sreg ("fps", SREG+162);
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/* "", SREG+163); Reserved */
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insert_sreg ("exop",SREG+164);
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} /* define_some_regs() */
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/* This function is called once, at assembler startup time. It should
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set up all the tables, etc. that the MD part of the assembler will need. */
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void
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md_begin()
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{
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register char *retval = NULL;
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int lose = 0;
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register int skipnext = 0;
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register unsigned int i;
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register char *strend, *strend2;
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/* Hash up all the opcodes for fast use later. */
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op_hash = hash_new();
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if (op_hash == NULL)
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as_fatal("Virtual memory exhausted");
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for (i = 0; i < num_opcodes; i++)
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{
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const char *name = machine_opcodes[i].name;
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if (skipnext) {
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skipnext = 0;
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continue;
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}
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/* Hack to avoid multiple opcode entries. We pre-locate all the
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variations (b/i field and P/A field) and handle them. */
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if (!strcmp (name, machine_opcodes[i+1].name)) {
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if ((machine_opcodes[i].opcode ^ machine_opcodes[i+1].opcode)
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!= 0x01000000)
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goto bad_table;
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strend = machine_opcodes[i ].args+strlen(machine_opcodes[i ].args)-1;
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strend2 = machine_opcodes[i+1].args+strlen(machine_opcodes[i+1].args)-1;
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switch (*strend) {
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case 'b':
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if (*strend2 != 'i') goto bad_table;
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break;
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case 'i':
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if (*strend2 != 'b') goto bad_table;
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break;
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case 'P':
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if (*strend2 != 'A') goto bad_table;
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break;
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case 'A':
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if (*strend2 != 'P') goto bad_table;
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break;
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default:
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bad_table:
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fprintf (stderr, "internal error: can't handle opcode %s\n", name);
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lose = 1;
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}
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/* OK, this is an i/b or A/P pair. We skip the higher-valued one,
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and let the code for operand checking handle OR-ing in the bit. */
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if (machine_opcodes[i].opcode & 1)
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continue;
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else
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skipnext = 1;
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}
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retval = hash_insert (op_hash, name, &machine_opcodes[i]);
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if (retval != NULL && *retval != '\0')
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{
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fprintf (stderr, "internal error: can't hash `%s': %s\n",
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machine_opcodes[i].name, retval);
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lose = 1;
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}
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}
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if (lose)
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as_fatal("Broken assembler. No assembly attempted.");
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for (i = '0'; i < '8'; ++i)
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octal[i] = 1;
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for (i = '0'; i <= '9'; ++i)
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toHex[i] = i - '0';
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for (i = 'a'; i <= 'f'; ++i)
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toHex[i] = i + 10 - 'a';
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for (i = 'A'; i <= 'F'; ++i)
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toHex[i] = i + 10 - 'A';
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define_some_regs ();
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}
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void md_end() {
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return;
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}
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/* Assemble a single instruction. Its label has already been handled
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by the generic front end. We just parse opcode and operands, and
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produce the bytes of data and relocation. */
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void md_assemble(str)
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char *str;
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{
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char *toP;
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/* !!!! int rsd; */
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know(str);
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machine_ip(str);
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toP = frag_more(4);
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/* put out the opcode */
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md_number_to_chars(toP, the_insn.opcode, 4);
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/* put out the symbol-dependent stuff */
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if (the_insn.reloc != NO_RELOC) {
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fix_new(
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frag_now, /* which frag */
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(toP - frag_now->fr_literal + the_insn.reloc_offset), /* where */
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4, /* size */
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the_insn.exp.X_add_symbol,
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the_insn.exp.X_subtract_symbol,
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the_insn.exp.X_add_number,
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the_insn.pcrel,
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the_insn.reloc
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);
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}
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}
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char *
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parse_operand (s, operandp)
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char *s;
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expressionS *operandp;
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{
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char *save = input_line_pointer;
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char *new;
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segT seg;
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input_line_pointer = s;
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seg = expr (0, operandp);
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new = input_line_pointer;
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input_line_pointer = save;
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switch (seg) {
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case SEG_ABSOLUTE:
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case SEG_TEXT:
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case SEG_DATA:
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case SEG_BSS:
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case SEG_UNKNOWN:
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case SEG_DIFFERENCE:
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case SEG_BIG:
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case SEG_REGISTER:
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return new;
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case SEG_ABSENT:
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as_bad("Missing operand");
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return new;
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default:
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as_bad("Don't understand operand of type %s", segment_name (seg));
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return new;
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}
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}
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/* Instruction parsing. Takes a string containing the opcode.
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Operands are at input_line_pointer. Output is in the_insn.
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Warnings or errors are generated. */
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static void
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machine_ip(str)
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char *str;
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{
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char *s;
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const char *args;
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/* !!!! char c; */
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/* !!!! unsigned long i; */
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struct machine_opcode *insn;
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char *argsStart;
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unsigned long opcode;
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/* !!!! unsigned int mask; */
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expressionS the_operand;
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expressionS *operand = &the_operand;
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unsigned int reg;
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/* Must handle `div0' opcode. */
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s = str;
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if (isalpha(*s))
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for (; isalnum(*s); ++s)
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if (isupper (*s))
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*s = tolower (*s);
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switch (*s) {
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case '\0':
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break;
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case ' ': /* FIXME-SOMEDAY more whitespace */
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*s++ = '\0';
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break;
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default:
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as_bad("Unknown opcode: `%s'", str);
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return;
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}
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if ((insn = (struct machine_opcode *) hash_find(op_hash, str)) == NULL) {
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as_bad("Unknown opcode `%s'.", str);
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return;
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}
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argsStart = s;
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opcode = insn->opcode;
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memset(&the_insn, '\0', sizeof(the_insn));
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the_insn.reloc = NO_RELOC;
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/*
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* Build the opcode, checking as we go to make
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* sure that the operands match.
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*
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* If an operand matches, we modify the_insn or opcode appropriately,
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* and do a "continue". If an operand fails to match, we "break".
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*/
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if (insn->args[0] != '\0')
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s = parse_operand (s, operand); /* Prime the pump */
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for (args = insn->args; ; ++args) {
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switch (*args) {
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case '\0': /* end of args */
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if (*s == '\0') {
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/* We are truly done. */
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the_insn.opcode = opcode;
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return;
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}
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as_bad("Too many operands: %s", s);
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break;
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case ',': /* Must match a comma */
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if (*s++ == ',') {
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s = parse_operand (s, operand); /* Parse next opnd */
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continue;
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}
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break;
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case 'v': /* Trap numbers (immediate field) */
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if (operand->X_seg == SEG_ABSOLUTE) {
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if (operand->X_add_number < 256) {
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opcode |= (operand->X_add_number << 16);
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continue;
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} else {
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as_bad("Immediate value of %d is too large",
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operand->X_add_number);
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continue;
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}
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}
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the_insn.reloc = RELOC_8;
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the_insn.reloc_offset = 1; /* BIG-ENDIAN Byte 1 of insn */
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the_insn.exp = *operand;
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continue;
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case 'b': /* A general register or 8-bit immediate */
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case 'i':
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/* We treat the two cases identically since we mashed
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them together in the opcode table. */
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if (operand->X_seg == SEG_REGISTER)
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goto general_reg;
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opcode |= IMMEDIATE_BIT;
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if (operand->X_seg == SEG_ABSOLUTE) {
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if (operand->X_add_number < 256) {
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opcode |= operand->X_add_number;
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continue;
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} else {
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as_bad("Immediate value of %d is too large",
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operand->X_add_number);
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continue;
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}
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}
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the_insn.reloc = RELOC_8;
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the_insn.reloc_offset = 3; /* BIG-ENDIAN Byte 3 of insn */
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the_insn.exp = *operand;
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continue;
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case 'a': /* next operand must be a register */
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case 'c':
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general_reg:
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/* lrNNN or grNNN or %%expr or a user-def register name */
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if (operand->X_seg != SEG_REGISTER)
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break; /* Only registers */
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know (operand->X_add_symbol == 0);
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know (operand->X_subtract_symbol == 0);
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reg = operand->X_add_number;
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|
if (reg >= SREG)
|
|
break; /* No special registers */
|
|
|
|
/*
|
|
* Got the register, now figure out where
|
|
* it goes in the opcode.
|
|
*/
|
|
switch (*args) {
|
|
case 'a':
|
|
opcode |= reg << 8;
|
|
continue;
|
|
|
|
case 'b':
|
|
case 'i':
|
|
opcode |= reg;
|
|
continue;
|
|
|
|
case 'c':
|
|
opcode |= reg << 16;
|
|
continue;
|
|
}
|
|
as_fatal("failed sanity check.");
|
|
break;
|
|
|
|
case 'x': /* 16 bit constant, zero-extended */
|
|
case 'X': /* 16 bit constant, one-extended */
|
|
if (operand->X_seg == SEG_ABSOLUTE) {
|
|
opcode |= (operand->X_add_number & 0xFF) << 0 |
|
|
((operand->X_add_number & 0xFF00) << 8);
|
|
continue;
|
|
}
|
|
the_insn.reloc = RELOC_CONST;
|
|
the_insn.exp = *operand;
|
|
continue;
|
|
|
|
case 'h':
|
|
if (operand->X_seg == SEG_ABSOLUTE) {
|
|
opcode |= (operand->X_add_number & 0x00FF0000) >> 16 |
|
|
(((unsigned long)operand->X_add_number
|
|
/* avoid sign ext */ & 0xFF000000) >> 8);
|
|
continue;
|
|
}
|
|
the_insn.reloc = RELOC_CONSTH;
|
|
the_insn.exp = *operand;
|
|
continue;
|
|
|
|
case 'P': /* PC-relative jump address */
|
|
case 'A': /* Absolute jump address */
|
|
/* These two are treated together since we folded the
|
|
opcode table entries together. */
|
|
if (operand->X_seg == SEG_ABSOLUTE) {
|
|
opcode |= ABSOLUTE_BIT |
|
|
(operand->X_add_number & 0x0003FC00) << 6 |
|
|
((operand->X_add_number & 0x000003FC) >> 2);
|
|
continue;
|
|
}
|
|
the_insn.reloc = RELOC_JUMPTARG;
|
|
the_insn.exp = *operand;
|
|
the_insn.pcrel = 1; /* Assume PC-relative jump */
|
|
/* FIXME-SOON, Do we figure out whether abs later, after know sym val? */
|
|
continue;
|
|
|
|
case 'e': /* Coprocessor enable bit for LOAD/STORE insn */
|
|
if (operand->X_seg == SEG_ABSOLUTE) {
|
|
if (operand->X_add_number == 0)
|
|
continue;
|
|
if (operand->X_add_number == 1) {
|
|
opcode |= CE_BIT;
|
|
continue;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case 'n': /* Control bits for LOAD/STORE instructions */
|
|
if (operand->X_seg == SEG_ABSOLUTE &&
|
|
operand->X_add_number < 128) {
|
|
opcode |= (operand->X_add_number << 16);
|
|
continue;
|
|
}
|
|
break;
|
|
|
|
case 's': /* Special register number */
|
|
if (operand->X_seg != SEG_REGISTER)
|
|
break; /* Only registers */
|
|
if (operand->X_add_number < SREG)
|
|
break; /* Not a special register */
|
|
opcode |= (operand->X_add_number & 0xFF) << 8;
|
|
continue;
|
|
|
|
case 'u': /* UI bit of CONVERT */
|
|
if (operand->X_seg == SEG_ABSOLUTE) {
|
|
if (operand->X_add_number == 0)
|
|
continue;
|
|
if (operand->X_add_number == 1) {
|
|
opcode |= UI_BIT;
|
|
continue;
|
|
}
|
|
}
|
|
break;
|
|
|
|
case 'r': /* RND bits of CONVERT */
|
|
if (operand->X_seg == SEG_ABSOLUTE &&
|
|
operand->X_add_number < 8) {
|
|
opcode |= operand->X_add_number << 4;
|
|
continue;
|
|
}
|
|
break;
|
|
|
|
case 'd': /* FD bits of CONVERT */
|
|
if (operand->X_seg == SEG_ABSOLUTE &&
|
|
operand->X_add_number < 4) {
|
|
opcode |= operand->X_add_number << 2;
|
|
continue;
|
|
}
|
|
break;
|
|
|
|
|
|
case 'f': /* FS bits of CONVERT */
|
|
if (operand->X_seg == SEG_ABSOLUTE &&
|
|
operand->X_add_number < 4) {
|
|
opcode |= operand->X_add_number << 0;
|
|
continue;
|
|
}
|
|
break;
|
|
|
|
case 'C':
|
|
if (operand->X_seg == SEG_ABSOLUTE &&
|
|
operand->X_add_number < 4) {
|
|
opcode |= operand->X_add_number << 16;
|
|
continue;
|
|
}
|
|
break;
|
|
|
|
case 'F':
|
|
if (operand->X_seg == SEG_ABSOLUTE &&
|
|
operand->X_add_number < 16) {
|
|
opcode |= operand->X_add_number << 18;
|
|
continue;
|
|
}
|
|
break;
|
|
|
|
default:
|
|
BAD_CASE (*args);
|
|
}
|
|
/* Types or values of args don't match. */
|
|
as_bad("Invalid operands");
|
|
return;
|
|
}
|
|
}
|
|
|
|
/*
|
|
This is identical to the md_atof in m68k.c. I think this is right,
|
|
but I'm not sure.
|
|
|
|
Turn a string in input_line_pointer into a floating point constant of type
|
|
type, and store the appropriate bytes in *litP. The number of LITTLENUMS
|
|
emitted is stored in *sizeP. An error message is returned, or NULL on OK.
|
|
*/
|
|
|
|
/* Equal to MAX_PRECISION in atof-ieee.c */
|
|
#define MAX_LITTLENUMS 6
|
|
|
|
char *
|
|
md_atof(type,litP,sizeP)
|
|
char type;
|
|
char *litP;
|
|
int *sizeP;
|
|
{
|
|
int prec;
|
|
LITTLENUM_TYPE words[MAX_LITTLENUMS];
|
|
LITTLENUM_TYPE *wordP;
|
|
char *t;
|
|
|
|
switch (type) {
|
|
|
|
case 'f':
|
|
case 'F':
|
|
case 's':
|
|
case 'S':
|
|
prec = 2;
|
|
break;
|
|
|
|
case 'd':
|
|
case 'D':
|
|
case 'r':
|
|
case 'R':
|
|
prec = 4;
|
|
break;
|
|
|
|
case 'x':
|
|
case 'X':
|
|
prec = 6;
|
|
break;
|
|
|
|
case 'p':
|
|
case 'P':
|
|
prec = 6;
|
|
break;
|
|
|
|
default:
|
|
*sizeP=0;
|
|
return "Bad call to MD_ATOF()";
|
|
}
|
|
t=atof_ieee(input_line_pointer,type,words);
|
|
if (t)
|
|
input_line_pointer=t;
|
|
*sizeP=prec * sizeof(LITTLENUM_TYPE);
|
|
for (wordP=words;prec--;) {
|
|
md_number_to_chars(litP,(long)(*wordP++),sizeof(LITTLENUM_TYPE));
|
|
litP+=sizeof(LITTLENUM_TYPE);
|
|
}
|
|
return ""; /* Someone should teach Dean about null pointers */
|
|
}
|
|
|
|
/*
|
|
* Write out big-endian.
|
|
*/
|
|
void
|
|
md_number_to_chars(buf, val, n)
|
|
char *buf;
|
|
long val;
|
|
int n;
|
|
{
|
|
|
|
switch (n) {
|
|
|
|
case 4:
|
|
*buf++ = val >> 24;
|
|
*buf++ = val >> 16;
|
|
case 2:
|
|
*buf++ = val >> 8;
|
|
case 1:
|
|
*buf = val;
|
|
break;
|
|
|
|
default:
|
|
as_fatal("failed sanity check.");
|
|
}
|
|
return;
|
|
}
|
|
|
|
void md_apply_fix(fixP, val)
|
|
fixS *fixP;
|
|
long val;
|
|
{
|
|
char *buf = fixP->fx_where + fixP->fx_frag->fr_literal;
|
|
|
|
fixP->fx_addnumber = val; /* Remember value for emit_reloc */
|
|
|
|
|
|
know(fixP->fx_size == 4);
|
|
know(fixP->fx_r_type < NO_RELOC);
|
|
|
|
/*
|
|
* This is a hack. There should be a better way to
|
|
* handle this.
|
|
*/
|
|
if (fixP->fx_r_type == RELOC_WDISP30 && fixP->fx_addsy) {
|
|
val += fixP->fx_where + fixP->fx_frag->fr_address;
|
|
}
|
|
|
|
switch (fixP->fx_r_type) {
|
|
|
|
case RELOC_32:
|
|
buf[0] = val >> 24;
|
|
buf[1] = val >> 16;
|
|
buf[2] = val >> 8;
|
|
buf[3] = val;
|
|
break;
|
|
|
|
case RELOC_8:
|
|
buf[0] = val;
|
|
break;
|
|
|
|
case RELOC_WDISP30:
|
|
val = (val >>= 2) + 1;
|
|
buf[0] |= (val >> 24) & 0x3f;
|
|
buf[1]= (val >> 16);
|
|
buf[2] = val >> 8;
|
|
buf[3] = val;
|
|
break;
|
|
|
|
case RELOC_HI22:
|
|
buf[1] |= (val >> 26) & 0x3f;
|
|
buf[2] = val >> 18;
|
|
buf[3] = val >> 10;
|
|
break;
|
|
|
|
case RELOC_LO10:
|
|
buf[2] |= (val >> 8) & 0x03;
|
|
buf[3] = val;
|
|
break;
|
|
|
|
case RELOC_BASE13:
|
|
buf[2] |= (val >> 8) & 0x1f;
|
|
buf[3] = val;
|
|
break;
|
|
|
|
case RELOC_WDISP22:
|
|
val = (val >>= 2) + 1;
|
|
/* FALLTHROUGH */
|
|
case RELOC_BASE22:
|
|
buf[1] |= (val >> 16) & 0x3f;
|
|
buf[2] = val >> 8;
|
|
buf[3] = val;
|
|
break;
|
|
|
|
#if 0
|
|
case RELOC_PC10:
|
|
case RELOC_PC22:
|
|
case RELOC_JMP_TBL:
|
|
case RELOC_SEGOFF16:
|
|
case RELOC_GLOB_DAT:
|
|
case RELOC_JMP_SLOT:
|
|
case RELOC_RELATIVE:
|
|
#endif
|
|
case RELOC_JUMPTARG: /* 00XX00XX pattern in a word */
|
|
buf[1] = val >> 10; /* Holds bits 0003FFFC of address */
|
|
buf[3] = val >> 2;
|
|
break;
|
|
|
|
case RELOC_CONST: /* 00XX00XX pattern in a word */
|
|
buf[1] = val >> 8; /* Holds bits 0000XXXX */
|
|
buf[3] = val;
|
|
break;
|
|
|
|
case RELOC_CONSTH: /* 00XX00XX pattern in a word */
|
|
buf[1] = val >> 24; /* Holds bits XXXX0000 */
|
|
buf[3] = val >> 16;
|
|
break;
|
|
|
|
case NO_RELOC:
|
|
default:
|
|
as_bad("bad relocation type: 0x%02x", fixP->fx_r_type);
|
|
break;
|
|
}
|
|
return;
|
|
}
|
|
|
|
#ifdef OBJ_COFF
|
|
short tc_coff_fix2rtype(fixP)
|
|
fixS *fixP;
|
|
{
|
|
|
|
/* FIXME-NOW: relocation type handling is not yet written for
|
|
a29k. */
|
|
|
|
|
|
switch (fixP->fx_r_type) {
|
|
case RELOC_32: return(R_WORD);
|
|
case RELOC_8: return(R_BYTE);
|
|
case RELOC_CONST: return (R_ILOHALF);
|
|
case RELOC_CONSTH: return (R_IHIHALF);
|
|
case RELOC_JUMPTARG: return (R_IREL);
|
|
default: printf("need %o3\n", fixP->fx_r_type);
|
|
abort(0);
|
|
} /* switch on type */
|
|
|
|
return(0);
|
|
} /* tc_coff_fix2rtype() */
|
|
#endif /* OBJ_COFF */
|
|
|
|
/* should never be called for sparc */
|
|
void md_create_short_jump(ptr, from_addr, to_addr, frag, to_symbol)
|
|
char *ptr;
|
|
long from_addr, to_addr;
|
|
fragS *frag;
|
|
symbolS *to_symbol;
|
|
{
|
|
as_fatal("a29k_create_short_jmp\n");
|
|
}
|
|
|
|
/* should never be called for 29k */
|
|
void md_convert_frag(headers, fragP)
|
|
object_headers *headers;
|
|
register fragS *fragP;
|
|
{
|
|
as_fatal("sparc_convert_frag\n");
|
|
}
|
|
|
|
/* should never be called for 29k */
|
|
void md_create_long_jump(ptr, from_addr, to_addr, frag, to_symbol)
|
|
char *ptr;
|
|
long from_addr;
|
|
long to_addr;
|
|
fragS *frag;
|
|
symbolS *to_symbol;
|
|
{
|
|
as_fatal("sparc_create_long_jump\n");
|
|
}
|
|
|
|
/* should never be called for a29k */
|
|
int md_estimate_size_before_relax(fragP, segtype)
|
|
register fragS *fragP;
|
|
segT segtype;
|
|
{
|
|
as_fatal("sparc_estimate_size_before_relax\n");
|
|
return(0);
|
|
}
|
|
|
|
#if 0
|
|
/* for debugging only */
|
|
static void
|
|
print_insn(insn)
|
|
struct machine_it *insn;
|
|
{
|
|
char *Reloc[] = {
|
|
"RELOC_8",
|
|
"RELOC_16",
|
|
"RELOC_32",
|
|
"RELOC_DISP8",
|
|
"RELOC_DISP16",
|
|
"RELOC_DISP32",
|
|
"RELOC_WDISP30",
|
|
"RELOC_WDISP22",
|
|
"RELOC_HI22",
|
|
"RELOC_22",
|
|
"RELOC_13",
|
|
"RELOC_LO10",
|
|
"RELOC_SFA_BASE",
|
|
"RELOC_SFA_OFF13",
|
|
"RELOC_BASE10",
|
|
"RELOC_BASE13",
|
|
"RELOC_BASE22",
|
|
"RELOC_PC10",
|
|
"RELOC_PC22",
|
|
"RELOC_JMP_TBL",
|
|
"RELOC_SEGOFF16",
|
|
"RELOC_GLOB_DAT",
|
|
"RELOC_JMP_SLOT",
|
|
"RELOC_RELATIVE",
|
|
"NO_RELOC"
|
|
};
|
|
|
|
if (insn->error) {
|
|
fprintf(stderr, "ERROR: %s\n");
|
|
}
|
|
fprintf(stderr, "opcode=0x%08x\n", insn->opcode);
|
|
fprintf(stderr, "reloc = %s\n", Reloc[insn->reloc]);
|
|
fprintf(stderr, "exp = {\n");
|
|
fprintf(stderr, "\t\tX_add_symbol = %s\n",
|
|
insn->exp.X_add_symbol ?
|
|
(S_GET_NAME(insn->exp.X_add_symbol) ?
|
|
S_GET_NAME(insn->exp.X_add_symbol) : "???") : "0");
|
|
fprintf(stderr, "\t\tX_sub_symbol = %s\n",
|
|
insn->exp.X_subtract_symbol ?
|
|
(S_GET_NAME(insn->exp.X_subtract_symbol) ?
|
|
S_GET_NAME(insn->exp.X_subtract_symbol) : "???") : "0");
|
|
fprintf(stderr, "\t\tX_add_number = %d\n",
|
|
insn->exp.X_add_number);
|
|
fprintf(stderr, "}\n");
|
|
return;
|
|
}
|
|
#endif
|
|
|
|
/* Translate internal representation of relocation info to target format.
|
|
|
|
On sparc/29k: first 4 bytes are normal unsigned long address, next three
|
|
bytes are index, most sig. byte first. Byte 7 is broken up with
|
|
bit 7 as external, bits 6 & 5 unused, and the lower
|
|
five bits as relocation type. Next 4 bytes are long addend. */
|
|
/* Thanx and a tip of the hat to Michael Bloom, mb@ttidca.tti.com */
|
|
|
|
#ifdef OBJ_AOUT
|
|
|
|
void tc_aout_fix_to_chars(where, fixP, segment_address_in_file)
|
|
char *where;
|
|
fixS *fixP;
|
|
relax_addressT segment_address_in_file;
|
|
{
|
|
long r_symbolnum;
|
|
|
|
know(fixP->fx_r_type < NO_RELOC);
|
|
know(fixP->fx_addsy != NULL);
|
|
|
|
md_number_to_chars(where,
|
|
fixP->fx_frag->fr_address + fixP->fx_where - segment_address_in_file,
|
|
4);
|
|
|
|
r_symbolnum = (S_IS_DEFINED(fixP->fx_addsy)
|
|
? S_GET_TYPE(fixP->fx_addsy)
|
|
: fixP->fx_addsy->sy_number);
|
|
|
|
where[4] = (r_symbolnum >> 16) & 0x0ff;
|
|
where[5] = (r_symbolnum >> 8) & 0x0ff;
|
|
where[6] = r_symbolnum & 0x0ff;
|
|
where[7] = (((!S_IS_DEFINED(fixP->fx_addsy)) << 7) & 0x80) | (0 & 0x60) | (fixP->fx_r_type & 0x1F);
|
|
/* Also easy */
|
|
md_number_to_chars(&where[8], fixP->fx_addnumber, 4);
|
|
|
|
return;
|
|
} /* tc_aout_fix_to_chars() */
|
|
|
|
#endif /* OBJ_AOUT */
|
|
|
|
int
|
|
md_parse_option(argP,cntP,vecP)
|
|
char **argP;
|
|
int *cntP;
|
|
char ***vecP;
|
|
{
|
|
return(0);
|
|
}
|
|
|
|
|
|
/* Default the values of symbols known that should be "predefined". We
|
|
don't bother to predefine them unless you actually use one, since there
|
|
are a lot of them. */
|
|
|
|
symbolS *md_undefined_symbol (name)
|
|
char *name;
|
|
{
|
|
long regnum;
|
|
char testbuf[5+ /*SLOP*/ 5];
|
|
|
|
if (name[0] == 'g' || name[0] == 'G' || name[0] == 'l' || name[0] == 'L')
|
|
{
|
|
/* Perhaps a global or local register name */
|
|
if (name[1] == 'r' || name[1] == 'R')
|
|
{
|
|
/* Parse the number, make sure it has no extra zeroes or trailing
|
|
chars */
|
|
regnum = atol(&name[2]);
|
|
if (regnum > 127)
|
|
return 0;
|
|
sprintf(testbuf, "%ld", regnum);
|
|
if (strcmp (testbuf, &name[2]) != 0)
|
|
return 0; /* gr007 or lr7foo or whatever */
|
|
|
|
/* We have a wiener! Define and return a new symbol for it. */
|
|
if (name[0] == 'l' || name[0] == 'L')
|
|
regnum += 128;
|
|
return(symbol_new(name, SEG_REGISTER, regnum, &zero_address_frag));
|
|
}
|
|
}
|
|
|
|
return 0;
|
|
}
|
|
|
|
/* Parse an operand that is machine-specific. */
|
|
|
|
void md_operand(expressionP)
|
|
expressionS *expressionP;
|
|
{
|
|
|
|
if (input_line_pointer[0] == '%' && input_line_pointer[1] == '%')
|
|
{
|
|
/* We have a numeric register expression. No biggy. */
|
|
input_line_pointer += 2; /* Skip %% */
|
|
(void)expression (expressionP);
|
|
if (expressionP->X_seg != SEG_ABSOLUTE
|
|
|| expressionP->X_add_number > 255)
|
|
as_bad("Invalid expression after %%%%\n");
|
|
expressionP->X_seg = SEG_REGISTER;
|
|
}
|
|
else if (input_line_pointer[0] == '&')
|
|
{
|
|
/* We are taking the 'address' of a register...this one is not
|
|
in the manual, but it *is* in traps/fpsymbol.h! What they
|
|
seem to want is the register number, as an absolute number. */
|
|
input_line_pointer++; /* Skip & */
|
|
(void)expression (expressionP);
|
|
if (expressionP->X_seg != SEG_REGISTER)
|
|
as_bad("Invalid register in & expression");
|
|
else
|
|
expressionP->X_seg = SEG_ABSOLUTE;
|
|
}
|
|
}
|
|
|
|
/* Round up a section size to the appropriate boundary. */
|
|
long
|
|
md_section_align (segment, size)
|
|
segT segment;
|
|
long size;
|
|
{
|
|
return size; /* Byte alignment is fine */
|
|
}
|
|
|
|
/* Exactly what point is a PC-relative offset relative TO?
|
|
On the 29000, they're relative to the address of the instruction,
|
|
which we have set up as the address of the fixup too. */
|
|
long md_pcrel_from (fixP)
|
|
fixS *fixP;
|
|
{
|
|
return fixP->fx_where + fixP->fx_frag->fr_address;
|
|
}
|
|
|
|
/*
|
|
* Local Variables:
|
|
* comment-column: 0
|
|
* End:
|
|
*/
|
|
|
|
/* end of tc-a29k.c */
|