189 lines
9.1 KiB
C
189 lines
9.1 KiB
C
/* $NetBSD: shpcicvar.h,v 1.9 2012/01/21 19:44:30 nonaka Exp $ */
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/*-
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* Copyright (C) 2005 NONAKA Kimihiro <nonaka@netbsd.org>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _SH3_SHPCICVAR_H_
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#define _SH3_SHPCICVAR_H_
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#include <sys/bus.h>
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bus_space_tag_t shpcic_get_bus_io_tag(void);
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bus_space_tag_t shpcic_get_bus_mem_tag(void);
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bus_dma_tag_t shpcic_get_bus_dma_tag(void);
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int shpcic_bus_maxdevs(void *v, int busno);
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pcitag_t shpcic_make_tag(void *v, int bus, int device, int function);
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void shpcic_decompose_tag(void *v, pcitag_t tag, int *bp, int *dp, int *fp);
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pcireg_t shpcic_conf_read(void *v, pcitag_t tag, int reg);
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void shpcic_conf_write(void *v, pcitag_t tag, int reg, pcireg_t data);
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int shpcic_set_intr_priority(int intr, int level);
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void *shpcic_intr_establish(int evtcode, int (*ih_func)(void *), void *ih_arg);
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void shpcic_intr_disestablish(void *ih);
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/*
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* shpcic io/mem bus space
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*/
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int shpcic_iomem_map(void *v, bus_addr_t bpa, bus_size_t size, int flags,
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bus_space_handle_t *bshp);
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void shpcic_iomem_unmap(void *v, bus_space_handle_t bsh, bus_size_t size);
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int shpcic_iomem_subregion(void *v, bus_space_handle_t bsh, bus_size_t offset,
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bus_size_t size, bus_space_handle_t *nbshp);
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int shpcic_iomem_alloc(void *v, bus_addr_t rstart, bus_addr_t rend,
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bus_size_t size, bus_size_t alignment, bus_size_t boundary, int flags,
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bus_addr_t *bpap, bus_space_handle_t *bshp);
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void shpcic_iomem_free(void *v, bus_space_handle_t bsh, bus_size_t size);
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paddr_t shpcic_iomem_mmap(void *v, bus_addr_t addr, off_t off, int prot,
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int flags);
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/* read single */
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uint8_t shpcic_io_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
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uint16_t shpcic_io_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
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uint32_t shpcic_io_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
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uint8_t shpcic_mem_read_1(void *v, bus_space_handle_t bsh, bus_size_t offset);
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uint16_t shpcic_mem_read_2(void *v, bus_space_handle_t bsh, bus_size_t offset);
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uint32_t shpcic_mem_read_4(void *v, bus_space_handle_t bsh, bus_size_t offset);
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/* read multi */
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void shpcic_io_read_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t *addr, bus_size_t count);
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void shpcic_io_read_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, bus_size_t count);
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void shpcic_io_read_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, bus_size_t count);
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void shpcic_mem_read_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t *addr, bus_size_t count);
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void shpcic_mem_read_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, bus_size_t count);
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void shpcic_mem_read_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, bus_size_t count);
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/* read region */
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void shpcic_io_read_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t *addr, bus_size_t count);
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void shpcic_io_read_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, bus_size_t count);
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void shpcic_io_read_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, bus_size_t count);
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void shpcic_mem_read_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t *addr, bus_size_t count);
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void shpcic_mem_read_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t *addr, bus_size_t count);
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void shpcic_mem_read_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t *addr, bus_size_t count);
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/* write single */
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void shpcic_io_write_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t data);
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void shpcic_io_write_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t data);
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void shpcic_io_write_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t data);
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void shpcic_mem_write_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t data);
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void shpcic_mem_write_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t data);
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void shpcic_mem_write_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t data);
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/* write multi */
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void shpcic_io_write_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint8_t *addr, bus_size_t count);
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void shpcic_io_write_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, bus_size_t count);
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void shpcic_io_write_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, bus_size_t count);
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void shpcic_mem_write_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint8_t *addr, bus_size_t count);
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void shpcic_mem_write_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, bus_size_t count);
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void shpcic_mem_write_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, bus_size_t count);
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/* write region */
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void shpcic_io_write_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint8_t *addr, bus_size_t count);
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void shpcic_io_write_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, bus_size_t count);
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void shpcic_io_write_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, bus_size_t count);
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void shpcic_mem_write_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint8_t *addr, bus_size_t count);
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void shpcic_mem_write_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint16_t *addr, bus_size_t count);
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void shpcic_mem_write_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, const uint32_t *addr, bus_size_t count);
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/* set multi */
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void shpcic_io_set_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t val, bus_size_t count);
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void shpcic_io_set_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t val, bus_size_t count);
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void shpcic_io_set_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t val, bus_size_t count);
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void shpcic_mem_set_multi_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t val, bus_size_t count);
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void shpcic_mem_set_multi_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t val, bus_size_t count);
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void shpcic_mem_set_multi_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t val, bus_size_t count);
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/* set region */
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void shpcic_io_set_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t val, bus_size_t count);
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void shpcic_io_set_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t val, bus_size_t count);
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void shpcic_io_set_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t val, bus_size_t count);
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void shpcic_mem_set_region_1(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint8_t val, bus_size_t count);
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void shpcic_mem_set_region_2(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint16_t val, bus_size_t count);
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void shpcic_mem_set_region_4(void *v, bus_space_handle_t bsh,
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bus_size_t offset, uint32_t val, bus_size_t count);
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/* copy region */
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void shpcic_io_copy_region_1(void *v, bus_space_handle_t bsh1,
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bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
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bus_size_t count);
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void shpcic_io_copy_region_2(void *v, bus_space_handle_t bsh1,
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bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
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bus_size_t count);
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void shpcic_io_copy_region_4(void *v, bus_space_handle_t bsh1,
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bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
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bus_size_t count);
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void shpcic_mem_copy_region_1(void *v, bus_space_handle_t bsh1,
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bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
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bus_size_t count);
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void shpcic_mem_copy_region_2(void *v, bus_space_handle_t bsh1,
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bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
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bus_size_t count);
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void shpcic_mem_copy_region_4(void *v, bus_space_handle_t bsh1,
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bus_size_t off1, bus_space_handle_t bsh2, bus_size_t off2,
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bus_size_t count);
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#endif /* _SH3_SHPCICVAR_H_ */
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