170 lines
5.3 KiB
C
170 lines
5.3 KiB
C
/* $NetBSD: autrireg.h,v 1.1 2001/11/18 03:16:02 someya Exp $ */
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/*
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* Copyright (c) 2001 SOMEYA Yoshihiko and KUROSAWA Takahiro.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Trident 4DWAVE registers
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*/
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#ifndef _DEV_PCI_AUTRIREG_H_
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#define _DEV_PCI_AUTRIREG_H_
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#define AUTRI_DEVICE_ID_4DWAVE_DX \
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((PCI_PRODUCT_TRIDENT_4DWAVE_DX << 16) | PCI_VENDOR_TRIDENT)
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#define AUTRI_DEVICE_ID_4DWAVE_NX \
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((PCI_PRODUCT_TRIDENT_4DWAVE_NX << 16) | PCI_VENDOR_TRIDENT)
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#define AUTRI_DEVICE_ID_SIS_7018 \
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((PCI_PRODUCT_SIS_7018 << 16) | PCI_VENDOR_SIS)
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#define AUTRI_DEVICE_ID_ALI_M5451 \
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((PCI_PRODUCT_ALI_M5451 << 16) | PCI_VENDOR_ALI)
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/*
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* PCI Config Registers
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*/
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#define AUTRI_PCI_MEMORY_BASE 0x14
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#define AUTRI_PCI_DDMA_CFG 0x40
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#define AUTRI_PCI_LEGACY_IOBASE 0x44
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/*
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* AC'97 Registers
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*/
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#define AUTRI_DX_ACR0 0x40
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# define AUTRI_DX_ACR0_CMD_WRITE 0x00008000
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# define AUTRI_DX_ACR0_BUSY_WRITE 0x00008000
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#define AUTRI_DX_ACR1 0x44
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# define AUTRI_DX_ACR1_CMD_READ 0x00008000
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# define AUTRI_DX_ACR1_BUSY_READ 0x00008000
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#define AUTRI_DX_ACR2 0x48
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# define AUTRI_DX_ACR2_CODEC_READY 0x00000010
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#define AUTRI_NX_ACR0 0x40
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# define AUTRI_NX_ACR0_PSB_CAPTURE 0x00000200
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# define AUTRI_NX_ACR0_CODEC_READY 0x00000008
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#define AUTRI_NX_ACR1 0x44
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# define AUTRI_NX_ACR1_CMD_WRITE 0x00000800
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# define AUTRI_NX_ACR1_BUSY_WRITE 0x00000800
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#define AUTRI_NX_ACR2 0x48
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# define AUTRI_NX_ACR2_CMD_READ 0x00000800
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# define AUTRI_NX_ACR2_BUSY_READ 0x00000800
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# define AUTRI_NX_ACR2_RECV_WAIT 0x00000400
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#define AUTRI_NX_ACR3 0x4c
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#define AUTRI_SIS_ACWR 0x40
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# define AUTRI_SIS_ACWR_CMD_WRITE 0x00008000
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# define AUTRI_SIS_ACWR_BUSY_WRITE 0x00008000
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# define AUTRI_SIS_ACWR_AUDIO_BUSY 0x00004000
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#define AUTRI_SIS_ACRD 0x44
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# define AUTRI_SIS_ACRD_CMD_READ 0x00008000
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# define AUTRI_SIS_ACRD_BUSY_READ 0x00008000
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# define AUTRI_SIS_ACRD_AUDIO_BUSY 0x00004000
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#define AUTRI_SIS_SCTRL 0x48
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# define AUTRI_SIS_SCTRL_CODEC_READY 0x01000000
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#define AUTRI_SIS_ACGPIO 0x4c
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#define AUTRI_ALI_ACWR 0x40
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# define AUTRI_ALI_ACWR_CMD_WRITE 0x00008000
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# define AUTRI_ALI_ACWR_BUSY_WRITE 0x00008000
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#define AUTRI_ALI_ACRD 0x44
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# define AUTRI_ALI_ACRD_CMD_READ 0x00008000
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# define AUTRI_ALI_ACRD_BUSY_READ 0x00008000
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#define AUTRI_ALI_SCTRL 0x48
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# define AUTRI_ALI_SCTRL_CODEC_READY 0x01000000
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#define AUTRI_ALI_ACGPIO 0x4c
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/*
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# define AUTRI_ALI_AC97_BUSY_READ 0x00008000
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# define AUTRI_ALI_AC97_BUSY_WRITE 0x00008000
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# define AUTRI_ALI_AC97_CMD_WRITE 0x00008000
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*/
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/*
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* MPU-401 UART
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*/
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#define AUTRI_MPUR0 0x20
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#define AUTRI_MPUR1 0x21
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# define AUTRI_MIDIOUT_READY 0x40
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#define AUTRI_MPUR2 0x22
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# define AUTRI_MIDIOUT_CONNECT 0x10
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# define AUTRI_MIDIIN_ENABLE_INTR 0x08
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#define MIDI_BUSY_WAIT 100
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#define MIDI_BUSY_DELAY 100
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/*
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* Channel Registers
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*/
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#define AUTRI_START_A 0x80
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#define AUTRI_STOP_A 0x84
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#define AUTRI_DLY_A 0x88
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#define AUTRI_SIGN_CSO_A 0x8c
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#define AUTRI_CSPF_A 0x90
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#define AUTRI_CEBC_A 0x94
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#define AUTRI_AIN_A 0x98
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#define AUTRI_EINT_A 0x9c
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#define AUTRI_LFO_GC_CIR 0xa0
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# define ENDLP_IE 0x00001000
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# define MIDLP_IE 0x00002000
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# define BANK_B_EN 0x00010000
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#define AUTRI_AINTEN_A 0xa4
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#define AUTRI_MUSICVOL_WAVEVOL 0xa8
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#define AUTRI_MISCINT 0xb0
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# define ST_TARGET_REACHED 0x00008000
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# define MIXER_OVERFLOW 0x00000800
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# define MIXER_UNDERFLOW 0x00000800
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# define ADDRESS_IRQ 0x00000020
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# define MPU401_IRQ 0x00000008
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#define AUTRI_START_B 0xb4
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#define AUTRI_STOP_B 0xb8
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#define AUTRI_CSPF_B 0xbc
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#define AUTRI_AIN_B 0xd8
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#define AUTRI_AINTEN_B 0xdc
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/*
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* Indexed Channel Registers
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*/
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#define AUTRI_ARAM_CR 0xe0
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# define AUTRI_CTRL_WAVEVOL 0x80000000
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# define AUTRI_CTRL_MUTE 0x3fff0000
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# define AUTRI_CTRL_16BIT 0x00008000
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# define AUTRI_CTRL_STEREO 0x00004000
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# define AUTRI_CTRL_SIGNED 0x00002000
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# define AUTRI_CTRL_LOOPMODE 0x00001000
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#define AUTRI_EBUF1 0xf4
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#define AUTRI_EBUF2 0xf8
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# define AUTRI_EMOD_STILL 0x30000000
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/*
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* Others
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*/
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#define AUTRI_NX_RCI3 0x73
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# define AUTRI_NX_RCI3_ENABLE 0x80
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#define AUTRI_ALI_GCONTROL 0xd4
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# define AUTRI_ALI_GCONTROL_PCM_IN 0x80000000
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#endif /* _DEV_PCI_AUTRIREG_H_ */
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