a5a73b2a05
firmware requests to do so. This cures severe overhating (> 120 C) observed on many laptops, being also on par with the specification(s). This can be reverted by using the new "hw.acpi.cpu.dynamic" sysctl variable.
1060 lines
21 KiB
C
1060 lines
21 KiB
C
/* $NetBSD: acpi_cpu_pstate.c,v 1.36 2010/12/30 12:05:02 jruoho Exp $ */
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/*-
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* Copyright (c) 2010 Jukka Ruohonen <jruohonen@iki.fi>
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: acpi_cpu_pstate.c,v 1.36 2010/12/30 12:05:02 jruoho Exp $");
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#include <sys/param.h>
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#include <sys/evcnt.h>
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#include <sys/kmem.h>
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#include <sys/once.h>
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#include <dev/acpi/acpireg.h>
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#include <dev/acpi/acpivar.h>
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#include <dev/acpi/acpi_cpu.h>
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#define _COMPONENT ACPI_BUS_COMPONENT
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ACPI_MODULE_NAME ("acpi_cpu_pstate")
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static void acpicpu_pstate_attach_print(struct acpicpu_softc *);
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static void acpicpu_pstate_attach_evcnt(struct acpicpu_softc *);
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static void acpicpu_pstate_detach_evcnt(struct acpicpu_softc *);
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static ACPI_STATUS acpicpu_pstate_pss(struct acpicpu_softc *);
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static ACPI_STATUS acpicpu_pstate_pss_add(struct acpicpu_pstate *,
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ACPI_OBJECT *);
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static ACPI_STATUS acpicpu_pstate_xpss(struct acpicpu_softc *);
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static ACPI_STATUS acpicpu_pstate_xpss_add(struct acpicpu_pstate *,
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ACPI_OBJECT *);
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static ACPI_STATUS acpicpu_pstate_pct(struct acpicpu_softc *);
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static int acpicpu_pstate_max(struct acpicpu_softc *);
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static int acpicpu_pstate_min(struct acpicpu_softc *);
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static void acpicpu_pstate_change(struct acpicpu_softc *);
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static void acpicpu_pstate_reset(struct acpicpu_softc *);
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static void acpicpu_pstate_bios(void);
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static uint32_t acpicpu_pstate_saved = 0;
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void
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acpicpu_pstate_attach(device_t self)
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{
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struct acpicpu_softc *sc = device_private(self);
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const char *str;
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ACPI_HANDLE tmp;
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ACPI_STATUS rv;
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rv = acpicpu_pstate_pss(sc);
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if (ACPI_FAILURE(rv)) {
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str = "_PSS";
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goto fail;
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}
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/*
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* Append additional information from the
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* extended _PSS, if available. Note that
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* XPSS can not be used on Intel systems
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* that use either _PDC or _OSC.
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*/
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if (sc->sc_cap == 0) {
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rv = acpicpu_pstate_xpss(sc);
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if (ACPI_SUCCESS(rv))
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sc->sc_flags |= ACPICPU_FLAG_P_XPSS;
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}
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rv = acpicpu_pstate_pct(sc);
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if (ACPI_FAILURE(rv)) {
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str = "_PCT";
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goto fail;
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}
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/*
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* The ACPI 3.0 and 4.0 specifications mandate three
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* objects for P-states: _PSS, _PCT, and _PPC. A less
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* strict wording is however used in the earlier 2.0
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* standard, and some systems conforming to ACPI 2.0
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* do not have _PPC, the method for dynamic maximum.
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*/
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rv = AcpiGetHandle(sc->sc_node->ad_handle, "_PPC", &tmp);
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if (ACPI_FAILURE(rv))
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aprint_debug_dev(self, "_PPC missing\n");
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/*
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* Employ the XPSS structure by filling
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* it with MD information required for FFH.
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*/
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rv = acpicpu_md_pstate_pss(sc);
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if (rv != 0) {
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rv = AE_SUPPORT;
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goto fail;
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}
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sc->sc_flags |= ACPICPU_FLAG_P;
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acpicpu_pstate_bios();
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acpicpu_pstate_reset(sc);
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acpicpu_pstate_attach_evcnt(sc);
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acpicpu_pstate_attach_print(sc);
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return;
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fail:
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switch (rv) {
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case AE_NOT_FOUND:
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return;
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case AE_SUPPORT:
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aprint_verbose_dev(sc->sc_dev, "P-states not supported\n");
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return;
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default:
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aprint_error_dev(sc->sc_dev, "failed to evaluate "
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"%s: %s\n", str, AcpiFormatException(rv));
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}
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}
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static void
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acpicpu_pstate_attach_print(struct acpicpu_softc *sc)
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{
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const uint8_t method = sc->sc_pstate_control.reg_spaceid;
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struct acpicpu_pstate *ps;
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static bool once = false;
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const char *str;
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uint32_t i;
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if (once != false)
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return;
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str = (method != ACPI_ADR_SPACE_SYSTEM_IO) ? "FFH" : "I/O";
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for (i = 0; i < sc->sc_pstate_count; i++) {
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ps = &sc->sc_pstate[i];
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if (ps->ps_freq == 0)
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continue;
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aprint_debug_dev(sc->sc_dev, "P%d: %3s, "
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"lat %3u us, pow %5u mW, %4u MHz\n", i, str,
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ps->ps_latency, ps->ps_power, ps->ps_freq);
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}
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once = true;
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}
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static void
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acpicpu_pstate_attach_evcnt(struct acpicpu_softc *sc)
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{
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struct acpicpu_pstate *ps;
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uint32_t i;
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for (i = 0; i < sc->sc_pstate_count; i++) {
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ps = &sc->sc_pstate[i];
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if (ps->ps_freq == 0)
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continue;
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(void)snprintf(ps->ps_name, sizeof(ps->ps_name),
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"P%u (%u MHz)", i, ps->ps_freq);
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evcnt_attach_dynamic(&ps->ps_evcnt, EVCNT_TYPE_MISC,
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NULL, device_xname(sc->sc_dev), ps->ps_name);
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}
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}
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int
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acpicpu_pstate_detach(device_t self)
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{
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struct acpicpu_softc *sc = device_private(self);
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static ONCE_DECL(once_detach);
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size_t size;
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int rv;
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if ((sc->sc_flags & ACPICPU_FLAG_P) == 0)
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return 0;
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rv = RUN_ONCE(&once_detach, acpicpu_md_pstate_stop);
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if (rv != 0)
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return rv;
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size = sc->sc_pstate_count * sizeof(*sc->sc_pstate);
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if (sc->sc_pstate != NULL)
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kmem_free(sc->sc_pstate, size);
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sc->sc_flags &= ~ACPICPU_FLAG_P;
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acpicpu_pstate_detach_evcnt(sc);
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return 0;
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}
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static void
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acpicpu_pstate_detach_evcnt(struct acpicpu_softc *sc)
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{
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struct acpicpu_pstate *ps;
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uint32_t i;
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for (i = 0; i < sc->sc_pstate_count; i++) {
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ps = &sc->sc_pstate[i];
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if (ps->ps_freq != 0)
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evcnt_detach(&ps->ps_evcnt);
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}
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}
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void
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acpicpu_pstate_start(device_t self)
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{
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struct acpicpu_softc *sc = device_private(self);
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struct acpicpu_pstate *ps;
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uint32_t i;
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int rv;
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rv = acpicpu_md_pstate_start();
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if (rv != 0)
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goto fail;
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/*
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* Initialize the state to P0.
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*/
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for (i = 0, rv = ENXIO; i < sc->sc_pstate_count; i++) {
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ps = &sc->sc_pstate[i];
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if (ps->ps_freq != 0) {
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sc->sc_cold = false;
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rv = acpicpu_pstate_set(sc, ps->ps_freq);
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break;
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}
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}
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if (rv != 0)
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goto fail;
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return;
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fail:
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sc->sc_flags &= ~ACPICPU_FLAG_P;
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if (rv == EEXIST) {
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aprint_error_dev(self, "driver conflicts with existing one\n");
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return;
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}
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aprint_error_dev(self, "failed to start P-states (err %d)\n", rv);
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}
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bool
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acpicpu_pstate_suspend(device_t self)
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{
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struct acpicpu_softc *sc = device_private(self);
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struct acpicpu_pstate *ps = NULL;
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int32_t i;
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mutex_enter(&sc->sc_mtx);
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acpicpu_pstate_reset(sc);
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mutex_exit(&sc->sc_mtx);
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if (acpicpu_pstate_saved != 0)
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return true;
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/*
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* Following design notes for Windows, we set the highest
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* P-state when entering any of the system sleep states.
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* When resuming, the saved P-state will be restored.
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*
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* Microsoft Corporation: Windows Native Processor
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* Performance Control. Version 1.1a, November, 2002.
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*/
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for (i = sc->sc_pstate_count - 1; i >= 0; i--) {
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if (sc->sc_pstate[i].ps_freq != 0) {
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ps = &sc->sc_pstate[i];
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break;
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}
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}
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if (__predict_false(ps == NULL))
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return true;
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mutex_enter(&sc->sc_mtx);
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acpicpu_pstate_saved = sc->sc_pstate_current;
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mutex_exit(&sc->sc_mtx);
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if (acpicpu_pstate_saved == ps->ps_freq)
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return true;
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|
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(void)acpicpu_pstate_set(sc, ps->ps_freq);
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return true;
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}
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|
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bool
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acpicpu_pstate_resume(device_t self)
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|
{
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|
struct acpicpu_softc *sc = device_private(self);
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|
|
|
if (acpicpu_pstate_saved != 0) {
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|
(void)acpicpu_pstate_set(sc, acpicpu_pstate_saved);
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acpicpu_pstate_saved = 0;
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}
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|
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return true;
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}
|
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|
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void
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|
acpicpu_pstate_callback(void *aux)
|
|
{
|
|
struct acpicpu_softc *sc;
|
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device_t self = aux;
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|
uint32_t old, new;
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sc = device_private(self);
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mutex_enter(&sc->sc_mtx);
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|
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old = sc->sc_pstate_max;
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acpicpu_pstate_change(sc);
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new = sc->sc_pstate_max;
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|
|
|
if (old == new) {
|
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mutex_exit(&sc->sc_mtx);
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return;
|
|
}
|
|
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
ACPI_DEBUG_PRINT((ACPI_DB_INFO, "maximum frequency "
|
|
"changed from P%u (%u MHz) to P%u (%u MHz)\n",
|
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old, sc->sc_pstate[old].ps_freq, new,
|
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sc->sc_pstate[sc->sc_pstate_max].ps_freq));
|
|
|
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(void)acpicpu_pstate_set(sc, sc->sc_pstate[new].ps_freq);
|
|
}
|
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|
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ACPI_STATUS
|
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acpicpu_pstate_pss(struct acpicpu_softc *sc)
|
|
{
|
|
struct acpicpu_pstate *ps;
|
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ACPI_OBJECT *obj;
|
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ACPI_BUFFER buf;
|
|
ACPI_STATUS rv;
|
|
uint32_t count;
|
|
uint32_t i, j;
|
|
|
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rv = acpi_eval_struct(sc->sc_node->ad_handle, "_PSS", &buf);
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|
|
|
if (ACPI_FAILURE(rv))
|
|
return rv;
|
|
|
|
obj = buf.Pointer;
|
|
|
|
if (obj->Type != ACPI_TYPE_PACKAGE) {
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|
rv = AE_TYPE;
|
|
goto out;
|
|
}
|
|
|
|
sc->sc_pstate_count = obj->Package.Count;
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|
|
|
if (sc->sc_pstate_count == 0) {
|
|
rv = AE_NOT_EXIST;
|
|
goto out;
|
|
}
|
|
|
|
if (sc->sc_pstate_count > ACPICPU_P_STATE_MAX) {
|
|
rv = AE_LIMIT;
|
|
goto out;
|
|
}
|
|
|
|
sc->sc_pstate = kmem_zalloc(sc->sc_pstate_count *
|
|
sizeof(struct acpicpu_pstate), KM_SLEEP);
|
|
|
|
if (sc->sc_pstate == NULL) {
|
|
rv = AE_NO_MEMORY;
|
|
goto out;
|
|
}
|
|
|
|
for (count = i = 0; i < sc->sc_pstate_count; i++) {
|
|
|
|
ps = &sc->sc_pstate[i];
|
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rv = acpicpu_pstate_pss_add(ps, &obj->Package.Elements[i]);
|
|
|
|
if (ACPI_FAILURE(rv)) {
|
|
ps->ps_freq = 0;
|
|
continue;
|
|
}
|
|
|
|
for (j = 0; j < i; j++) {
|
|
|
|
if (ps->ps_freq >= sc->sc_pstate[j].ps_freq) {
|
|
ps->ps_freq = 0;
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (ps->ps_freq != 0)
|
|
count++;
|
|
}
|
|
|
|
rv = (count != 0) ? AE_OK : AE_NOT_EXIST;
|
|
|
|
out:
|
|
if (buf.Pointer != NULL)
|
|
ACPI_FREE(buf.Pointer);
|
|
|
|
return rv;
|
|
}
|
|
|
|
static ACPI_STATUS
|
|
acpicpu_pstate_pss_add(struct acpicpu_pstate *ps, ACPI_OBJECT *obj)
|
|
{
|
|
ACPI_OBJECT *elm;
|
|
int i;
|
|
|
|
if (obj->Type != ACPI_TYPE_PACKAGE)
|
|
return AE_TYPE;
|
|
|
|
if (obj->Package.Count != 6)
|
|
return AE_BAD_DATA;
|
|
|
|
elm = obj->Package.Elements;
|
|
|
|
for (i = 0; i < 6; i++) {
|
|
|
|
if (elm[i].Type != ACPI_TYPE_INTEGER)
|
|
return AE_TYPE;
|
|
|
|
if (elm[i].Integer.Value > UINT32_MAX)
|
|
return AE_AML_NUMERIC_OVERFLOW;
|
|
}
|
|
|
|
ps->ps_freq = elm[0].Integer.Value;
|
|
ps->ps_power = elm[1].Integer.Value;
|
|
ps->ps_latency = elm[2].Integer.Value;
|
|
ps->ps_latency_bm = elm[3].Integer.Value;
|
|
ps->ps_control = elm[4].Integer.Value;
|
|
ps->ps_status = elm[5].Integer.Value;
|
|
|
|
if (ps->ps_freq == 0 || ps->ps_freq > 9999)
|
|
return AE_BAD_DECIMAL_CONSTANT;
|
|
|
|
/*
|
|
* The latency is typically around 10 usec
|
|
* on Intel CPUs. Use that as the minimum.
|
|
*/
|
|
if (ps->ps_latency < 10)
|
|
ps->ps_latency = 10;
|
|
|
|
return AE_OK;
|
|
}
|
|
|
|
static ACPI_STATUS
|
|
acpicpu_pstate_xpss(struct acpicpu_softc *sc)
|
|
{
|
|
struct acpicpu_pstate *ps;
|
|
ACPI_OBJECT *obj;
|
|
ACPI_BUFFER buf;
|
|
ACPI_STATUS rv;
|
|
uint32_t i = 0;
|
|
|
|
rv = acpi_eval_struct(sc->sc_node->ad_handle, "XPSS", &buf);
|
|
|
|
if (ACPI_FAILURE(rv))
|
|
return rv;
|
|
|
|
obj = buf.Pointer;
|
|
|
|
if (obj->Type != ACPI_TYPE_PACKAGE) {
|
|
rv = AE_TYPE;
|
|
goto out;
|
|
}
|
|
|
|
if (obj->Package.Count != sc->sc_pstate_count) {
|
|
rv = AE_LIMIT;
|
|
goto out;
|
|
}
|
|
|
|
while (i < sc->sc_pstate_count) {
|
|
|
|
ps = &sc->sc_pstate[i];
|
|
acpicpu_pstate_xpss_add(ps, &obj->Package.Elements[i]);
|
|
|
|
i++;
|
|
}
|
|
|
|
out:
|
|
if (buf.Pointer != NULL)
|
|
ACPI_FREE(buf.Pointer);
|
|
|
|
return rv;
|
|
}
|
|
|
|
static ACPI_STATUS
|
|
acpicpu_pstate_xpss_add(struct acpicpu_pstate *ps, ACPI_OBJECT *obj)
|
|
{
|
|
ACPI_OBJECT *elm;
|
|
int i;
|
|
|
|
if (obj->Type != ACPI_TYPE_PACKAGE)
|
|
return AE_TYPE;
|
|
|
|
if (obj->Package.Count != 8)
|
|
return AE_BAD_DATA;
|
|
|
|
elm = obj->Package.Elements;
|
|
|
|
for (i = 0; i < 4; i++) {
|
|
|
|
if (elm[i].Type != ACPI_TYPE_INTEGER)
|
|
return AE_TYPE;
|
|
|
|
if (elm[i].Integer.Value > UINT32_MAX)
|
|
return AE_AML_NUMERIC_OVERFLOW;
|
|
}
|
|
|
|
for (; i < 8; i++) {
|
|
|
|
if (elm[i].Type != ACPI_TYPE_BUFFER)
|
|
return AE_TYPE;
|
|
|
|
if (elm[i].Buffer.Length != 8)
|
|
return AE_LIMIT;
|
|
}
|
|
|
|
/*
|
|
* Only overwrite the elements that were
|
|
* not available from the conventional _PSS.
|
|
*/
|
|
if (ps->ps_freq == 0)
|
|
ps->ps_freq = elm[0].Integer.Value;
|
|
|
|
if (ps->ps_power == 0)
|
|
ps->ps_power = elm[1].Integer.Value;
|
|
|
|
if (ps->ps_latency == 0)
|
|
ps->ps_latency = elm[2].Integer.Value;
|
|
|
|
if (ps->ps_latency_bm == 0)
|
|
ps->ps_latency_bm = elm[3].Integer.Value;
|
|
|
|
if (ps->ps_control == 0)
|
|
ps->ps_control = ACPI_GET64(elm[4].Buffer.Pointer);
|
|
|
|
if (ps->ps_status == 0)
|
|
ps->ps_status = ACPI_GET64(elm[5].Buffer.Pointer);
|
|
|
|
if (ps->ps_control_mask == 0)
|
|
ps->ps_control_mask = ACPI_GET64(elm[6].Buffer.Pointer);
|
|
|
|
if (ps->ps_status_mask == 0)
|
|
ps->ps_status_mask = ACPI_GET64(elm[7].Buffer.Pointer);
|
|
|
|
/*
|
|
* The latency is often defined to be
|
|
* zero on AMD systems. Raise that to 1.
|
|
*/
|
|
if (ps->ps_latency == 0)
|
|
ps->ps_latency = 1;
|
|
|
|
ps->ps_flags |= ACPICPU_FLAG_P_XPSS;
|
|
|
|
if (ps->ps_freq > 9999)
|
|
return AE_BAD_DECIMAL_CONSTANT;
|
|
|
|
return AE_OK;
|
|
}
|
|
|
|
ACPI_STATUS
|
|
acpicpu_pstate_pct(struct acpicpu_softc *sc)
|
|
{
|
|
static const size_t size = sizeof(struct acpicpu_reg);
|
|
struct acpicpu_reg *reg[2];
|
|
struct acpicpu_pstate *ps;
|
|
ACPI_OBJECT *elm, *obj;
|
|
ACPI_BUFFER buf;
|
|
ACPI_STATUS rv;
|
|
uint8_t width;
|
|
uint32_t i;
|
|
|
|
rv = acpi_eval_struct(sc->sc_node->ad_handle, "_PCT", &buf);
|
|
|
|
if (ACPI_FAILURE(rv))
|
|
return rv;
|
|
|
|
obj = buf.Pointer;
|
|
|
|
if (obj->Type != ACPI_TYPE_PACKAGE) {
|
|
rv = AE_TYPE;
|
|
goto out;
|
|
}
|
|
|
|
if (obj->Package.Count != 2) {
|
|
rv = AE_LIMIT;
|
|
goto out;
|
|
}
|
|
|
|
for (i = 0; i < 2; i++) {
|
|
|
|
elm = &obj->Package.Elements[i];
|
|
|
|
if (elm->Type != ACPI_TYPE_BUFFER) {
|
|
rv = AE_TYPE;
|
|
goto out;
|
|
}
|
|
|
|
if (size > elm->Buffer.Length) {
|
|
rv = AE_AML_BAD_RESOURCE_LENGTH;
|
|
goto out;
|
|
}
|
|
|
|
reg[i] = (struct acpicpu_reg *)elm->Buffer.Pointer;
|
|
|
|
switch (reg[i]->reg_spaceid) {
|
|
|
|
case ACPI_ADR_SPACE_SYSTEM_IO:
|
|
|
|
if (reg[i]->reg_addr == 0) {
|
|
rv = AE_AML_ILLEGAL_ADDRESS;
|
|
goto out;
|
|
}
|
|
|
|
width = reg[i]->reg_bitwidth;
|
|
|
|
if (width + reg[i]->reg_bitoffset > 32) {
|
|
rv = AE_AML_BAD_RESOURCE_VALUE;
|
|
goto out;
|
|
}
|
|
|
|
if (width != 8 && width != 16 && width != 32) {
|
|
rv = AE_AML_BAD_RESOURCE_VALUE;
|
|
goto out;
|
|
}
|
|
|
|
break;
|
|
|
|
case ACPI_ADR_SPACE_FIXED_HARDWARE:
|
|
|
|
if ((sc->sc_flags & ACPICPU_FLAG_P_XPSS) != 0) {
|
|
|
|
if (reg[i]->reg_bitwidth != 64) {
|
|
rv = AE_AML_BAD_RESOURCE_VALUE;
|
|
goto out;
|
|
}
|
|
|
|
if (reg[i]->reg_bitoffset != 0) {
|
|
rv = AE_AML_BAD_RESOURCE_VALUE;
|
|
goto out;
|
|
}
|
|
|
|
break;
|
|
}
|
|
|
|
if ((sc->sc_flags & ACPICPU_FLAG_P_FFH) == 0) {
|
|
rv = AE_SUPPORT;
|
|
goto out;
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
rv = AE_AML_INVALID_SPACE_ID;
|
|
goto out;
|
|
}
|
|
}
|
|
|
|
if (reg[0]->reg_spaceid != reg[1]->reg_spaceid) {
|
|
rv = AE_AML_INVALID_SPACE_ID;
|
|
goto out;
|
|
}
|
|
|
|
(void)memcpy(&sc->sc_pstate_control, reg[0], size);
|
|
(void)memcpy(&sc->sc_pstate_status, reg[1], size);
|
|
|
|
if ((sc->sc_flags & ACPICPU_FLAG_P_XPSS) == 0)
|
|
goto out;
|
|
|
|
/*
|
|
* In XPSS the control address can not be zero,
|
|
* but the status address may be. In this case,
|
|
* comparable to T-states, we can ignore the status
|
|
* check during the P-state (FFH) transition.
|
|
*/
|
|
if (sc->sc_pstate_control.reg_addr == 0) {
|
|
rv = AE_AML_BAD_RESOURCE_LENGTH;
|
|
goto out;
|
|
}
|
|
|
|
/*
|
|
* If XPSS is present, copy the MSR addresses
|
|
* to the P-state structures for convenience.
|
|
*/
|
|
for (i = 0; i < sc->sc_pstate_count; i++) {
|
|
|
|
ps = &sc->sc_pstate[i];
|
|
|
|
if (ps->ps_freq == 0)
|
|
continue;
|
|
|
|
ps->ps_status_addr = sc->sc_pstate_status.reg_addr;
|
|
ps->ps_control_addr = sc->sc_pstate_control.reg_addr;
|
|
}
|
|
|
|
out:
|
|
if (buf.Pointer != NULL)
|
|
ACPI_FREE(buf.Pointer);
|
|
|
|
return rv;
|
|
}
|
|
|
|
static int
|
|
acpicpu_pstate_max(struct acpicpu_softc *sc)
|
|
{
|
|
ACPI_INTEGER val;
|
|
ACPI_STATUS rv;
|
|
|
|
/*
|
|
* Evaluate the currently highest P-state that can be used.
|
|
* If available, we can use either this state or any lower
|
|
* power (i.e. higher numbered) state from the _PSS object.
|
|
* Note that the return value must match the _OST parameter.
|
|
*/
|
|
rv = acpi_eval_integer(sc->sc_node->ad_handle, "_PPC", &val);
|
|
|
|
if (ACPI_SUCCESS(rv) && val < sc->sc_pstate_count) {
|
|
|
|
if (sc->sc_pstate[val].ps_freq != 0) {
|
|
sc->sc_pstate_max = val;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
static int
|
|
acpicpu_pstate_min(struct acpicpu_softc *sc)
|
|
{
|
|
ACPI_INTEGER val;
|
|
ACPI_STATUS rv;
|
|
|
|
/*
|
|
* The _PDL object defines the minimum when passive cooling
|
|
* is being performed. If available, we can use the returned
|
|
* state or any higher power (i.e. lower numbered) state.
|
|
*/
|
|
rv = acpi_eval_integer(sc->sc_node->ad_handle, "_PDL", &val);
|
|
|
|
if (ACPI_SUCCESS(rv) && val < sc->sc_pstate_count) {
|
|
|
|
if (sc->sc_pstate[val].ps_freq == 0)
|
|
return 1;
|
|
|
|
if (val >= sc->sc_pstate_max) {
|
|
sc->sc_pstate_min = val;
|
|
return 0;
|
|
}
|
|
}
|
|
|
|
return 1;
|
|
}
|
|
|
|
static void
|
|
acpicpu_pstate_change(struct acpicpu_softc *sc)
|
|
{
|
|
static ACPI_STATUS rv = AE_OK;
|
|
ACPI_OBJECT_LIST arg;
|
|
ACPI_OBJECT obj[2];
|
|
static int val = 0;
|
|
|
|
acpicpu_pstate_reset(sc);
|
|
|
|
/*
|
|
* Cache the checks as the optional
|
|
* _PDL and _OST are rarely present.
|
|
*/
|
|
if (val == 0)
|
|
val = acpicpu_pstate_min(sc);
|
|
|
|
arg.Count = 2;
|
|
arg.Pointer = obj;
|
|
|
|
obj[0].Type = ACPI_TYPE_INTEGER;
|
|
obj[1].Type = ACPI_TYPE_INTEGER;
|
|
|
|
obj[0].Integer.Value = ACPICPU_P_NOTIFY;
|
|
obj[1].Integer.Value = acpicpu_pstate_max(sc);
|
|
|
|
if (ACPI_FAILURE(rv))
|
|
return;
|
|
|
|
rv = AcpiEvaluateObject(sc->sc_node->ad_handle, "_OST", &arg, NULL);
|
|
}
|
|
|
|
static void
|
|
acpicpu_pstate_reset(struct acpicpu_softc *sc)
|
|
{
|
|
|
|
sc->sc_pstate_max = 0;
|
|
sc->sc_pstate_min = sc->sc_pstate_count - 1;
|
|
|
|
}
|
|
|
|
static void
|
|
acpicpu_pstate_bios(void)
|
|
{
|
|
const uint8_t val = AcpiGbl_FADT.PstateControl;
|
|
const uint32_t addr = AcpiGbl_FADT.SmiCommand;
|
|
|
|
if (addr == 0 || val == 0)
|
|
return;
|
|
|
|
(void)AcpiOsWritePort(addr, val, 8);
|
|
}
|
|
|
|
int
|
|
acpicpu_pstate_get(struct acpicpu_softc *sc, uint32_t *freq)
|
|
{
|
|
const uint8_t method = sc->sc_pstate_control.reg_spaceid;
|
|
struct acpicpu_pstate *ps = NULL;
|
|
uint32_t i, val = 0;
|
|
uint64_t addr;
|
|
uint8_t width;
|
|
int rv;
|
|
|
|
if (__predict_false(sc->sc_cold != false)) {
|
|
rv = EBUSY;
|
|
goto fail;
|
|
}
|
|
|
|
if (__predict_false((sc->sc_flags & ACPICPU_FLAG_P) == 0)) {
|
|
rv = ENODEV;
|
|
goto fail;
|
|
}
|
|
|
|
mutex_enter(&sc->sc_mtx);
|
|
|
|
/*
|
|
* Use the cached value, if available.
|
|
*/
|
|
if (sc->sc_pstate_current != ACPICPU_P_STATE_UNKNOWN) {
|
|
*freq = sc->sc_pstate_current;
|
|
mutex_exit(&sc->sc_mtx);
|
|
return 0;
|
|
}
|
|
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
switch (method) {
|
|
|
|
case ACPI_ADR_SPACE_FIXED_HARDWARE:
|
|
|
|
rv = acpicpu_md_pstate_get(sc, freq);
|
|
|
|
if (__predict_false(rv != 0))
|
|
goto fail;
|
|
|
|
break;
|
|
|
|
case ACPI_ADR_SPACE_SYSTEM_IO:
|
|
|
|
addr = sc->sc_pstate_status.reg_addr;
|
|
width = sc->sc_pstate_status.reg_bitwidth;
|
|
|
|
(void)AcpiOsReadPort(addr, &val, width);
|
|
|
|
if (val == 0) {
|
|
rv = EIO;
|
|
goto fail;
|
|
}
|
|
|
|
for (i = 0; i < sc->sc_pstate_count; i++) {
|
|
|
|
if (sc->sc_pstate[i].ps_freq == 0)
|
|
continue;
|
|
|
|
if (val == sc->sc_pstate[i].ps_status) {
|
|
ps = &sc->sc_pstate[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
if (ps == NULL) {
|
|
rv = EIO;
|
|
goto fail;
|
|
}
|
|
|
|
*freq = ps->ps_freq;
|
|
break;
|
|
|
|
default:
|
|
rv = ENOTTY;
|
|
goto fail;
|
|
}
|
|
|
|
mutex_enter(&sc->sc_mtx);
|
|
sc->sc_pstate_current = *freq;
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
aprint_error_dev(sc->sc_dev, "failed "
|
|
"to get frequency (err %d)\n", rv);
|
|
|
|
mutex_enter(&sc->sc_mtx);
|
|
*freq = sc->sc_pstate_current = ACPICPU_P_STATE_UNKNOWN;
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
return rv;
|
|
}
|
|
|
|
int
|
|
acpicpu_pstate_set(struct acpicpu_softc *sc, uint32_t freq)
|
|
{
|
|
const uint8_t method = sc->sc_pstate_control.reg_spaceid;
|
|
struct acpicpu_pstate *ps = NULL;
|
|
uint32_t i, val;
|
|
uint64_t addr;
|
|
uint8_t width;
|
|
int rv;
|
|
|
|
if (__predict_false(sc->sc_cold != false)) {
|
|
rv = EBUSY;
|
|
goto fail;
|
|
}
|
|
|
|
if (__predict_false((sc->sc_flags & ACPICPU_FLAG_P) == 0)) {
|
|
rv = ENODEV;
|
|
goto fail;
|
|
}
|
|
|
|
mutex_enter(&sc->sc_mtx);
|
|
|
|
if (sc->sc_pstate_current == freq) {
|
|
mutex_exit(&sc->sc_mtx);
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Verify that the requested frequency is available.
|
|
*
|
|
* The access needs to be protected since the currently
|
|
* available maximum and minimum may change dynamically.
|
|
*/
|
|
for (i = sc->sc_pstate_max; i <= sc->sc_pstate_min; i++) {
|
|
|
|
if (__predict_false(sc->sc_pstate[i].ps_freq == 0))
|
|
continue;
|
|
|
|
if (sc->sc_pstate[i].ps_freq == freq) {
|
|
ps = &sc->sc_pstate[i];
|
|
break;
|
|
}
|
|
}
|
|
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
if (__predict_false(ps == NULL)) {
|
|
rv = EINVAL;
|
|
goto fail;
|
|
}
|
|
|
|
switch (method) {
|
|
|
|
case ACPI_ADR_SPACE_FIXED_HARDWARE:
|
|
|
|
rv = acpicpu_md_pstate_set(ps);
|
|
|
|
if (__predict_false(rv != 0))
|
|
goto fail;
|
|
|
|
break;
|
|
|
|
case ACPI_ADR_SPACE_SYSTEM_IO:
|
|
|
|
addr = sc->sc_pstate_control.reg_addr;
|
|
width = sc->sc_pstate_control.reg_bitwidth;
|
|
|
|
(void)AcpiOsWritePort(addr, ps->ps_control, width);
|
|
|
|
addr = sc->sc_pstate_status.reg_addr;
|
|
width = sc->sc_pstate_status.reg_bitwidth;
|
|
|
|
/*
|
|
* Some systems take longer to respond
|
|
* than the reported worst-case latency.
|
|
*/
|
|
for (i = val = 0; i < ACPICPU_P_STATE_RETRY; i++) {
|
|
|
|
(void)AcpiOsReadPort(addr, &val, width);
|
|
|
|
if (val == ps->ps_status)
|
|
break;
|
|
|
|
DELAY(ps->ps_latency);
|
|
}
|
|
|
|
if (i == ACPICPU_P_STATE_RETRY) {
|
|
rv = EAGAIN;
|
|
goto fail;
|
|
}
|
|
|
|
break;
|
|
|
|
default:
|
|
rv = ENOTTY;
|
|
goto fail;
|
|
}
|
|
|
|
mutex_enter(&sc->sc_mtx);
|
|
ps->ps_evcnt.ev_count++;
|
|
sc->sc_pstate_current = freq;
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
return 0;
|
|
|
|
fail:
|
|
aprint_error_dev(sc->sc_dev, "failed to set "
|
|
"frequency to %u (err %d)\n", freq, rv);
|
|
|
|
mutex_enter(&sc->sc_mtx);
|
|
sc->sc_pstate_current = ACPICPU_P_STATE_UNKNOWN;
|
|
mutex_exit(&sc->sc_mtx);
|
|
|
|
return rv;
|
|
}
|