377 lines
8.1 KiB
C
377 lines
8.1 KiB
C
/* $NetBSD: ofwgen_intr.c,v 1.4 2002/09/18 01:43:08 chs Exp $ */
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/*
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* Copyright (C) 1997 Wolfgang Solfrank.
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* Copyright (C) 1997 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Software-simulated spl/interrupt routines. Used in generic
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* OpenFirmware driver configurations.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <net/netisr.h>
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#include <machine/autoconf.h>
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#include <ofppc/ofwgen/ofwgenvar.h>
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int ofwgen_splraise(int);
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int ofwgen_spllower(int);
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void ofwgen_splx(int);
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void ofwgen_setsoft(int);
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void ofwgen_clock_return(struct clockframe *, int);
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void *ofwgen_intr_establish(int, int, int, int (*)(void *), void *);
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void ofwgen_intr_disestablish(void *);
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struct machvec ofwgen_machvec = {
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ofwgen_splraise,
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ofwgen_spllower,
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ofwgen_splx,
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ofwgen_setsoft,
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ofwgen_clock_return,
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ofwgen_intr_establish,
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ofwgen_intr_disestablish,
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};
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void ofwgen_intr_calculate_masks(void);
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#define B(x) (1U << (x))
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/* Interrupts to mask at each level. */
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int imask[NIPL];
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/* Current interrupt priority level. */
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static __volatile int cpl;
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/* Number of clock interrupts pending. */
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static __volatile int clockpending;
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/* Other interrupts pending. */
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static __volatile int ipending;
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void
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ofwgen_intr_init(void)
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{
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int ipl;
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/*
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* Compute the initial interrupt masks. Note that since we
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* don't actually use interrupts, this will never change.
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*/
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for (ipl = 0; ipl < NIPL; ipl++)
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imask[ipl] = B(ipl);
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ofwgen_intr_calculate_masks();
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machine_interface = ofwgen_machvec;
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}
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void
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ofwgen_intr_calculate_masks(void)
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{
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imask[IPL_NONE] = 0;
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/*
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* splsoftclock() is the only interface that users of the
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* generic software interrupt facility have to block their
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* soft intrs, so splsoftclock() must also block IPL_SOFT.
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*/
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imask[IPL_SOFTCLOCK] |= imask[IPL_SOFT];
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/*
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* splsoftnet() must also block IPL_SOFTCLOCK, since we don't
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* want timer-driven network events to occur while we're
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* processing incoming packets.
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*/
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imask[IPL_SOFTNET] |= imask[IPL_SOFTCLOCK];
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/*
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* Enfore a heirarchy that gives "slow" devices (or devices with
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* limited input buffer space/"real-time" requirements) a better
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* chance at not dropping data.
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*/
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imask[IPL_BIO] |= imask[IPL_SOFTNET];
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imask[IPL_NET] |= imask[IPL_BIO];
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imask[IPL_SOFTSERIAL] |= imask[IPL_NET];
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imask[IPL_TTY] |= imask[IPL_SOFTSERIAL];
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/*
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* splvm() blocks all interrupts that use the kernel memory
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* allocation facilities.
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*/
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imask[IPL_IMP] |= imask[IPL_TTY];
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/*
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* Audio devices are not allowed to perform memory allocation
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* in their interrupt routines, and they have fairly "real-time"
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* requirements, so give them a high interrupt priority.
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*/
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imask[IPL_AUDIO] |= imask[IPL_IMP];
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/*
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* splclock() must block anything that uses the scheduler.
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*/
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imask[IPL_CLOCK] |= imask[IPL_AUDIO];
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/*
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* splhigh() must block "everything".
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*/
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imask[IPL_HIGH] |= imask[IPL_CLOCK];
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/*
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* XXX We need serial drivers to run at the absolute highest priority
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* in order to avoid overruns, so serial > high.
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*/
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imask[IPL_SERIAL] |= imask[IPL_HIGH];
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}
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static void
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do_pending_int(void)
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{
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int emsr, dmsr, new;
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emsr = mfmsr();
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dmsr = emsr & ~PSL_EE;
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new = cpl;
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for (;;) {
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cpl = new;
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mtmsr(dmsr);
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if (clockpending && (cpl & B(IPL_CLOCK)) == 0) {
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struct clockframe frame;
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cpl |= imask[IPL_CLOCK];
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clockpending--;
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mtmsr(emsr);
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/*
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* Fake a clock interrupt frame
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*/
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frame.pri = new;
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frame.depth = intr_depth + 1;
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frame.srr1 = 0;
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frame.srr0 = (int)ofwgen_splx;
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/*
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* Do standard timer interrupt stuff
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*/
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hardclock(&frame);
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continue;
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}
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/*
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* Check for software interrupts.
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*/
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if ((ipending & B(IPL_SOFTCLOCK)) != 0 &&
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(cpl & B(IPL_SOFTCLOCK)) == 0) {
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cpl |= imask[IPL_SOFTCLOCK];
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ipending &= ~B(IPL_SOFTCLOCK);
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mtmsr(emsr);
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softclock(NULL);
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continue;
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}
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if ((ipending & B(IPL_SOFTNET)) != 0 &&
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(cpl & B(IPL_SOFTNET)) == 0) {
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int pisr = netisr;
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netisr = 0;
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cpl |= imask[IPL_SOFTNET];
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ipending &= ~B(IPL_SOFTNET);
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mtmsr(emsr);
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softnet(pisr);
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continue;
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}
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if ((ipending & B(IPL_SOFT)) != 0 &&
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(cpl & B(IPL_SOFT)) == 0) {
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cpl |= imask[IPL_SOFT];
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ipending &= ~B(IPL_SOFT);
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mtmsr(emsr);
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#if 0 /* XXX notyet */
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softintr_dispatch(&softintrs[SI_SOFT]);
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#endif
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continue;
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}
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mtmsr(emsr);
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return;
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}
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}
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int
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ofwgen_splraise(int ipl)
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{
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int old;
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old = cpl;
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cpl |= ipl;
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return (old);
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}
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int
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ofwgen_spllower(int ipl)
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{
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int old = cpl;
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splx(ipl);
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return (old);
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}
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void
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ofwgen_splx(int new)
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{
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cpl = new;
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do_pending_int();
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}
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void
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ofwgen_setsoft(int ipl)
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{
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int msr;
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msr = mfmsr();
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mtmsr(msr & ~PSL_EE);
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ipending |= B(ipl);
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mtmsr(msr);
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if ((cpl & B(ipl)) == 0)
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splx(cpl);
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}
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void *
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ofwgen_intr_establish(int irq, int ipl, int ist,
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int (*func)(void *), void *arg)
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{
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panic("ofwgen_intr_establish");
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}
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void
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ofwgen_intr_disestablish(void *cookie)
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{
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panic("ofwgen_intr_disestablish");
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}
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/*
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* This one is similar to ofwgen_splx, but returns with interrupts disabled.
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* It is intended for use during interrupt exit (as the name implies :-)).
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*/
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static void
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intr_return(struct clockframe *frame, int level)
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{
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int emsr, dmsr;
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emsr = mfmsr();
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dmsr = emsr & ~PSL_EE;
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for (;;) {
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cpl = level;
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mtmsr(dmsr);
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if (clockpending && (cpl & B(IPL_CLOCK)) == 0) {
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cpl |= imask[IPL_CLOCK];
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clockpending--;
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mtmsr(emsr);
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/*
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* Do standard timer interrupt stuff
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*/
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hardclock(frame);
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continue;
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}
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/*
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* Check for software interrupts.
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*/
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if ((ipending & B(IPL_SOFTCLOCK)) != 0 &&
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(cpl & B(IPL_SOFTCLOCK)) == 0) {
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cpl |= imask[IPL_SOFTCLOCK];
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ipending &= ~B(IPL_SOFTCLOCK);
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mtmsr(emsr);
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softclock(NULL);
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continue;
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}
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if ((ipending & B(IPL_SOFTNET)) != 0 &&
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(cpl & B(IPL_SOFTNET)) == 0) {
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int pisr = netisr;
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netisr = 0;
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cpl |= imask[IPL_SOFTNET];
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ipending &= ~B(IPL_SOFTNET);
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mtmsr(emsr);
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softnet(pisr);
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continue;
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}
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if ((ipending & B(IPL_SOFT)) != 0 &&
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(cpl & B(IPL_SOFT)) == 0) {
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cpl |= imask[IPL_SOFT];
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ipending &= ~B(IPL_SOFT);
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mtmsr(emsr);
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#if 0 /* XXX notyet */
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softintr_dispatch(&softintrs[SI_SOFT]);
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#endif
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continue;
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}
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break;
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}
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}
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void
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ofwgen_clock_return(struct clockframe *frame, int nticks)
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{
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int pri;
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pri = cpl;
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if (pri & B(IPL_CLOCK))
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clockpending += nticks;
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else {
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cpl = pri | imask[IPL_CLOCK];
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/* Reenable interrupts. */
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mtmsr(mfmsr() | PSL_EE);
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/*
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* Do standard timer interrupt stuff. Do softclock stuff
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* only on the last iteration.
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*/
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frame->pri = pri | B(IPL_SOFTCLOCK);
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while (--nticks > 0)
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hardclock(frame);
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frame->pri = pri;
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hardclock(frame);
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}
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intr_return(frame, pri);
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}
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