361 lines
10 KiB
C
361 lines
10 KiB
C
/* $NetBSD: tcic2var.h,v 1.9 2006/09/03 06:42:44 christos Exp $ */
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/*
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* Copyright (c) 1998, 1999 Christoph Badura. All rights reserved.
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* Copyright (c) 1997 Marc Horowitz. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Marc Horowitz.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _TCIC2VAR_H
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#define _TCIC2VAR_H
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#include <sys/device.h>
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#include <dev/pcmcia/pcmciareg.h>
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#include <dev/pcmcia/pcmciachip.h>
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#include <dev/ic/tcic2reg.h>
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struct proc;
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struct tcic_event {
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SIMPLEQ_ENTRY(tcic_event) pe_q;
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int pe_type;
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};
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/* pe_type */
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#define TCIC_EVENT_INSERTION 0
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#define TCIC_EVENT_REMOVAL 1
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struct tcic_handle {
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struct tcic_softc *sc;
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int sock; /* socket number */
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int flags;
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int sstat; /* last value of R_SSTAT */
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int memalloc;
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int memwins;
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struct {
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bus_addr_t addr;
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bus_size_t size;
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int size2; /* size as 2^n scaled by 4K */
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long offset;
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int speed; /* in ns */
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int kind;
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} mem[TCIC_MAX_MEM_WINS];
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int ioalloc;
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struct {
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bus_addr_t addr;
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bus_size_t size;
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int width;
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int speed; /* in ns */
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} io[TCIC_IO_WINS];
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int ih_irq;
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struct device *pcmcia;
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int shutdown;
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struct proc *event_thread;
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SIMPLEQ_HEAD(, tcic_event) events;
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};
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#define TCIC_FLAG_SOCKETP 0x0001
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#define TCIC_FLAG_CARDP 0x0002
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/*
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* This is sort of arbitrary. It merely needs to be "enough". It can be
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* overridden in the conf file, anyway.
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*/
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#define TCIC_MEM_PAGES 4
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#define TCIC_MEMSIZE TCIC_MEM_PAGES*TCIC_MEM_PAGESIZE
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#define TCIC_NSLOTS 2
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struct tcic_softc {
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struct device dev;
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bus_space_tag_t memt;
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bus_space_handle_t memh;
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int chipid;
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int validirqs;
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int pwrena; /* holds TCIC_PWR_ENA on'084 and successors */
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/* XXX isa_chipset_tag_t, pci_chipset_tag_t, etc. */
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void *intr_est;
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pcmcia_chipset_tag_t pct;
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/* this needs to be large enough to hold TCIC_MEM_PAGES bits */
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int subregionmask;
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/* used by memory window mapping functions */
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bus_addr_t membase;
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int memsize2; /* int(log2(memsize)) */
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/*
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* used by io window mapping functions. These can actually overlap
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* with another tcic, since the underlying extent mapper will deal
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* with individual allocations. This is here to deal with the fact
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* that different busses have different real widths (different pc
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* hardware seems to use 10 or 12 bits for the I/O bus).
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*/
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bus_addr_t iobase;
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bus_size_t iosize;
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int irq;
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void *ih;
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struct tcic_handle handle[TCIC_NSLOTS];
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};
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int tcic_log2(u_int);
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int tcic_ns2wscnt(int);
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int tcic_check_reserved_bits(bus_space_tag_t, bus_space_handle_t);
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int tcic_chipid(bus_space_tag_t, bus_space_handle_t);
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int tcic_chipid_known(int);
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const char *tcic_chipid_to_string(int);
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int tcic_validirqs(int);
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void tcic_attach(struct tcic_softc *);
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void tcic_attach_sockets(struct tcic_softc *);
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int tcic_intr(void *arg);
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static __inline int tcic_read_1(struct tcic_handle *, int);
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static __inline int tcic_read_2(struct tcic_handle *, int);
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static __inline int tcic_read_4(struct tcic_handle *, int);
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static __inline void tcic_write_1(struct tcic_handle *, int, int);
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static __inline void tcic_write_2(struct tcic_handle *, int, int);
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static __inline void tcic_write_4(struct tcic_handle *, int, int);
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static __inline int tcic_read_ind_2(struct tcic_handle *, int);
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static __inline void tcic_write_ind_2(struct tcic_handle *, int, int);
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static __inline void tcic_sel_sock(struct tcic_handle *);
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static __inline void tcic_wait_ready(struct tcic_handle *);
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static __inline int tcic_read_aux_1(bus_space_tag_t, bus_space_handle_t, int, int);
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static __inline int tcic_read_aux_2(bus_space_tag_t, bus_space_handle_t, int);
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static __inline void tcic_write_aux_1(bus_space_tag_t, bus_space_handle_t, int, int, int);
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static __inline void tcic_write_aux_2(bus_space_tag_t, bus_space_handle_t, int, int);
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int tcic_chip_mem_alloc(pcmcia_chipset_handle_t, bus_size_t,
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struct pcmcia_mem_handle *);
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void tcic_chip_mem_free(pcmcia_chipset_handle_t,
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struct pcmcia_mem_handle *);
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int tcic_chip_mem_map(pcmcia_chipset_handle_t, int, bus_addr_t,
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bus_size_t, struct pcmcia_mem_handle *, bus_size_t *, int *);
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void tcic_chip_mem_unmap(pcmcia_chipset_handle_t, int);
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int tcic_chip_io_alloc(pcmcia_chipset_handle_t, bus_addr_t,
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bus_size_t, bus_size_t, struct pcmcia_io_handle *);
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void tcic_chip_io_free(pcmcia_chipset_handle_t,
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struct pcmcia_io_handle *);
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int tcic_chip_io_map(pcmcia_chipset_handle_t, int, bus_addr_t,
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bus_size_t, struct pcmcia_io_handle *, int *);
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void tcic_chip_io_unmap(pcmcia_chipset_handle_t, int);
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void tcic_chip_socket_enable(pcmcia_chipset_handle_t);
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void tcic_chip_socket_disable(pcmcia_chipset_handle_t);
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void tcic_chip_socket_settype(pcmcia_chipset_handle_t, int);
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static __inline int tcic_read_1(struct tcic_handle *, int);
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static __inline int
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tcic_read_1(h, reg)
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struct tcic_handle *h;
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int reg;
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{
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return (bus_space_read_1(h->sc->iot, h->sc->ioh, reg));
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}
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static __inline int tcic_read_2(struct tcic_handle *, int);
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static __inline int
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tcic_read_2(h, reg)
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struct tcic_handle *h;
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int reg;
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{
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return (bus_space_read_2(h->sc->iot, h->sc->ioh, reg));
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}
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static __inline int tcic_read_4(struct tcic_handle *, int);
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static __inline int
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tcic_read_4(h, reg)
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struct tcic_handle *h;
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int reg;
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{
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int val;
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val = bus_space_read_2(h->sc->iot, h->sc->ioh, reg);
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val |= bus_space_read_2(h->sc->iot, h->sc->ioh, reg+2) << 16;
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return val;
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}
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static __inline void tcic_write_1(struct tcic_handle *, int, int);
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static __inline void
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tcic_write_1(h, reg, data)
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struct tcic_handle *h;
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int reg;
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int data;
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{
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bus_space_write_1(h->sc->iot, h->sc->ioh, reg, (data));
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}
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static __inline void tcic_write_2(struct tcic_handle *, int, int);
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static __inline void
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tcic_write_2(h, reg, data)
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struct tcic_handle *h;
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int reg;
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int data;
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{
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bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
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}
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static __inline void tcic_write_4(struct tcic_handle *, int, int);
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static __inline void
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tcic_write_4(h, reg, data)
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struct tcic_handle *h;
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int reg;
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int data;
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{
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bus_space_write_2(h->sc->iot, h->sc->ioh, reg, (data));
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bus_space_write_2(h->sc->iot, h->sc->ioh, reg+2, (data)>>16);
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}
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static __inline int tcic_read_ind_2(struct tcic_handle *, int);
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static __inline int
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tcic_read_ind_2(h, reg)
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struct tcic_handle *h;
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int reg;
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{
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int r_addr, val;
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r_addr = tcic_read_4(h, TCIC_R_ADDR);
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tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG);
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val = bus_space_read_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA);
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tcic_write_4(h, TCIC_R_ADDR, r_addr);
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return val;
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}
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static __inline void tcic_write_ind_2(struct tcic_handle *, int, int);
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static __inline void
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tcic_write_ind_2(h, reg, data)
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struct tcic_handle *h;
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int reg;
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int data;
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{
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int r_addr;
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r_addr = tcic_read_4(h, TCIC_R_ADDR);
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tcic_write_4(h, TCIC_R_ADDR, reg|TCIC_ADDR_INDREG);
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bus_space_write_2(h->sc->iot, h->sc->ioh, TCIC_R_DATA, (data));
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tcic_write_4(h, TCIC_R_ADDR, r_addr);
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}
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static __inline void tcic_sel_sock(struct tcic_handle *);
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static __inline void
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tcic_sel_sock(h)
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struct tcic_handle *h;
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{
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int r_addr;
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r_addr = tcic_read_2(h, TCIC_R_ADDR2);
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tcic_write_2(h, TCIC_R_ADDR2,
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(h->sock<<TCIC_ADDR2_SS_SHFT)|(r_addr & ~TCIC_ADDR2_SS_MASK));
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}
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static __inline void tcic_wait_ready(struct tcic_handle *);
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static __inline void
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tcic_wait_ready(h)
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struct tcic_handle *h;
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{
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int i;
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/* XXX appropriate socket must have been selected already. */
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for (i = 0; i < 10000; i++) {
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if (tcic_read_1(h, TCIC_R_SSTAT) & TCIC_SSTAT_RDY)
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return;
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delay(500);
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}
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#ifdef DIAGNOSTIC
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printf("tcic_wait_ready ready never happened\n");
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#endif
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}
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static __inline int tcic_read_aux_1(bus_space_tag_t, bus_space_handle_t, int, int);
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static __inline int
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tcic_read_aux_1(iot, ioh, auxreg, reg)
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int auxreg;
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int reg;
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{
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int mode, val;
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mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
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bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
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val = bus_space_read_1(iot, ioh, reg);
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return val;
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}
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static __inline int tcic_read_aux_2(bus_space_tag_t, bus_space_handle_t, int);
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static __inline int
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tcic_read_aux_2(iot, ioh, auxreg)
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int auxreg;
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{
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int mode, val;
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mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
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bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
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val = bus_space_read_2(iot, ioh, TCIC_R_AUX);
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return val;
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}
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static __inline void tcic_write_aux_1(bus_space_tag_t, bus_space_handle_t, int, int, int);
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static __inline void
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tcic_write_aux_1(iot, ioh, auxreg, reg, val)
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int auxreg, reg, val;
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{
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int mode;
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mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
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bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
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bus_space_write_1(iot, ioh, reg, val);
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}
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static __inline void tcic_write_aux_2(bus_space_tag_t, bus_space_handle_t, int, int);
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static __inline void
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tcic_write_aux_2(iot, ioh, auxreg, val)
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bus_space_tag_t iot;
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bus_space_handle_t ioh;
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int auxreg, val;
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{
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int mode;
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mode = bus_space_read_1(iot, ioh, TCIC_R_MODE);
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bus_space_write_1(iot, ioh, TCIC_R_MODE, (mode & ~TCIC_AR_MASK)|auxreg);
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bus_space_write_2(iot, ioh, TCIC_R_AUX, val);
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}
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#endif /* _TCIC2VAR_H */
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