cafe884d2c
BIT -> __BIT BITS -> __BITS
182 lines
6.8 KiB
C
182 lines
6.8 KiB
C
/* $NetBSD: al2210reg.h,v 1.4 2006/03/08 08:26:50 dyoung Exp $ */
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/*
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* Copyright (c) 2004 David Young. All rights reserved.
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*
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* This code was written by David Young.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of the author nor the names of any co-contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY David Young ``AS IS'' AND ANY
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* EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
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* THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A
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* PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL David
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* Young BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
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* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED
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* TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
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* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
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* OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
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* OF SUCH DAMAGE.
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*/
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#ifndef _DEV_IC_AL2210REG_H_
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#define _DEV_IC_AL2210REG_H_
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/*
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* Register definitions for the Airoha AL2210 2.4GHz 802.11b
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* transceiver.
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*/
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/* NOTE WELL: These register definitions, in spite of being derived
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* from an "official" Airoha AL2210 datasheet, contain a lot of
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* "magic." Comparing with the magic in this header file with a
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* reference driver that also contains AL2210 magic, the magic does
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* not match!
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*/
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/*
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* Serial bus format for Airoha AL2210 2.4GHz transceiver.
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*/
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#define AL2210_TWI_DATA_MASK __BITS(23, 4)
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#define AL2210_TWI_ADDR_MASK __BITS(3, 0)
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/*
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* Registers for Airoha AL2210.
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*/
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/* The synthesizer magic should be decipherable, but I'm not going
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* to waste my time right now.
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*/
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#define AL2210_CHANNEL 0x0
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#define AL2210_CHANNEL_B_MASK __BITS(10, 5) /* Counter B */
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#define AL2210_CHANNEL_B_2412MHZ 0x396
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#define AL2210_CHANNEL_B_2417MHZ 0x396
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#define AL2210_CHANNEL_B_2422MHZ 0x396
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#define AL2210_CHANNEL_B_2427MHZ 0x396
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#define AL2210_CHANNEL_B_2432MHZ 0x398
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#define AL2210_CHANNEL_B_2437MHZ 0x398
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#define AL2210_CHANNEL_B_2442MHZ 0x398
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#define AL2210_CHANNEL_B_2447MHZ 0x398
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#define AL2210_CHANNEL_B_2452MHZ 0x398
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#define AL2210_CHANNEL_B_2457MHZ 0x398
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#define AL2210_CHANNEL_B_2462MHZ 0x398
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#define AL2210_CHANNEL_B_2467MHZ 0x39a
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#define AL2210_CHANNEL_B_2472MHZ 0x39a
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#define AL2210_CHANNEL_B_2484MHZ 0x39b
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#define AL2210_CHANNEL_A_MASK __BITS(4, 0) /* Counter A */
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#define AL2210_CHANNEL_A_2412MHZ 0x0c
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#define AL2210_CHANNEL_A_2417MHZ 0x11
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#define AL2210_CHANNEL_A_2422MHZ 0x16
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#define AL2210_CHANNEL_A_2427MHZ 0x1b
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#define AL2210_CHANNEL_A_2432MHZ 0x00
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#define AL2210_CHANNEL_A_2437MHZ 0x05
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#define AL2210_CHANNEL_A_2442MHZ 0x0a
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#define AL2210_CHANNEL_A_2447MHZ 0x0f
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#define AL2210_CHANNEL_A_2452MHZ 0x14
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#define AL2210_CHANNEL_A_2457MHZ 0x10
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#define AL2210_CHANNEL_A_2462MHZ 0x1e
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#define AL2210_CHANNEL_A_2467MHZ 0x03
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#define AL2210_CHANNEL_A_2472MHZ 0x08
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#define AL2210_CHANNEL_A_2484MHZ 0x14
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#define AL2210_SYNTHESIZER 0x1
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#define AL2210_SYNTHESIZER_R_MASK __BITS(4, 0) /* Reference
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* divider
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*/
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#define AL2210_RECEIVER 0x2
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/* Rx VAGC Detector Negative Edge Threshold */
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#define AL2210_RECEIVER_AGCDET_P_MASK __BITS(16, 15)
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#define AL2210_RECEIVER_AGCDET_P_0_4V 0 /* 0.4V */
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#define AL2210_RECEIVER_AGCDET_P_0_3V 1 /* 0.3V */
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#define AL2210_RECEIVER_AGCDET_P_0_2V 2 /* 0.2V */
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#define AL2210_RECEIVER_AGCDET_P_RSVD 3 /* reserved */
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/* Rx VAGC Detector Negative Edge Threshold */
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#define AL2210_RECEIVER_AGCDET_N_MASK __BITS(14, 13)
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#define AL2210_RECEIVER_AGCDET_N_0_4V 0 /* 0.4V */
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#define AL2210_RECEIVER_AGCDET_N_0_3V 1 /* 0.3V */
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#define AL2210_RECEIVER_AGCDET_N_0_2V 2 /* 0.2V */
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#define AL2210_RECEIVER_AGCDET_N_RSVD 3 /* reserved */
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/* AGC detector control, 1: enable, 0: disable. */
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#define AL2210_RECEIVER_AGCDETENA __BIT(11)
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/* Rx filter bandwidth select */
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#define AL2210_RECEIVER_BW_SEL_MASK __BITS(4, 2)
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#define AL2210_RECEIVER_BW_SEL_9_5MHZ 0
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#define AL2210_RECEIVER_BW_SEL_9MHZ 1
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#define AL2210_RECEIVER_BW_SEL_8_5MHZ 2
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#define AL2210_RECEIVER_BW_SEL_8MHZ 3
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#define AL2210_RECEIVER_BW_SEL_7_5MHZ 4
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#define AL2210_RECEIVER_BW_SEL_7MHZ 5
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#define AL2210_RECEIVER_BW_SEL_6_5MHZ 6
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#define AL2210_RECEIVER_BW_SEL_6MHZ 7
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#define AL2210_TRANSMITTER 0x3
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/* 2nd-stage power amplifier current control. Units of 20uA.
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* "Full scale" current is 300uA. (Is full-scale at PABIAS2 = 0 or
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* at PABIAS2 = 15?)
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*/
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#define AL2210_TRANSMITTER_PABIAS2_MASK __BITS(7, 4)
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/* 1st-stage power amplifier current control. Units of 20uA.
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* "Full scale" current is 300uA. (Is full-scale at PABIAS2 = 0 or
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* at PABIAS2 = 15?)
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*/
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#define AL2210_TRANSMITTER_PABIAS1_MASK __BITS(3, 0)
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#define AL2210_CONFIG1 0x4
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#define AL2210_CONFIG2 0x5
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/* Regulator power. 0: on, 1: off. */
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#define AL2210_CONFIG2_REGPD_MASK __BIT(19)
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/* XO clock setting. 0: 44MHz, 1: 22MHz. */
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#define AL2210_CONFIG2_XTAL_SC_MASK __BIT(10)
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/* DC Offset Calibration (DCOC) */
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#define AL2210_CONFIG3 0x6
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/* Select 1MHz DCOC timing. */
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#define AL2210_CONFIG3_AGC_DET_PATT_1MHZ __BIT(17)
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/* Select 100kHz DCOC timing. */
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#define AL2210_CONFIG3_AGC_DET_PATT_100KHZ __BIT(16)
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#define AL2210_CONFIG3_LNA_GAIN_PATT_1MHZ __BITS(15)
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#define AL2210_CONFIG3_LNA_GAIN_PATT_100KHZ __BITS(14)
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#define AL2210_CONFIG3_RXON_PATT_1MHZ __BITS(13)
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#define AL2210_CONFIG3_RXON_PATT_1OOKHZ __BITS(12)
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/* 1MHz DCOC duration? Microseconds. */
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#define AL2210_CONFIG3_CNT_1M_AGC_MASK __BITS(11, 8)
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#define AL2210_CONFIG3_CNT_1M_LNA_MASK __BITS(7, 4)
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#define AL2210_CONFIG3_CNT_1M_RXON_MASK __BITS(3, 0)
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#define AL2210_CONFIG4 0x7
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/* 100kHz DCOC duration? Microseconds. */
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#define AL2210_CONFIG4_CNT_100K_AGC_MASK __BITS(11, 8)
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#define AL2210_CONFIG4_CNT_100K_LNA_MASK __BITS(7, 4)
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#define AL2210_CONFIG4_CNT_100K_RXON_MASK __BITS(3, 0)
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#define AL2210_CONFIG5 0x8
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#define AL2210_CONFIG5_TXF_BW_MASK __BITS(9, 8)
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#define AL2210_CONFIG5_TXF_BW_12MHZ 3
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#define AL2210_CONFIG5_TXF_BW_11MHZ 2
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#define AL2210_CONFIG5_TXF_BW_10MHZ 1
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#define AL2210_CONFIG5_TXF_BW_9MHZ 0
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#define AL2210_CONFIG6 0x9
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#define AL2210_CONFIG6_DEFAULT 0x2c0009 /* magic */
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#define AL2210_CONFIG7 0xa
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#define AL2210_CONFIG7_DEFAULT 0x001c0a /* magic */
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#define AL2210_CONFIG8 0xb
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#define AL2210_CONFIG8_DEFAULT 0x01000b /* magic */
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#endif /* _DEV_IC_AL2210REG_H_ */
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