matt ee6cde04ff Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead ... but add a second argument to it to indicate whether the TLB/caches need to be flushed. Default cortex to pmap_needs_fixup = 1. But check the MMFR3 field to see if the fixed can be skipped. Use a cf_flag bit 0 to indicate whether the A9 L2 cache should disable (bit 0 = 1) or enabeld (bit = 0). With these changes, the A9 MMU can use traverse caches to do MMU tablewalks Also, make sure all memory has the shareable bit for the A9.		2012-09-22 00:33:36 +00:00
..
compile
conf	Update all kernel configs mentioning WSEMUL_* but not already including	2012-08-17 20:11:37 +00:00
dev	fix RCSID.	2012-08-12 08:59:58 +00:00
include	Remove unused __NEWINTR defines	2012-06-10 13:15:24 +00:00
stand	Support to read the kernel from local file system.	2012-01-18 23:12:21 +00:00
zaurus	Don't use an asm in pmap_activate to update the TTBR, use cpu_setttb instead	2012-09-22 00:33:36 +00:00
Makefile	Use ${TOOL_SED} instead if plain sed in Makefiles.	2008-10-25 22:27:34 +00:00