306 lines
9.2 KiB
C
306 lines
9.2 KiB
C
/* $NetBSD: xen.h,v 1.1 2004/03/11 21:44:08 cl Exp $ */
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/*
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*
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* Copyright (c) 2003, 2004 Keir Fraser (on behalf of the Xen team)
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy
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* of this software and associated documentation files (the "Software"), to
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* deal in the Software without restriction, including without limitation the
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* rights to use, copy, modify, merge, publish, distribute, sublicense, and/or
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* sell copies of the Software, and to permit persons to whom the Software is
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* furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*/
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#ifndef _XEN_H
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#define _XEN_H
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#ifndef _LOCORE
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typedef uint16_t u16;
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typedef uint32_t u32;
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typedef uint64_t u64;
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#ifdef XENDEBUG
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void printk(const char *, ...);
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#endif
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void xencn_attach(void);
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#endif
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#define hypervisor_asm_ack(num) \
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movl HYPERVISOR_shared_info,%eax ;\
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lock ;\
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btsl $num,EVENTS_MASK(%eax)
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#endif
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/******************************************************************************
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* os.h
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*
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* random collection of macros and definition
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*/
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#ifndef _OS_H_
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#define _OS_H_
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/*
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* These are the segment descriptors provided for us by the hypervisor.
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* For now, these are hardwired -- guest OSes cannot update the GDT
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* or LDT.
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*
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* It shouldn't be hard to support descriptor-table frobbing -- let me
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* know if the BSD or XP ports require flexibility here.
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*/
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/*
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* these are also defined in hypervisor-if.h but can't be pulled in as
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* they are used in start of day assembly. Need to clean up the .h files
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* a bit more...
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*/
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#ifndef FLAT_RING1_CS
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#define FLAT_RING1_CS 0x0819
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#define FLAT_RING1_DS 0x0821
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#define FLAT_RING3_CS 0x082b
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#define FLAT_RING3_DS 0x0833
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#endif
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#define __KERNEL_CS FLAT_RING1_CS
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#define __KERNEL_DS FLAT_RING1_DS
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/* Everything below this point is not included by assembler (.S) files. */
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#ifndef _LOCORE
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#include <machine/hypervisor-ifs/hypervisor-if.h>
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/* this struct defines the way the registers are stored on the
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stack during an exception or interrupt. */
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struct pt_regs {
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long ebx;
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long ecx;
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long edx;
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long esi;
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long edi;
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long ebp;
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long eax;
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int xds;
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int xes;
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long orig_eax;
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long eip;
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int xcs;
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long eflags;
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long esp;
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int xss;
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};
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/* some function prototypes */
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void trap_init(void);
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void dump_regs(struct pt_regs *regs);
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/*
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* STI/CLI equivalents. These basically set and clear the virtual
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* event_enable flag in teh shared_info structure. Note that when
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* the enable bit is set, there may be pending events to be handled.
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* We may therefore call into do_hypervisor_callback() directly.
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*/
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#define unlikely(x) __builtin_expect((x),0)
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#define __save_flags(x) \
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do { \
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(x) = test_bit(EVENTS_MASTER_ENABLE_BIT, \
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&HYPERVISOR_shared_info->events_mask); \
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barrier(); \
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} while (0)
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#define __restore_flags(x) \
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do { \
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shared_info_t *_shared = HYPERVISOR_shared_info; \
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if (x) set_bit(EVENTS_MASTER_ENABLE_BIT, &_shared->events_mask); \
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barrier(); \
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} while (0)
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/* if ( unlikely(_shared->events) && (x) ) do_hypervisor_callback(NULL); \ */
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#define __cli() \
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do { \
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clear_bit(EVENTS_MASTER_ENABLE_BIT, &HYPERVISOR_shared_info->events_mask);\
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barrier(); \
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} while (0)
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#define __sti() \
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do { \
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shared_info_t *_shared = HYPERVISOR_shared_info; \
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set_bit(EVENTS_MASTER_ENABLE_BIT, &_shared->events_mask); \
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barrier(); \
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} while (0)
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/* if ( unlikely(_shared->events) ) do_hypervisor_callback(NULL); \ */
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#define cli() __cli()
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#define sti() __sti()
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#define save_flags(x) __save_flags(x)
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#define restore_flags(x) __restore_flags(x)
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#define save_and_cli(x) __save_and_cli(x)
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#define save_and_sti(x) __save_and_sti(x)
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/* This is a barrier for the compiler only, NOT the processor! */
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#define barrier() __asm__ __volatile__("": : :"memory")
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#define __LOCK_PREFIX ""
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#define __LOCK ""
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#define __ADDR (*(volatile long *) addr)
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/*
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* Make sure gcc doesn't try to be clever and move things around
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* on us. We need to use _exactly_ the address the user gave us,
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* not some alias that contains the same information.
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*/
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typedef struct { volatile int counter; } atomic_t;
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#define xchg(ptr,v) \
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((__typeof__(*(ptr)))__xchg((unsigned long)(v),(ptr),sizeof(*(ptr))))
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struct __xchg_dummy { unsigned long a[100]; };
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#define __xg(x) ((struct __xchg_dummy *)(x))
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static inline unsigned long __xchg(unsigned long x, volatile void * ptr,
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int size)
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{
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switch (size) {
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case 1:
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__asm__ __volatile__("xchgb %b0,%1"
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:"=q" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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break;
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case 2:
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__asm__ __volatile__("xchgw %w0,%1"
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:"=r" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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break;
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case 4:
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__asm__ __volatile__("xchgl %0,%1"
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:"=r" (x)
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:"m" (*__xg(ptr)), "0" (x)
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:"memory");
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break;
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}
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return x;
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}
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/**
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* test_and_clear_bit - Clear a bit and return its old value
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* @nr: Bit to set
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* @addr: Address to count from
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*
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* This operation is atomic and cannot be reordered.
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* It also implies a memory barrier.
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*/
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static __inline__ int test_and_clear_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__( __LOCK_PREFIX
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"btrl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit),"=m" (__ADDR)
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:"Ir" (nr) : "memory");
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return oldbit;
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}
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static __inline__ int constant_test_bit(int nr, const volatile void * addr)
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{
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return ((1UL << (nr & 31)) & (((const volatile unsigned int *) addr)[nr >> 5])) != 0;
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}
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static __inline__ int variable_test_bit(int nr, volatile void * addr)
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{
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int oldbit;
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__asm__ __volatile__(
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"btl %2,%1\n\tsbbl %0,%0"
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:"=r" (oldbit)
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:"m" (__ADDR),"Ir" (nr));
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return oldbit;
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}
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#define test_bit(nr,addr) \
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(__builtin_constant_p(nr) ? \
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constant_test_bit((nr),(addr)) : \
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variable_test_bit((nr),(addr)))
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/**
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* set_bit - Atomically set a bit in memory
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* @nr: the bit to set
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* @addr: the address to start counting from
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*
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* This function is atomic and may not be reordered. See __set_bit()
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* if you do not require the atomic guarantees.
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* Note that @nr may be almost arbitrarily large; this function is not
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* restricted to acting on a single-word quantity.
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*/
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static __inline__ void set_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__( __LOCK_PREFIX
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"btsl %1,%0"
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:"=m" (__ADDR)
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:"Ir" (nr));
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}
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/**
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* clear_bit - Clears a bit in memory
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* @nr: Bit to clear
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* @addr: Address to start counting from
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*
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* clear_bit() is atomic and may not be reordered. However, it does
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* not contain a memory barrier, so if it is used for locking purposes,
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* you should call smp_mb__before_clear_bit() and/or smp_mb__after_clear_bit()
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* in order to ensure changes are visible on other processors.
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*/
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static __inline__ void clear_bit(int nr, volatile void * addr)
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{
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__asm__ __volatile__( __LOCK_PREFIX
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"btrl %1,%0"
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:"=m" (__ADDR)
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:"Ir" (nr));
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}
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/**
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* atomic_inc - increment atomic variable
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* @v: pointer of type atomic_t
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*
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* Atomically increments @v by 1. Note that the guaranteed
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* useful range of an atomic_t is only 24 bits.
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*/
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static __inline__ void atomic_inc(atomic_t *v)
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{
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__asm__ __volatile__(
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__LOCK "incl %0"
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:"=m" (v->counter)
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:"m" (v->counter));
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}
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#define rdtscll(val) \
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__asm__ __volatile__("rdtsc" : "=A" (val))
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#endif /* !__ASSEMBLY__ */
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#endif /* _OS_H_ */
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