209 lines
8.0 KiB
C
209 lines
8.0 KiB
C
/* $NetBSD: atavar.h,v 1.26 2002/08/05 23:29:30 soren Exp $ */
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/*
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* Copyright (c) 1998, 2001 Manuel Bouyer.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Manuel Bouyer.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*
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*/
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/* Hight-level functions and structures used by both ATA and ATAPI devices */
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/* Datas common to drives and controller drivers */
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struct ata_drive_datas {
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u_int8_t drive; /* drive number */
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int8_t ata_vers; /* ATA version supported */
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u_int16_t drive_flags; /* bitmask for drives present/absent and cap */
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#define DRIVE_ATA 0x0001
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#define DRIVE_ATAPI 0x0002
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#define DRIVE_OLD 0x0004
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#define DRIVE (DRIVE_ATA|DRIVE_ATAPI|DRIVE_OLD)
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#define DRIVE_CAP32 0x0008
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#define DRIVE_DMA 0x0010
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#define DRIVE_UDMA 0x0020
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#define DRIVE_MODE 0x0040 /* the drive reported its mode */
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#define DRIVE_RESET 0x0080 /* reset the drive state at next xfer */
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#define DRIVE_DMAERR 0x0100 /* Udma transfer had crc error, don't try DMA */
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#define DRIVE_ATAPIST 0x0100 /* device is an ATAPI tape drive */
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/*
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* Current setting of drive's PIO, DMA and UDMA modes.
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* Is initialised by the disks drivers at attach time, and may be
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* changed later by the controller's code if needed
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*/
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u_int8_t PIO_mode; /* Current setting of drive's PIO mode */
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u_int8_t DMA_mode; /* Current setting of drive's DMA mode */
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u_int8_t UDMA_mode; /* Current setting of drive's UDMA mode */
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/* Supported modes for this drive */
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u_int8_t PIO_cap; /* supported drive's PIO mode */
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u_int8_t DMA_cap; /* supported drive's DMA mode */
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u_int8_t UDMA_cap; /* supported drive's UDMA mode */
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/*
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* Drive state.
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* This is reset to 0 after a channel reset.
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*/
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u_int8_t state;
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#define RESET 0
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#define RECAL 1
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#define RECAL_WAIT 2
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#define PIOMODE 3
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#define PIOMODE_WAIT 4
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#define DMAMODE 5
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#define DMAMODE_WAIT 6
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#define GEOMETRY 7
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#define GEOMETRY_WAIT 8
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#define MULTIMODE 9
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#define MULTIMODE_WAIT 10
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#define READY 11
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/* numbers of xfers and DMA errs. Used by ata_dmaerr() */
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u_int8_t n_dmaerrs;
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u_int32_t n_xfers;
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/* Downgrade after NERRS_MAX errors in at most NXFER xfers */
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#define NERRS_MAX 4
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#define NXFER 4000
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struct device *drv_softc; /* ATA drives softc, if any */
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void* chnl_softc; /* channel softc */
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};
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/* User config flags that force (or disable) the use of a mode */
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#define ATA_CONFIG_PIO_MODES 0x0007
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#define ATA_CONFIG_PIO_SET 0x0008
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#define ATA_CONFIG_PIO_OFF 0
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#define ATA_CONFIG_DMA_MODES 0x0070
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#define ATA_CONFIG_DMA_SET 0x0080
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#define ATA_CONFIG_DMA_DISABLE 0x0070
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#define ATA_CONFIG_DMA_OFF 4
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#define ATA_CONFIG_UDMA_MODES 0x0700
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#define ATA_CONFIG_UDMA_SET 0x0800
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#define ATA_CONFIG_UDMA_DISABLE 0x0700
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#define ATA_CONFIG_UDMA_OFF 8
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/*
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* ATA/ATAPI commands description
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*
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* This structure defines the interface between the ATA/ATAPI device driver
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* and the controller for short commands. It contains the command's parameter,
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* the len of data's to read/write (if any), and a function to call upon
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* completion.
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* If no sleep is allowed, the driver can poll for command completion.
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* Once the command completed, if the error registed is valid, the flag
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* AT_ERROR is set and the error register value is copied to r_error .
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* A separate interface is needed for read/write or ATAPI packet commands
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* (which need multiple interrupts per commands).
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*/
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struct wdc_command {
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u_int8_t r_command; /* Parameters to upload to registers */
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u_int8_t r_head;
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u_int16_t r_cyl;
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u_int8_t r_sector;
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u_int8_t r_count;
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u_int8_t r_precomp;
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u_int8_t r_st_bmask; /* status register mask to wait for before command */
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u_int8_t r_st_pmask; /* status register mask to wait for after command */
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u_int8_t r_error; /* error register after command done */
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volatile u_int16_t flags;
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#define AT_READ 0x0001 /* There is data to read */
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#define AT_WRITE 0x0002 /* There is data to write (excl. with AT_READ) */
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#define AT_WAIT 0x0008 /* wait in controller code for command completion */
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#define AT_POLL 0x0010 /* poll for command completion (no interrupts) */
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#define AT_DONE 0x0020 /* command is done */
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#define AT_XFDONE 0x0040 /* data xfer is done */
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#define AT_ERROR 0x0080 /* command is done with error */
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#define AT_TIMEOU 0x0100 /* command timed out */
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#define AT_DF 0x0200 /* Drive fault */
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#define AT_READREG 0x0400 /* Read registers on completion */
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int timeout; /* timeout (in ms) */
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void *data; /* Data buffer address */
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int bcount; /* number of bytes to transfer */
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void (*callback) __P((void*)); /* command to call once command completed */
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void *callback_arg; /* argument passed to *callback() */
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};
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/*
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* If WDSM_ATTR_ADVISORY, device exceeded intended design life period.
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* If not WDSM_ATTR_ADVISORY, imminent data loss predicted.
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*/
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#define WDSM_ATTR_ADVISORY 1
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/*
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* If WDSM_ATTR_COLLECTIVE, attribute only updated in off-line testing.
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* If not WDSM_ATTR_COLLECTIVE, attribute updated also in on-line testing.
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*/
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#define WDSM_ATTR_COLLECTIVE 2
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struct ata_smart_attr {
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u_int8_t id; /* attribute id number */
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u_int16_t flags;
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u_int8_t value; /* attribute value */
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u_int8_t vendor_specific[8];
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} __attribute__((packed));
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struct ata_smart_attributes {
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u_int16_t data_structure_revision;
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struct ata_smart_attr attributes[30];
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u_int8_t offline_data_collection_status;
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u_int8_t self_test_exec_status;
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u_int16_t total_time_to_complete_off_line;
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u_int8_t vendor_specific_366;
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u_int8_t offline_data_collection_capability;
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u_int16_t smart_capability;
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u_int8_t errorlog_capability;
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u_int8_t vendor_specific_371;
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u_int8_t short_test_completion_time;
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u_int8_t extend_test_completion_time;
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u_int8_t reserved_374_385[12];
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u_int8_t vendor_specific_386_509[125];
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int8_t checksum;
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} __attribute__((packed));
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struct ata_smart_thresh {
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u_int8_t id;
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u_int8_t value;
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u_int8_t reserved[10];
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} __attribute__((packed));
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struct ata_smart_thresholds {
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u_int16_t data_structure_revision;
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struct ata_smart_thresh thresholds[30];
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u_int8_t reserved[18];
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u_int8_t vendor_specific[131];
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int8_t checksum;
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} __attribute__((packed));
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int wdc_downgrade_mode __P((struct ata_drive_datas*));
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struct ataparams;
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int ata_get_params __P((struct ata_drive_datas*, u_int8_t,
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struct ataparams *));
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int ata_set_mode __P((struct ata_drive_datas*, u_int8_t, u_int8_t));
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/* return code for these cmds */
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#define CMD_OK 0
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#define CMD_ERR 1
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#define CMD_AGAIN 2
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void ata_dmaerr __P((struct ata_drive_datas *));
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