199 lines
6.6 KiB
C
199 lines
6.6 KiB
C
/* $NetBSD: pciidevar.h,v 1.12 2003/10/08 11:51:59 bouyer Exp $ */
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/*
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* Copyright (c) 1998 Christopher G. Demetriou. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Christopher G. Demetriou
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* for the NetBSD Project.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* PCI IDE driver exported software structures.
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*
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* Author: Christopher G. Demetriou, March 2, 1998.
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*/
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#include <dev/ata/atavar.h>
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#include <dev/ic/wdcreg.h>
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#include <dev/ic/wdcvar.h>
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#include "opt_pciide.h"
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#ifndef WDCDEBUG
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#define WDCDEBUG
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#endif
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#define DEBUG_DMA 0x01
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#define DEBUG_XFERS 0x02
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#define DEBUG_FUNCS 0x08
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#define DEBUG_PROBE 0x10
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#ifdef WDCDEBUG
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extern int wdcdebug_pciide_mask;
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#define WDCDEBUG_PRINT(args, level) \
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if (wdcdebug_pciide_mask & (level)) printf args
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#else
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#define WDCDEBUG_PRINT(args, level)
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#endif
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struct device;
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struct pciide_softc {
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struct wdc_softc sc_wdcdev; /* common wdc definitions */
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pci_chipset_tag_t sc_pc; /* PCI registers info */
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pcitag_t sc_tag;
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void *sc_pci_ih; /* PCI interrupt handle */
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int sc_dma_ok; /* bus-master DMA info */
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bus_space_tag_t sc_dma_iot;
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bus_space_handle_t sc_dma_ioh;
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bus_dma_tag_t sc_dmat;
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/*
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* Some controllers might have DMA restrictions other than
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* the norm.
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*/
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bus_size_t sc_dma_maxsegsz;
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bus_size_t sc_dma_boundary;
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/* For VIA/AMD/nVidia */
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bus_addr_t sc_apo_regbase;
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/* For Cypress */
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const struct cy82c693_handle *sc_cy_handle;
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int sc_cy_compatchan;
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/* for SiS */
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u_int8_t sis_type;
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/* Vendor info (for interpreting Chip description) */
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pcireg_t sc_pci_id;
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/* Chip description */
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const struct pciide_product_desc *sc_pp;
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/* common definitions */
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struct channel_softc *wdc_chanarray[PCIIDE_NUM_CHANNELS];
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/* internal bookkeeping */
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struct pciide_channel { /* per-channel data */
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struct channel_softc wdc_channel; /* generic part */
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char *name;
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int compat; /* is it compat? */
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void *ih; /* compat or pci handle */
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bus_space_handle_t ctl_baseioh; /* ctrl regs blk, native mode */
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/* DMA tables and DMA map for xfer, for each drive */
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struct pciide_dma_maps {
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bus_dmamap_t dmamap_table;
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struct idedma_table *dma_table;
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bus_dmamap_t dmamap_xfer;
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int dma_flags;
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} dma_maps[2];
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} pciide_channels[PCIIDE_NUM_CHANNELS];
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};
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struct pciide_product_desc {
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u_int32_t ide_product;
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int ide_flags;
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const char *ide_name;
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/* map and setup chip, probe drives */
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void (*chip_map) __P((struct pciide_softc*, struct pci_attach_args*));
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};
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/* Flags for ide_flags */
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#define IDE_PCI_CLASS_OVERRIDE 0x0001 /* accept even if class != pciide */
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#define IDE_16BIT_IOSPACE 0x0002 /* I/O space BARS ignore upper word */
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/* inlines for reading/writing 8-bit PCI registers */
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static __inline u_int8_t pciide_pci_read __P((pci_chipset_tag_t, pcitag_t,
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int));
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static __inline void pciide_pci_write __P((pci_chipset_tag_t, pcitag_t,
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int, u_int8_t));
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static __inline u_int8_t
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pciide_pci_read(pc, pa, reg)
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pci_chipset_tag_t pc;
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pcitag_t pa;
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int reg;
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{
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return (pci_conf_read(pc, pa, (reg & ~0x03)) >>
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((reg & 0x03) * 8) & 0xff);
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}
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static __inline void
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pciide_pci_write(pc, pa, reg, val)
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pci_chipset_tag_t pc;
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pcitag_t pa;
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int reg;
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u_int8_t val;
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{
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pcireg_t pcival;
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pcival = pci_conf_read(pc, pa, (reg & ~0x03));
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pcival &= ~(0xff << ((reg & 0x03) * 8));
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pcival |= (val << ((reg & 0x03) * 8));
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pci_conf_write(pc, pa, (reg & ~0x03), pcival);
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}
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void default_chip_map __P((struct pciide_softc*, struct pci_attach_args*));
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void sata_setup_channel __P((struct channel_softc*));
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void pciide_channel_dma_setup __P((struct pciide_channel *));
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int pciide_dma_table_setup __P((struct pciide_softc*, int, int));
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int pciide_dma_init __P((void*, int, int, void *, size_t, int));
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void pciide_dma_start __P((void*, int, int));
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int pciide_dma_finish __P((void*, int, int, int));
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void pciide_irqack __P((struct channel_softc *));
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/*
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* Functions defined by machine-dependent code.
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*/
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/* Attach compat interrupt handler, returning handle or NULL if failed. */
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#ifdef __HAVE_PCIIDE_MACHDEP_COMPAT_INTR_ESTABLISH
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void *pciide_machdep_compat_intr_establish __P((struct device *,
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struct pci_attach_args *, int, int (*)(void *), void *));
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#endif
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const struct pciide_product_desc* pciide_lookup_product
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__P((u_int32_t, const struct pciide_product_desc *));
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void pciide_common_attach
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__P((struct pciide_softc *, struct pci_attach_args *,
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const struct pciide_product_desc *));
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int pciide_chipen __P((struct pciide_softc *, struct pci_attach_args *));
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void pciide_mapregs_compat __P(( struct pci_attach_args *,
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struct pciide_channel *, int, bus_size_t *, bus_size_t*));
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void pciide_mapregs_native __P((struct pci_attach_args *,
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struct pciide_channel *, bus_size_t *, bus_size_t *,
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int (*pci_intr) __P((void *))));
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void pciide_mapreg_dma __P((struct pciide_softc *,
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struct pci_attach_args *));
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int pciide_chansetup __P((struct pciide_softc *, int, pcireg_t));
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void pciide_mapchan __P((struct pci_attach_args *,
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struct pciide_channel *, pcireg_t, bus_size_t *, bus_size_t *,
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int (*pci_intr) __P((void *))));
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void pciide_map_compat_intr __P(( struct pci_attach_args *,
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struct pciide_channel *, int));
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int pciide_compat_intr __P((void *));
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int pciide_pci_intr __P((void *));
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