95 lines
3.2 KiB
C
95 lines
3.2 KiB
C
/*-
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* Copyright (c) 2001, 2002, 2005 Genetec corp.
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* All rights reserved.
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*
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* Written by Hiroyuki Bessho for Genetec corp.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _EVBARM_G42XXEB_VAR_H
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#define _EVBARM_G42XXEB_VAR_H
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <machine/bus.h>
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#include <evbarm/g42xxeb/g42xxeb_reg.h>
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/*
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* G42xxeb on-board IO bus
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*/
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struct obio_softc {
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struct device sc_dev;
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bus_space_tag_t sc_iot;
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bus_space_handle_t sc_obioreg_ioh;
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/* handle to PXA2x0's memory controller.
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XXX: shouldn't be here. */
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bus_space_handle_t sc_memctl_ioh;
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void *sc_ih; /* interrupt handler for obio on pxaip */
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void *sc_si; /* software interrupt handler */
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int sc_intr;
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uint16_t sc_intr_mask;
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uint16_t sc_intr_pending;
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int sc_ipl; /* Max ipl among sub interrupts */
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struct obio_handler {
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int (* func)(void *);
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void *arg;
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int level;
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} sc_handler[G42XXEB_N_INTS];
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};
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typedef void *obio_chipset_tag_t;
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struct obio_attach_args {
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obio_chipset_tag_t oba_sc;
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bus_space_tag_t oba_iot; /* Bus tag */
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bus_addr_t oba_addr; /* i/o address */
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int oba_intr;
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};
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/* on-board hex LED */
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void hex_led( uint32_t value );
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/*
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* IRQ handler
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*/
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void *obio_intr_establish(struct obio_softc *, int, int, int,
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int (*)(void *), void *);
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void obio_intr_disestablish(struct obio_softc *, int, int (*)(void *));
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void obio_intr_mask(struct obio_softc *, struct obio_handler *);
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void obio_intr_unmask(struct obio_softc *, struct obio_handler *);
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#define obio_update_intrmask(sc) \
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bus_space_write_2( (sc)->sc_iot, (sc)->sc_obioreg_ioh, \
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G42XXEB_INTMASK, (sc)->sc_intr_mask | (sc)->sc_intr_pending );
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void obio_peripheral_reset(struct obio_softc *, int, int);
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#endif /* _EVBARM_G42XXEB_VAR_H */
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