3a9ac44b8b
gcc generates calls to this symbol in programs that use __sync_*_compare_and_swap, which require full sequential consistency barriers, including store-before-load ordering on both sides of the atomic; none of the release/acquire operations guarantee that, so we have to insert explicit DMB instructions. Note: gcc's own definition omits some of the DMB instructions, but I can't prove that it's correct that way -- stores preceding the CAS must complete before the load part of the CAS, and the store part of the CAS must complete before loads following the CAS. Maybe there's some way to prove that one of these orderings is guaranteed some other way than a DMB but I'm not seeing it, and store-before-load ordering is hard to understand. Patch by skrll@ based on a patch by mrg@, soliloquy in commit message by me. |
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