351 lines
11 KiB
C
351 lines
11 KiB
C
/* $NetBSD: cpu.h,v 1.72 2003/01/17 23:21:39 thorpej Exp $ */
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/*
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* Copyright (c) 1988 University of Utah.
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* Copyright (c) 1982, 1990 The Regents of the University of California.
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* All rights reserved.
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*
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* This code is derived from software contributed to Berkeley by
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* the Systems Programming Group of the University of Utah Computer
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* Science Department.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the University of
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* California, Berkeley and its contributors.
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* 4. Neither the name of the University nor the names of its contributors
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* may be used to endorse or promote products derived from this software
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* without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Copyright (c) 1992, 1993 BCDL Labs. All rights reserved.
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* Allen Briggs, Chris Caputo, Michael Finch, Brad Grantham, Lawrence Kesteloot
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* Redistribution of this source code or any part thereof is permitted,
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* provided that the following conditions are met:
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* 1) Utilized source contains the copyright message above, this list
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* of conditions, and the following disclaimer.
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* 2) Binary objects containing compiled source reproduce the
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* copyright notice above on startup.
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*
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* CAVEAT: This source code is provided "as-is" by BCDL Labs, and any
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* warranties of ANY kind are disclaimed. We don't even claim that it
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* won't crash your hard disk. Basically, we want a little credit if
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* it works, but we don't want to get mail-bombed if it doesn't.
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*/
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/*
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* from: Utah $Hdr: cpu.h 1.16 91/03/25$
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*
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* @(#)cpu.h 7.7 (Berkeley) 6/27/91
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*/
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#ifndef _CPU_MACHINE_
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#define _CPU_MACHINE_
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/*
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* Exported definitions unique to mac68k/68k cpu support.
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*/
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#if defined(_KERNEL_OPT)
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#include "opt_lockdebug.h"
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#endif
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/*
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* Get common m68k definitions.
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*/
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#include <m68k/cpu.h>
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#define M68K_MMU_MOTOROLA
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/*
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* Get interrupt glue.
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*/
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#include <machine/intr.h>
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#include <sys/sched.h>
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struct cpu_info {
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struct schedstate_percpu ci_schedstate; /* scheduler state */
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#if defined(DIAGNOSTIC) || defined(LOCKDEBUG)
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u_long ci_spin_locks; /* # of spin locks held */
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u_long ci_simple_locks; /* # of simple locks held */
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#endif
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};
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#ifdef _KERNEL
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extern struct cpu_info cpu_info_store;
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#define curcpu() (&cpu_info_store)
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/*
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* definitions of cpu-dependent requirements
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* referenced in generic code
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*/
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#define cpu_swapin(p) /* nothing */
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#define cpu_wait(p) /* nothing */
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#define cpu_swapout(p) /* nothing */
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#define cpu_number() 0
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void cpu_proc_fork(struct proc *, struct proc *);
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/*
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* Arguments to hardclock and gatherstats encapsulate the previous
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* machine state in an opaque clockframe. One the hp300, we use
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* what the hardware pushes on an interrupt (frame format 0).
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*/
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struct clockframe {
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u_short sr; /* sr at time of interrupt */
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u_long pc; /* pc at time of interrupt */
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u_short vo; /* vector offset (4-word frame) */
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} __attribute__((packed));
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#define CLKF_USERMODE(framep) (((framep)->sr & PSL_S) == 0)
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#define CLKF_BASEPRI(framep) (((framep)->sr & PSL_IPL) == 0)
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#define CLKF_PC(framep) ((framep)->pc)
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#define CLKF_INTR(framep) (0) /* XXX should use PSL_M (see hp300) */
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/*
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* Preempt the current process if in interrupt from user mode,
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* or after the current trap/syscall if in system mode.
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*/
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extern int want_resched; /* resched() was called */
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#define need_resched(ci) { want_resched++; aston(); }
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/*
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* Give a profiling tick to the current process from the softclock
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* interrupt. Request an ast to send us through trap(),
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* marking the proc as needing a profiling tick.
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*/
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#define need_proftick(p) ( (p)->p_flag |= P_OWEUPC, aston() )
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/*
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* Notify the current process (p) that it has a signal pending,
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* process as soon as possible.
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*/
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#define signotify(p) aston()
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extern int astpending; /* need to trap before returning to user mode */
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#define aston() (astpending++)
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#endif /* _KERNEL */
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#define CPU_CONSDEV 1
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#define CPU_MAXID 2
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#define CTL_MACHDEP_NAMES { \
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{ 0, 0 }, \
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{ "console_device", CTLTYPE_STRUCT }, \
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}
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/* values for machineid --
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* These are equivalent to the MacOS Gestalt values. */
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#define MACH_MACII 6
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#define MACH_MACIIX 7
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#define MACH_MACIICX 8
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#define MACH_MACSE30 9
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#define MACH_MACIICI 11
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#define MACH_MACIIFX 13
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#define MACH_MACIISI 18
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#define MACH_MACQ900 20
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#define MACH_MACPB170 21
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#define MACH_MACQ700 22
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#define MACH_MACCLASSICII 23
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#define MACH_MACPB100 24
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#define MACH_MACPB140 25
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#define MACH_MACQ950 26
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#define MACH_MACLCIII 27
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#define MACH_MACPB210 29
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#define MACH_MACC650 30
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#define MACH_MACPB230 32
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#define MACH_MACPB180 33
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#define MACH_MACPB160 34
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#define MACH_MACQ800 35
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#define MACH_MACQ650 36
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#define MACH_MACLCII 37
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#define MACH_MACPB250 38
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#define MACH_MACIIVI 44
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#define MACH_MACP600 45
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#define MACH_MACIIVX 48
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#define MACH_MACCCLASSIC 49
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#define MACH_MACPB165C 50
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#define MACH_MACC610 52
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#define MACH_MACQ610 53
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#define MACH_MACPB145 54
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#define MACH_MACLC520 56
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#define MACH_MACC660AV 60
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#define MACH_MACP460 62
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#define MACH_MACPB180C 71
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#define MACH_MACPB500 72
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#define MACH_MACPB270 77
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#define MACH_MACQ840AV 78
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#define MACH_MACP550 80
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#define MACH_MACCCLASSICII 83
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#define MACH_MACPB165 84
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#define MACH_MACPB190CS 85
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#define MACH_MACTV 88
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#define MACH_MACLC475 89
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#define MACH_MACLC475_33 90
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#define MACH_MACLC575 92
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#define MACH_MACQ605 94
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#define MACH_MACQ605_33 95
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#define MACH_MACQ630 98
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#define MACH_MACP580 99
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#define MACH_MACPB280 102
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#define MACH_MACPB280C 103
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#define MACH_MACPB150 115
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#define MACH_MACPB190 122
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/*
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* Machine classes. These define subsets of the above machines.
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*/
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#define MACH_CLASSH 0x0000 /* Hopeless cases... */
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#define MACH_CLASSII 0x0001 /* MacII class */
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#define MACH_CLASSIIci 0x0004 /* Have RBV, but no Egret */
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#define MACH_CLASSIIsi 0x0005 /* Similar to IIci -- Have Egret. */
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#define MACH_CLASSIIvx 0x0006 /* Similar to IIsi -- different via2 emul? */
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#define MACH_CLASSLC 0x0007 /* Low-Cost/Performa/Wal-Mart Macs. */
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#define MACH_CLASSPB 0x0008 /* Powerbooks. Power management. */
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#define MACH_CLASSDUO 0x0009 /* Powerbooks Duos. More integration/Docks. */
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#define MACH_CLASSIIfx 0x0080 /* The IIfx is in a class by itself. */
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#define MACH_CLASSQ 0x0100 /* non-A/V Centris/Quadras. */
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#define MACH_CLASSAV 0x0101 /* A/V Centris/Quadras. */
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#define MACH_CLASSQ2 0x0102 /* More Centris/Quadras, different sccA. */
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#define MACH_CLASSP580 0x0103 /* Similar to Quadras, but not quite.. */
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#define MACH_68020 0
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#define MACH_68030 1
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#define MACH_68040 2
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#define MACH_PENTIUM 3 /* 66 and 99 MHz versions *only* */
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#ifdef _KERNEL
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struct mac68k_machine_S {
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int cpu_model_index;
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/*
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* Misc. info from booter.
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*/
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int machineid;
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int mach_processor;
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int mach_memsize;
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int booter_version;
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/*
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* Debugging flags.
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*/
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int do_graybars;
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int serial_boot_echo;
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int serial_console;
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int zs_chip; /* what type of chip we've got */
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int modem_flags;
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int modem_cts_clk;
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int modem_dcd_clk;
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int modem_d_speed;
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int print_flags;
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int print_cts_clk;
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int print_dcd_clk;
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int print_d_speed;
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/*
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* Misc. hardware info.
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*/
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int scsi80; /* Has NCR 5380 */
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int scsi96; /* Has NCR 53C96 */
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int scsi96_2; /* Has 2nd 53C96 */
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int sonic; /* Has SONIC e-net */
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int via1_ipl;
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int via2_ipl;
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int aux_interrupts;
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};
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/* What kind of model is this */
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struct cpu_model_info {
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int machineid; /* MacOS Gestalt value. */
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char *model_major; /* Make this distinction to save a few */
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char *model_minor; /* bytes--might be useful, too. */
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int class; /* Rough class of machine. */
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/* forwarded romvec_s is defined in mac68k/macrom.h */
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struct romvec_s *rom_vectors; /* Pointer to our known rom vectors */
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};
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extern struct cpu_model_info *current_mac_model;
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extern unsigned long IOBase; /* Base address of I/O */
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extern unsigned long NuBusBase; /* Base address of NuBus */
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extern struct mac68k_machine_S mac68k_machine;
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extern unsigned long load_addr;
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#endif /* _KERNEL */
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/* physical memory sections */
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#define ROMBASE (0x40800000)
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#define ROMLEN (0x00200000) /* 2MB will work for all 68k */
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#define ROMMAPSIZE btoc(ROMLEN) /* 32k of page tables. */
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#define IIOMAPSIZE btoc(0x00100000) /* 1MB should be enough */
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/* XXX -- Need to do something about superspace.
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* Technically, NuBus superspace starts at 0x60000000, but no
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* known Macintosh has used any slot lower numbered than 9, and
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* the super space is defined as 0xS000 0000 through 0xSFFF FFFF
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* where S is the slot number--ranging from 0x9 - 0xE.
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*/
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#define NBSBASE 0x90000000
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#define NBSTOP 0xF0000000
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#define NBBASE 0xF9000000 /* NUBUS space */
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#define NBTOP 0xFF000000 /* NUBUS space */
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#define NBMAPSIZE btoc(NBTOP-NBBASE) /* ~ 96 megs */
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#define NBMEMSIZE 0x01000000 /* 16 megs per card */
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#define NBROMOFFSET 0x00FF0000 /* Last 64K == ROM */
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#ifdef _KERNEL
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struct frame;
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struct fpframe;
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struct pcb;
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/* machdep.c */
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void mac68k_set_bell_callback __P((int (*)(void *, int, int, int), void *));
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int mac68k_ring_bell __P((int, int, int));
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u_int get_mapping __P((void));
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/* locore.s functions */
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void m68881_save __P((struct fpframe *));
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void m68881_restore __P((struct fpframe *));
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int suline __P((caddr_t, caddr_t));
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void savectx __P((struct pcb *));
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void switch_exit __P((struct lwp *));
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void switch_lwp_exit __P((struct lwp *));
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void proc_trampoline __P((void));
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void loadustp __P((int));
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/* sys_machdep.c */
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int cachectl1 __P((unsigned long, vaddr_t, size_t, struct proc *));
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/* vm_machdep.c */
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void physaccess __P((caddr_t, caddr_t, register int, register int));
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void physunaccess __P((caddr_t, register int));
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int kvtop __P((caddr_t));
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#endif
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#endif /* _CPU_MACHINE_ */
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