104 lines
2.4 KiB
C
104 lines
2.4 KiB
C
/* $NetBSD: fpu.h,v 1.1 2003/04/26 18:39:40 fvdl Exp $ */
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#ifndef _AMD64_FPU_H_
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#define _AMD64_FPU_H_
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/*
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* NetBSD/amd64 only uses the extended save/restore format used
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* by fxsave/fsrestore, to always deal with the SSE registers,
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* which are part of the ABI to pass floating point values.
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* Must be stored in memory on a 16-byte boundary.
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*/
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struct fxsave64 {
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u_int16_t fx_fcw;
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u_int16_t fx_fsw;
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u_int8_t fx_ftw;
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u_int8_t fx_unused1;
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u_int16_t fx_fop;
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u_int64_t fx_rip;
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u_int64_t fx_rdp;
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u_int32_t fx_mxcsr;
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u_int32_t fx_mxcsr_mask;
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u_int64_t fx_st[8][2]; /* 8 normal FP regs */
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u_int64_t fx_xmm[16][2]; /* 16 SSE2 registers */
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u_int8_t fx_unused3[96];
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} __attribute__((packed));
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struct savefpu {
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struct fxsave64 fp_fxsave; /* see above */
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u_int16_t fp_ex_sw; /* saved status from last exception */
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u_int16_t fp_ex_tw; /* saved tag from last exception */
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};
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#ifdef _KERNEL
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/*
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* This one only used for backward compat coredumping.
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*/
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struct oldfsave {
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u_int16_t fs_control;
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u_int16_t fs_unused0;
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u_int16_t fs_status;
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u_int16_t fs_unused1;
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u_int16_t fs_tag;
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u_int16_t fs_unused2;
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u_int32_t fs_ipoff;
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u_int16_t fs_ipsel;
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u_int16_t fs_op;
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u_int32_t fs_opoff;
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u_int16_t fs_opsel;
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} __attribute__ ((packed));
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#endif
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/*
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* The i387 defaults to Intel extended precision mode and round to nearest,
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* with all exceptions masked.
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*/
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#define __INITIAL_NPXCW__ 0x037f
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#define __INITIAL_MXCSR__ 0x1f80
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#define __INITIAL_MXCSR_MASK__ 0xffbf
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/* NetBSD uses IEEE double precision. */
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#define __NetBSD_NPXCW__ 0x127f
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/* Linux just uses the default control word. */
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#define __Linux_NPXCW__ 0x037f
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/*
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* The standard control word from finit is 0x37F, giving:
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* round to nearest
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* 64-bit precision
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* all exceptions masked.
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*
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* Now we want:
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* affine mode (if we decide to support 287's)
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* round to nearest
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* 53-bit precision
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* all exceptions masked.
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*
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* 64-bit precision often gives bad results with high level languages
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* because it makes the results of calculations depend on whether
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* intermediate values are stored in memory or in FPU registers.
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*/
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#ifdef _KERNEL
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/*
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* XXX
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*/
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struct trapframe;
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struct cpu_info;
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void fpuinit(struct cpu_info *);
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void fpudrop(void);
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void fpusave(struct lwp *);
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void fpudiscard(struct lwp *);
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void fputrap(struct trapframe *);
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void fpusave_lwp(struct lwp *, int);
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void fpusave_cpu(struct cpu_info *, int);
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#endif
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#endif /* _AMD64_FPU_H_ */
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