648 lines
15 KiB
C
648 lines
15 KiB
C
/*
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* Copyright (c) 1991-1993 Regents of the University of California.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the Computer Systems
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* Engineering Group at Lawrence Berkeley Laboratory.
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* 4. Neither the name of the University nor of the Laboratory may be used
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* to endorse or promote products derived from this software without
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* specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $Id: sb.c,v 1.6 1994/03/29 04:36:26 mycroft Exp $
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/syslog.h>
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#include <sys/device.h>
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#include <machine/cpu.h>
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#include <machine/pio.h>
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#include <i386/isa/isa.h>
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#include <i386/isa/isavar.h>
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#include <i386/isa/icu.h>
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#include "sbreg.h"
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/*
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* Software state, per SoundBlaster card.
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* The soundblaster has multiple functionality, which we must demultiplex.
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* One approach is to have one major device number for the soundblaster card,
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* and use different minor numbers to indicate which hardware function
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* we want. This would make for one large driver. Instead our approach
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* is to partition the design into a set of drivers that share an underlying
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* piece of hardware. Most things are hard to share, for example, the audio
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* and midi ports. For audio, we might want to mix two processes' signals,
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* and for midi we might want to merge streams (this is hard due to
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* running status). Moreover, we should be able to re-use the high-level
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* modules with other kinds of hardware. In this module, we only handle the
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* most basic communications with the sb card.
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*/
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struct sb_softc {
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struct device sc_dev; /* base device */
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struct isadev sc_id; /* ISA device */
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struct intrhand sc_ih; /* interrupt vectoring */
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u_short sc_open; /* reference count of open calls */
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u_short sc_dmachan; /* dma channel */
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u_short sc_locked; /* true when doing HS DMA */
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u_short sc_iobase; /* I/O port base address */
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u_short sc_adacmode; /* low/high speed mode indicator */
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#define SB_ADAC_LS 0
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#define SB_ADAC_HS 1
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u_short sc_adactc; /* current adac time constant */
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u_long sc_interrupts; /* number of interrupts taken */
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void (*sc_intr)(void*); /* dma completion intr handler */
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void (*sc_mintr)(void*, int);/* midi input intr handler */
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void *sc_arg; /* arg for sc_intr() */
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};
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int sbreset __P((struct sb_softc *));
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void sb_spkron __P((struct sb_softc *));
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void sb_spkroff __P((struct sb_softc *));
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static int wdsp(u_short iobase, int v);
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static int rdsp(u_short iobase);
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#define splsb splhigh /* XXX */
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struct sb_softc *sb_softc; /* XXX */
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#ifndef NEWCONFIG
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#define at_dma(flags, ptr, cc, chan) isa_dmastart(flags, ptr, cc, chan)
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#endif
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struct {
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int wdsp;
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int rdsp;
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int wmidi;
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} sberr;
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int sbintr __P((int));
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int sbprobe();
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void sbattach();
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#ifdef NEWCONFIG
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void sbforceintr(void *);
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#endif
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struct cfdriver sbcd = {
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NULL, "sb", sbprobe, sbattach, DV_DULL, sizeof(struct sb_softc)
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};
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int
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sbprobe(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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register struct sb_softc *sc = (void *)self;
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register struct isa_attach_args *ia = aux;
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register u_short iobase = ia->ia_iobase;
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if (!SB_BASE_VALID(ia->ia_iobase)) {
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printf("sb: configured iobase %d invalid\n", ia->ia_iobase);
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return 0;
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}
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sc->sc_iobase = iobase;
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if (sbreset(sc) < 0) {
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printf("sb: couldn't reset card\n");
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return 0;
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}
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/*
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* Cannot auto-discover DMA channel.
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*/
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if (!SB_DRQ_VALID(ia->ia_drq)) {
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printf("sb: configured dma chan %d invalid\n", ia->ia_drq);
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return 0;
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}
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#ifdef NEWCONFIG
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/*
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* If the IRQ wasn't compiled in, auto-detect it.
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*/
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if (ia->ia_irq == IRQUNK) {
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ia->ia_irq = isa_discoverintr(sbforceintr, aux);
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sbreset(iobase);
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if (!SB_IRQ_VALID(ia->ia_irq)) {
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printf("sb: couldn't auto-detect interrupt");
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return 0;
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}
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} else
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#endif
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if (!SB_IRQ_VALID(ia->ia_irq)) {
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int irq = ffs(ia->ia_irq) - 1;
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printf("sb: configured irq %d invalid\n", irq);
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return 0;
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}
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ia->ia_iosize = SB_NPORT;
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return 1;
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}
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#ifdef NEWCONFIG
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void
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sbforceintr(aux)
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void *aux;
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{
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static char dmabuf;
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struct isa_attach_args *ia = aux;
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u_short iobase = ia->ia_iobase;
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/*
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* Set up a DMA read of one byte.
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* XXX Note that at this point we haven't called
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* at_setup_dmachan(). This is okay because it just
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* allocates a buffer in case it needs to make a copy,
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* and it won't need to make a copy for a 1 byte buffer.
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* (I think that calling at_setup_dmachan() should be optional;
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* if you don't call it, it will be called the first time
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* it is needed (and you pay the latency). Also, you might
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* never need the buffer anyway.)
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*/
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at_dma(1, &dmabuf, 1, ia->ia_drq);
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if (wdsp(iobase, SB_DSP_RDMA) == 0) {
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(void)wdsp(iobase, 0);
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(void)wdsp(iobase, 0);
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}
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}
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#endif
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void
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sbattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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register struct sb_softc *sc = (struct sb_softc *)self;
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struct isa_attach_args *ia = (struct isa_attach_args *)aux;
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register u_short iobase = ia->ia_iobase;
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register int vers;
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/* XXX */
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sb_softc = sc;
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sc->sc_iobase = iobase;
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sc->sc_dmachan = ia->ia_drq;
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sc->sc_locked = 0;
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#ifdef NEWCONFIG
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isa_establish(&sc->sc_id, &sc->sc_dev);
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sc->sc_ih.ih_fun = sbintr;
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sc->sc_ih.ih_arg = (void *)sc;
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/* XXX DV_TAPE? */
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intr_establish(ia->ia_irq, &sc->sc_ih, DV_TAPE);
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/*
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* We limit DMA transfers to a page, and use the generic DMA handling
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* code in isa.c. This code can end up copying a buffer, but since
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* the audio driver uses relative small buffers this isn't likely.
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*
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* This allocation scheme means that the maximum transfer is limited
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* by the page size (rather than 64k). This is reasonable. For 4K
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* pages, the transfer time at 48KHz is 4096 / 48000 = 85ms. This
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* is plenty long enough to amortize any fixed time overhead.
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*/
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at_setup_dmachan(sc->sc_dmachan, NBPG);
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#endif
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vers = sbversion(sc);
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printf(": dsp v%d.%d\n", vers >> 8, vers & 0xff);
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}
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#define SBUNIT(x) (minor(x) & 0xf)
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struct sb_softc *
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sbopen()
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{
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/* XXXX */
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struct sb_softc *sc = sb_softc;
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if (sc == 0)
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return 0;
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if (sc->sc_open == 0 && sbreset(sc) == 0) {
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sc->sc_open = 1;
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sc->sc_mintr = 0;
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sc->sc_intr = 0;
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return sc;
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}
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return 0;
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}
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void
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sbclose(sc)
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struct sb_softc *sc;
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{
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sc->sc_open = 0;
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sb_spkroff(sc);
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sc->sc_intr = 0;
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sc->sc_mintr = 0;
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/* XXX this will turn off any dma */
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sbreset(sc);
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}
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/*
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* Write a byte to the dsp.
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* XXX We are at the mercy of the card as we use a
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* polling loop and wait until it can take the byte.
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*/
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static int
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wdsp(u_short iobase, int v)
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{
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register int i;
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for (i = 100; --i >= 0; ) {
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if ((inb(iobase + SBP_DSP_WSTAT) & SB_DSP_BUSY) != 0)
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continue;
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outb(iobase + SBP_DSP_WRITE, v);
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return 0;
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}
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++sberr.wdsp;
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return -1;
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}
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/*
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* Read a byte from the DSP, using polling.
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*/
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int
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rdsp(u_short iobase)
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{
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register int i;
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for (i = 100; --i >= 0; ) {
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if ((inb(iobase + SBP_DSP_RSTAT) & SB_DSP_READY) == 0)
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continue;
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return inb(iobase + SBP_DSP_READ);
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}
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++sberr.rdsp;
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return -1;
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}
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/*
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* Reset the card.
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* Return non-zero if the card isn't detected.
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*/
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int
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sbreset(sc)
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struct sb_softc *sc;
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{
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register u_short iobase = sc->sc_iobase;
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register int i;
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/*
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* See SBK, section 11.3.
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* We pulse a reset signal into the card.
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* Gee, what a brilliant hardware design.
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*/
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outb(iobase + SBP_DSP_RESET, 1);
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delay(3);
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outb(iobase + SBP_DSP_RESET, 0);
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if (rdsp(iobase) != SB_MAGIC)
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return -1;
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return 0;
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}
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/*
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* Turn on the speaker. The SBK documention says this operation
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* can take up to 1/10 of a second. Higher level layers should
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* probably let the task sleep for this amount of time after
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* calling here. Otherwise, things might not work (because
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* wdsp() and rdsp() will probably timeout.)
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*
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* These engineers had their heads up their ass when
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* they designed this card.
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*/
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void
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sb_spkron(sc)
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struct sb_softc *sc;
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{
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(void)wdsp(sc->sc_iobase, SB_DSP_SPKR_ON);
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/* XXX bogus */
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delay(1000);
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}
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/*
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* Turn off the speaker; see comment above.
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*/
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void
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sb_spkroff(sc)
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struct sb_softc *sc;
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{
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(void)wdsp(sc->sc_iobase, SB_DSP_SPKR_OFF);
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}
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/*
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* Read the version number out of the card. Return major code
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* in high byte, and minor code in low byte.
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*/
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int
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sbversion(sc)
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struct sb_softc *sc;
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{
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register u_short iobase = sc->sc_iobase;
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int v;
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if (wdsp(iobase, SB_DSP_VERSION) < 0)
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return 0;
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v = rdsp(iobase) << 8;
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v |= rdsp(iobase);
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return ((v >= 0) ? v : 0);
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}
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/*
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* Halt a DMA in progress. A low-speed transfer can be
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* resumed with sb_contdma().
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*/
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void
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sb_haltdma(sc)
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struct sb_softc *sc;
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{
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if (sc->sc_locked)
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sbreset(sc);
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else
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(void)wdsp(sc->sc_iobase, SB_DSP_HALT);
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}
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void
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sb_contdma(sc)
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struct sb_softc *sc;
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{
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(void)wdsp(sc->sc_iobase, SB_DSP_CONT);
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}
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/*
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* Time constant routines follow. See SBK, section 12.
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* Although they don't come out and say it (in the docs),
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* the card clearly uses a 1MHz countdown timer, as the
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* low-speed formula (p. 12-4) is:
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* tc = 256 - 10^6 / sr
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* In high-speed mode, the constant is the upper byte of a 16-bit counter,
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* and a 256MHz clock is used:
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* tc = 65536 - 256 * 10^ 6 / sr
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* Since we can only use the upper byte of the HS TC, the two formulae
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* are equivalent. (Why didn't they say so?) E.g.,
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* (65536 - 256 * 10 ^ 6 / x) >> 8 = 256 - 10^6 / x
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*
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* The crossover point (from low- to high-speed modes) is different
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* for the SBPRO and SB20. The table on p. 12-5 gives the following data:
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*
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* SBPRO SB20
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* ----- --------
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* input ls min 4 KHz 4 HJz
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* input ls max 23 KHz 13 KHz
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* input hs max 44.1 KHz 15 KHz
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* output ls min 4 KHz 4 KHz
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* output ls max 23 KHz 23 KHz
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* output hs max 44.1 KHz 44.1 KHz
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*/
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#define SB_LS_MIN 0x06 /* 4000 Hz */
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#ifdef SBPRO
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#define SB_ADC_LS_MAX 0xd4 /* 22727 Hz */
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#define SB_ADC_HS_MAX 0xe9 /* 43478 Hz */
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#else
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#define SB_ADC_LS_MAX 0xb3 /* 12987 Hz */
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#define SB_ADC_HS_MAX 0xbd /* 14925 Hz */
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#endif
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#define SB_DAC_LS_MAX 0xd4 /* 22727 Hz */
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#define SB_DAC_HS_MAX 0xe9 /* 43478 Hz */
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/*
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* Convert a linear sampling rate into the DAC time constant.
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* Set *mode to indicate the high/low-speed DMA operation.
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* Because of limitations of the card, not all rates are possible.
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* We return the time constant of the closest possible rate.
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* The sampling rate limits are different for the DAC and ADC,
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* so isdac indicates output, and !isdac indicates input.
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*/
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int
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sb_srtotc(sr, mode, isdac)
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int sr;
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int *mode;
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int isdac;
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{
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register int tc = 256 - 1000000 / sr;
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if (tc < SB_LS_MIN) {
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tc = SB_LS_MIN;
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*mode = SB_ADAC_LS;
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} else if (isdac) {
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if (tc < SB_DAC_LS_MAX)
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*mode = SB_ADAC_LS;
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else {
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*mode = SB_ADAC_HS;
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if (tc > SB_DAC_HS_MAX)
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tc = SB_DAC_HS_MAX;
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}
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} else {
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if (tc < SB_ADC_LS_MAX)
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*mode = SB_ADAC_LS;
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else {
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*mode = SB_ADAC_HS;
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if (tc > SB_ADC_HS_MAX)
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tc = SB_ADC_HS_MAX;
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}
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}
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return tc;
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}
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/*
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* Convert a DAC time constant to a sampling rate.
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* See SBK, section 12.
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*/
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int
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sb_tctosr(tc)
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int tc;
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{
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return (1000000 / (256 - tc));
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}
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int
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sb_set_sr(sc, sr, isdac)
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register struct sb_softc *sc;
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u_long *sr;
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int isdac;
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{
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register int tc;
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int mode;
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tc = sb_srtotc(*sr, &mode, isdac);
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if (wdsp(sc->sc_iobase, SB_DSP_TIMECONST) < 0 ||
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wdsp(sc->sc_iobase, tc) < 0)
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return -1;
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*sr = sb_tctosr(tc);
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sc->sc_adacmode = mode;
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sc->sc_adactc = tc;
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return 0;
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}
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int
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sb_round_sr(sr, isdac)
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u_long sr;
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int isdac;
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{
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int mode, tc;
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tc = sb_srtotc(sr, &mode, isdac);
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return sb_tctosr(tc);
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}
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int
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sb_dma_input(sc, p, cc, intr, arg)
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struct sb_softc *sc;
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void *p;
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int cc;
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void (*intr)();
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void *arg;
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{
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register u_short iobase;
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at_dma(1, p, cc, sc->sc_dmachan);
|
|
sc->sc_intr = intr;
|
|
sc->sc_arg = arg;
|
|
iobase = sc->sc_iobase;
|
|
--cc;
|
|
if (sc->sc_adacmode == SB_ADAC_LS) {
|
|
if (wdsp(iobase, SB_DSP_RDMA) < 0 ||
|
|
wdsp(iobase, cc) < 0 ||
|
|
wdsp(iobase, cc >> 8) < 0) {
|
|
sbreset(sc);
|
|
return EIO;
|
|
}
|
|
} else {
|
|
if (wdsp(iobase, SB_DSP_BLOCKSIZE) < 0 ||
|
|
wdsp(iobase, cc) < 0 ||
|
|
wdsp(iobase, cc >> 8) < 0 ||
|
|
wdsp(iobase, SB_DSP_HS_INPUT) < 0) {
|
|
sbreset(sc);
|
|
return EIO;
|
|
}
|
|
sc->sc_locked = 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
int
|
|
sb_dma_output(sc, p, cc, intr, arg)
|
|
struct sb_softc *sc;
|
|
void *p;
|
|
int cc;
|
|
void (*intr)();
|
|
void *arg;
|
|
{
|
|
register u_short iobase;
|
|
|
|
at_dma(0, p, cc, sc->sc_dmachan);
|
|
sc->sc_intr = intr;
|
|
sc->sc_arg = arg;
|
|
iobase = sc->sc_iobase;
|
|
--cc;
|
|
if (sc->sc_adacmode == SB_ADAC_LS) {
|
|
if (wdsp(iobase, SB_DSP_WDMA) < 0 ||
|
|
wdsp(iobase, cc) < 0 ||
|
|
wdsp(iobase, cc >> 8) < 0) {
|
|
sbreset(sc);
|
|
return EIO;
|
|
}
|
|
} else {
|
|
if (wdsp(iobase, SB_DSP_BLOCKSIZE) < 0 ||
|
|
wdsp(iobase, cc) < 0 ||
|
|
wdsp(iobase, cc >> 8) < 0 ||
|
|
wdsp(iobase, SB_DSP_HS_OUTPUT) < 0) {
|
|
sbreset(sc);
|
|
return EIO;
|
|
}
|
|
sc->sc_locked = 1;
|
|
}
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Only the DSP unit on the sound blaster generates interrupts.
|
|
* There are three cases of interrupt: reception of a midi byte
|
|
* (when mode is enabled), completion of dma transmission, or
|
|
* completion of a dma reception. The three modes are mutually
|
|
* exclusive so we know a priori which event has occurred.
|
|
*/
|
|
int
|
|
sbintr(unit)
|
|
int unit;
|
|
{
|
|
register struct sb_softc *sc = sbcd.cd_devs[SBUNIT(unit)];
|
|
|
|
sc->sc_locked = 0;
|
|
/* clear interrupt */
|
|
inb(sc->sc_iobase + SBP_DSP_RSTAT);
|
|
if (sc->sc_mintr != 0) {
|
|
int c = rdsp(sc->sc_iobase);
|
|
(*sc->sc_mintr)(sc->sc_arg, c);
|
|
} else if (sc->sc_intr != 0)
|
|
(*sc->sc_intr)(sc->sc_arg);
|
|
else
|
|
return 0;
|
|
return 1;
|
|
}
|
|
|
|
/*
|
|
* Enter midi uart mode and arrange for read interrupts
|
|
* to vector to `intr'. This puts the card in a mode
|
|
* which allows only midi I/O; the card must be reset
|
|
* to leave this mode. Unfortunately, the card does not
|
|
* use transmit interrupts, so bytes must be output
|
|
* using polling. To keep the polling overhead to a
|
|
* minimum, output should be driven off a timer.
|
|
* This is a little tricky since only 320us separate
|
|
* consecutive midi bytes.
|
|
*/
|
|
void
|
|
sb_set_midi_mode(sc, intr, arg)
|
|
struct sb_softc *sc;
|
|
void (*intr)();
|
|
void *arg;
|
|
{
|
|
|
|
wdsp(sc->sc_iobase, SB_MIDI_UART_INTR);
|
|
sc->sc_mintr = intr;
|
|
sc->sc_intr = 0;
|
|
sc->sc_arg = arg;
|
|
}
|
|
|
|
/*
|
|
* Write a byte to the midi port, when in midi uart mode.
|
|
*/
|
|
void
|
|
sb_midi_output(sc, v)
|
|
struct sb_softc *sc;
|
|
int v;
|
|
{
|
|
|
|
if (wdsp(sc->sc_iobase, v) < 0)
|
|
++sberr.wmidi;
|
|
}
|