98 lines
2.4 KiB
ArmAsm
98 lines
2.4 KiB
ArmAsm
/*
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* Mach Operating System
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* Copyright (c) 1992 Carnegie Mellon University
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* Copyright (c) 1992 Helsinki University of Technology
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* All Rights Reserved.
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*
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* Permission to use, copy, modify and distribute this software and its
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* documentation is hereby granted, provided that both the copyright
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* notice and this permission notice appear in all copies of the
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* software, derivative works or modified versions, and any portions
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* thereof, and that both notices appear in supporting documentation.
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*
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* CARNEGIE MELLON AND HELSINKI UNIVERSITY OF TECHNOLOGY ALLOW FREE USE
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* OF THIS SOFTWARE IN ITS "AS IS" CONDITION. CARNEGIE MELLON AND
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* HELSINKI UNIVERSITY OF TECHNOLOGY DISCLAIM ANY LIABILITY OF ANY KIND
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* FOR ANY DAMAGES WHATSOEVER RESULTING FROM THE USE OF THIS SOFTWARE.
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*
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* Carnegie Mellon requests users of this software to return to
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*
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* Software Distribution Coordinator or Software.Distribution@CS.CMU.EDU
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* School of Computer Science
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* Carnegie Mellon University
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* Pittsburgh PA 15213-3890
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*
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* any improvements or extensions that they make and grant Carnegie Mellon
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* the rights to redistribute these changes.
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*/
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/*
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* File: ns532/bzero.s
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* Author: Tero Kivinen, Helsinki University of Technology 1992.
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*
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* $Id: bzero.s,v 1.1.1.1 1993/09/09 23:53:47 phil Exp $
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*/
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#include <machine/asm.h>
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/*
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* bzero(char * addr, unsigned int length)
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*/
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.text
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Entry(blkclr)
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ENTRY(bzero)
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DFRAME
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movd B_ARG0,r1 /* addr */
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movd B_ARG1,r2 /* length */
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movd r1,r0 /* align addr */
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andd 3,r0
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cmpqd 0,r0
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beq wstart /* already aligned */
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negd r0,r0
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addqd 4,r0
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cmpd r0,r2
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bhi bytes /* not enough data to align */
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b1loop: movqb 0,0(r1) /* zero bytes */
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addqd 1,r1
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addqd -1,r2
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acbd -1,r0,b1loop
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wstart: movd r2,r0 /* length */
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lshd -6,r0
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cmpqd 0,r0
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beq phase2
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w1loop: movqd 0,0(r1) /* zero words */
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movqd 0,4(r1)
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movqd 0,8(r1)
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movqd 0,12(r1)
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movqd 0,16(r1)
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movqd 0,20(r1)
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movqd 0,24(r1)
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movqd 0,28(r1)
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movqd 0,32(r1)
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movqd 0,36(r1)
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movqd 0,40(r1)
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movqd 0,44(r1)
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movqd 0,48(r1)
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movqd 0,52(r1)
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movqd 0,56(r1)
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movqd 0,60(r1)
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addd 64,r1
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acbd -1,r0,w1loop
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phase2: movd r2,r0 /* length */
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andd 63,r0
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lshd -2,r0
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cmpqd 0,r0
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beq bytes
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w2loop: movqd 0,0(r1)
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addqd 4,r1
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acbd -1,r0,w2loop
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bytes: movd r2,r0 /* length */
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andd 3,r0
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cmpqd 0,r0
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beq done
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bloop: movqb 0,0(r1) /* zero bytes */
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addqd 1,r1
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acbb -1,r0,bloop
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done: DEMARF
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ret 0
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