NetBSD/sys/arch/mips
mhitch 54b3de8b6f Only check for cache index compatiblity on MIPS3 if there is no secondary
cache.  With secondary cache, the CPU will detect cache coherency errors
and the Virtual Coherency Exception handler will flush the appropriate
cache lines to maintain cache coherency.  This allows much better
performance than inhibiting the cache for the entire page.  This is
very noticable when shared library mappings occur with incompatible
mappings, since there's a very likely chance the mappings will remain
for long periods of time.  Systems without secondary cache will still
have the cache inhibited, so there will still be performance issues if
shared libraries don't get mmaped() on correct memory alignments.

This fixes the current problems on DECstations using the R4x00 getting
coredumped programs.
1999-11-04 17:20:57 +00:00
..
conf Nuke register and remove trailling white space. 1999-04-24 08:01:01 +00:00
include Update to match new SVR4-style definition names in <sys/exec_elf.h>. 1999-10-25 13:55:06 +00:00
mips Only check for cache index compatiblity on MIPS3 if there is no secondary 1999-11-04 17:20:57 +00:00
Makefile
Makefile.inc