241 lines
7.3 KiB
C
241 lines
7.3 KiB
C
/* $NetBSD: if_cs.c,v 1.2 2004/01/03 16:37:41 chris Exp $ */
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/*
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* Copyright (c) 2004 Christopher Gilbert
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* All rights reserved.
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*
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the author may be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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/*
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* Copyright 1997
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* Digital Equipment Corporation. All rights reserved.
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*
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* This software is furnished under license and may be used and
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* copied only in accordance with the following terms and conditions.
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* Subject to these conditions, you may download, copy, install,
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* use, modify and distribute this software in source and/or binary
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* form. No title or ownership is transferred hereby.
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*
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* 1) Any source code used, modified or distributed must reproduce
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* and retain this copyright notice and list of conditions as
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* they appear in the source file.
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*
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* 2) No right is granted to use any trade name, trademark, or logo of
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* Digital Equipment Corporation. Neither the "Digital Equipment
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* Corporation" name nor any trademark or logo of Digital Equipment
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* Corporation may be used to endorse or promote products derived
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* from this software without the prior written permission of
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* Digital Equipment Corporation.
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*
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* 3) This software is provided "AS-IS" and any express or implied
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* warranties, including but not limited to, any implied warranties
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* of merchantability, fitness for a particular purpose, or
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* non-infringement are disclaimed. In no event shall DIGITAL be
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* liable for any damages whatsoever, and in particular, DIGITAL
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* shall not be liable for special, indirect, consequential, or
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* incidental damages or damages for lost profits, loss of
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* revenue or loss of use, whether such damages arise in contract,
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* negligence, tort, under statute, in equity, at law or otherwise,
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* even if advised of the possibility of such damage.
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*/
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#include <sys/cdefs.h>
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__KERNEL_RCSID(0, "$NetBSD: if_cs.c,v 1.2 2004/01/03 16:37:41 chris Exp $");
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/socket.h>
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#include <sys/device.h>
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#include "rnd.h"
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#if NRND > 0
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#include <sys/rnd.h>
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#endif
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#include <net/if.h>
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#include <net/if_ether.h>
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#include <net/if_media.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <acorn32/eb7500atx/rsbus.h>
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#include <dev/ic/cs89x0reg.h>
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#include <dev/ic/cs89x0var.h>
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/*
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* the CS network interface is accessed at the following address locations:
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* 030104f1 CS8920 PNP Low
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* 03010600 03010640 CS8920 Default I/O registers
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* 030114f1 CS8920 PNP High
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* 03014000 03016000 CS8920 Default Memory
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*
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* IRQ is mapped as:
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* CS8920 IRQ 3 INT5
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*
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* It must be configured as the following:
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* The CS8920 PNP address should be configured for ISA base at 0x300
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* to achieve the default register mapping as specified.
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* Note memory addresses are all have bit 23 tied high in hardware.
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* This only effects the value programmed into the CS8920 memory offset
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* registers.
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*
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* Just to add to the fun the I/O registers are layed out as:
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* xxxxR1R0
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* xxxxR3R2
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* xxxxR5R4
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*
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* This works fine for 16bit accesses, but it makes access to single
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* register hard (which does happen on a reset, as we've got to toggle
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* the chip into 16bit mode)
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*
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* Network DRQ is connected to DRQ5
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*/
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/*
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* make a private tag so that we can use rsbus's map/unmap
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*/
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static struct bus_space cs_rsbus_bs_tag;
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int cs_rsbus_probe(struct device *, struct cfdata *, void *);
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void cs_rsbus_attach(struct device *, struct device *, void *);
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static u_int8_t cs_rbus_read_1(struct cs_softc *, bus_size_t);
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CFATTACH_DECL(cs_rsbus, sizeof(struct cs_softc),
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cs_rsbus_probe, cs_rsbus_attach, NULL, NULL);
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/* Available media */
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int cs_rbus_media [] = {
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IFM_ETHER|IFM_10_T|IFM_FDX,
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IFM_ETHER|IFM_10_T
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};
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int
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cs_rsbus_probe(struct device *parent, struct cfdata *cf, void *aux)
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{
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/* for now it'll always attach */
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return 1;
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}
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void
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cs_rsbus_attach(struct device *parent, struct device *self, void *aux)
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{
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struct cs_softc *sc = (struct cs_softc *)self;
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struct rsbus_attach_args *rs = (void *)aux;
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u_int iobase;
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/* member copy */
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cs_rsbus_bs_tag = *rs->sa_iot;
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/* registers are normally accessed in pairs, on a 4 byte aligned */
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cs_rsbus_bs_tag.bs_cookie = (void *) 1;
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sc->sc_iot = sc->sc_memt = &cs_rsbus_bs_tag;
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/*
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* Do DMA later
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if (ia->ia_ndrq > 0)
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isc->sc_drq = ia->ia_drq[0].ir_drq;
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else
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isc->sc_drq = -1;
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*/
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/* device always interrupts on 3 but that routes to IRQ 5 */
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sc->sc_irq = 3;
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printf("\n");
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/*
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* Map the device.
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*/
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iobase = 0x03010600;
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if (bus_space_map(sc->sc_iot, iobase, CS8900_IOSIZE * 4,
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0, &sc->sc_ioh)) {
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printf("%s: unable to map i/o space\n", sc->sc_dev.dv_xname);
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return;
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}
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#if 0
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if (bus_space_map(sc->sc_memt, iobase + 0x3A00,
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CS8900_MEMSIZE * 4, 0, &sc->sc_memh)) {
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printf("%s: unable to map memory space\n",
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sc->sc_dev.dv_xname);
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} else {
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sc->sc_cfgflags |= CFGFLG_MEM_MODE | CFGFLG_USE_SA;
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sc->sc_pktpgaddr = 1<<23;
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//(0x4000 >> 1) | (1<<23);
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}
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#endif
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sc->sc_ih = intr_claim(0x0B, IPL_NET, "cs", cs_intr, sc);
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if (sc->sc_ih == NULL) {
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printf("%s: unable to establish interrupt\n",
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sc->sc_dev.dv_xname);
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return;
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}
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/* DMA is for later */
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sc->sc_dma_chipinit = NULL;
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sc->sc_dma_attach = NULL;
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sc->sc_dma_process_rx = NULL;
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/*
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* don't talk to the EEPROM, it seems that the cs driver doesn't
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* currently to the right thing for reading the EEPROM
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*/
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sc->sc_cfgflags |= CFGFLG_NOT_EEPROM;
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sc->sc_io_read_1 = cs_rbus_read_1;
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/*
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* also provide media, otherwise it attempts to read the media from
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* the EEPROM, which again fails
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*/
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cs_attach(sc, NULL, cs_rbus_media, sizeof(cs_rbus_media) / sizeof(cs_rbus_media[0]),
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IFM_ETHER|IFM_10_T|IFM_FDX);
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}
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/*
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* Provide a function to correctly do reading from oddly numbered registers
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* as you can't simply shift the register number
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*/
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static u_int8_t
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cs_rbus_read_1(struct cs_softc *sc, bus_size_t a)
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{
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bus_size_t offset;
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/*
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* if it's an even address then just use the bus_space_read_1
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*/
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if ((a & 1) == 0)
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{
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return bus_space_read_1(sc->sc_iot, sc->sc_ioh, a);
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}
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/*
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* otherwise we've get to work out the aligned address and then add
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* one
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*/
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offset = (a & ~1) << 1;
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offset++;
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/* and read it, with no shift (cookie is 0) */
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return sc->sc_iot->bs_r_1(0, (sc)->sc_ioh, offset);
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}
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