258 lines
7.2 KiB
C
258 lines
7.2 KiB
C
/* $NetBSD: cg2reg.h,v 1.5 2003/09/28 23:14:42 cl Exp $ */
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/*
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* Copyright (c) 1994 Dennis Ferguson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/* cg2reg.h - CG2 colour frame buffer definitions
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*
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* The mapped memory looks like:
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*
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* offset contents
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* 0x000000 bit plane map - 1st (of 8) plane used by the X server in -mono mode
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* 0x100000 pixel map - used by the X server in color mode
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* 0x200000 raster op mode memory map - unused by X server
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* 0x300000 random control registers (lots of spaces in between)
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* 0x310000 shadow colour map
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*/
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/* Frame buffer memory size and depth */
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#define CG2_FBSIZE (1024 * 1024)
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#define CG2_N_PLANE 8
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/* Screen dimensions */
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#define CG2_WIDTH 1152
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#define CG2_HEIGHT 900
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/* arrangement of bit plane mode memory */
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union bitplane {
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u_short word[CG2_HEIGHT][CG2_WIDTH/(CG2_N_PLANE * sizeof(u_short))];
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u_short plane[CG2_FBSIZE/(CG2_N_PLANE * sizeof(u_short))];
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};
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/* arrangement of pixel mode memory */
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union byteplane {
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u_char pixel[CG2_HEIGHT][CG2_WIDTH];
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u_char frame[CG2_FBSIZE];
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};
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/*
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* Structure describing the first two megabytes of the frame buffer.
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* Normal memory maps in bit plane and pixel modes
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*/
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struct cg2memfb {
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union bitplane memplane[CG2_N_PLANE]; /* bit plane map */
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union byteplane pixplane; /* pixel map */
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};
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/*
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* Control/status register. The X server only appears to use update_cmap
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* and video_enab.
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*/
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struct cg2statusreg {
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u_int reserved : 2; /* not used */
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u_int fastread : 1; /* r/o: has some feature I don't understand */
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u_int id : 1; /* r/o: ext status and ID registers exist */
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u_int resolution : 4; /* screen resolution, 0 means 1152x900 */
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u_int retrace : 1; /* r/o: retrace in progress */
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u_int inpend : 1; /* r/o: interrupt request */
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u_int ropmode : 3; /* ?? */
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u_int inten : 1; /* interrupt enable (for end of retrace) */
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u_int update_cmap : 1; /* copy/use shadow colour map */
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u_int video_enab : 1; /* enable video */
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};
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/*
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* Extended status register. Unused by X server
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*/
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struct cg2_extstatus {
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u_int gpintreq : 1; /* interrupt request */
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u_int gpintdis : 1; /* interrupt disable */
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u_int reserved : 13; /* unused */
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u_int gpbus : 1; /* bus enabled */
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};
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/*
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* Double buffer control register. It appears that (some of?) the
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* cg2 cards support a pair of memory sets, referred to as `A' and
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* `B', which can be swapped to allow atomic screen updates. This
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* controls them.
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*/
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struct dblbufreg {
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u_int display_b : 1; /* display memory B (set) or A (reset) */
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u_int read_b : 1; /* accesss memory B (set) or A (reset) */
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u_int nowrite_b : 1; /* when set, writes don't update memory B */
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u_int nowrite_a : 1; /* when set, writes don't update memory A */
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u_int read_ecmap : 1; /* copy from(clear)/to(set) shadow colour map */
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u_int fast_read : 1; /* fast reads, but wrong data */
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u_int wait : 1; /* when set, remains so to end up v. retrace */
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u_int update_ecmap : 1; /* copy/use shadow colour map */
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u_int reserved : 8;
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};
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/*
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* Zoom register, apparently present on Sun-2 colour boards only. See
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* the Sun documentation, I don't know anyone who still has a Sun-2.
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*/
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struct cg2_zoom {
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union {
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u_short reg;
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u_char reg_pad[4096];
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} wordpan;
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union {
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struct {
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u_int unused : 8;
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u_int lineoff : 4;
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u_int pixzoom : 4;
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} reg;
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u_short word;
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u_char reg_pad[4096];
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} zoom;
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union {
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struct {
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u_int unused : 8;
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u_int lorigin : 4;
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u_int pixeloff : 4;
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} reg;
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u_short word;
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u_char reg_pad[4096];
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} pixpan;
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union {
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u_short reg;
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u_char reg_pad[4096];
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} varzoom;
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};
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/*
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* Miscellany. On the Sun-3 these registers exist in place of the above.
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*/
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struct cg2_nozoom {
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union { /* double buffer register (see above) */
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struct dblbufreg reg;
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u_short word;
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u_char reg_pad[4096];
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} dblbuf;
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union { /* start of DMA window */
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u_short reg;
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u_char reg_pad[4096];
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} dmabase;
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union { /* DMA window size */
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u_short reg; /* actually 8 bits. reg*16 == size */
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u_char reg_pad[4096];
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} dmawidth;
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union { /* frame count */
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u_short reg; /* actually 8 bits only. r/o */
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u_char reg_pad[4096];
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} framecnt;
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};
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/*
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* Raster op control registers. X doesn't use this, but documented here
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* for future reference.
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*/
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struct memropc {
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u_short mrc_dest;
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u_short mrc_source1;
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u_short mrc_source2;
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u_short mrc_pattern;
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u_short mrc_mask1;
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u_short mrc_mask2;
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u_short mrc_shift;
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u_short mrc_op;
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u_short mrc_width;
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u_short mrc_opcount;
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u_short mrc_decoderout;
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u_short mrc_x11;
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u_short mrc_x12;
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u_short mrc_x13;
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u_short mrc_x14;
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u_short mrc_x15;
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};
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/*
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* Last chunk of the frame buffer (i.e. from offset 0x200000 and above).
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* Exists separately from struct cg2memfb apparently because Sun software
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* avoids mapping the latter, though X uses it.
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*/
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struct cg2fb {
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#ifndef _KERNEL /* XXX - Hack! */
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/* XXX - Don't want this permanently in the kernel mapping. */
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union { /* raster op mode frame memory */
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union bitplane ropplane[CG2_N_PLANE];
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union byteplane roppixel;
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} ropio;
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#endif /* _KERNEL XXX - Hack! */
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union { /* raster op control unit (1 per plane) */
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struct memropc ropregs;
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struct {
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u_char pad[2048];
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struct memropc ropregs;
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} prime;
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u_char reg_pad[4096];
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} ropcontrol[9];
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union { /* status register */
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struct cg2statusreg reg;
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u_short word;
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u_char reg_pad[4096];
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} status;
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union { /* per-plane mask register */
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u_short reg; /* 8 bit mask register - set means plane r/w */
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u_char reg_pad[4096];
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} ppmask;
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union { /* miscellaneous registers */
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struct cg2_zoom zoom;
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struct cg2_nozoom nozoom;
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} misc;
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union { /* interrupt vector */
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u_short reg;
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u_char reg_pad[32];
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} intrptvec;
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union { /* board ID */
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u_short reg;
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u_char reg_pad[16];
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} id;
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union { /* extended status */
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struct cg2_extstatus reg;
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u_short word;
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u_char reg_pad[16];
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} extstatus;
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union { /* auxiliary raster op mode register (?)*/
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u_short reg;
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u_char reg_pad[4032];
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} ropmode;
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u_short redmap[256]; /* shadow colour maps */
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u_short greenmap[256];
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u_short bluemap[256];
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};
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