0b956d0b8b
counters. These counters do not exist on all CPUs, but where they do exist, can be used for counting events such as dcache misses that would otherwise be difficult or impossible to instrument by code inspection or hardware simulation. pmc(9) is meant to be a general interface. Initially, the Intel XScale counters are the only ones supported.
29 lines
810 B
Plaintext
29 lines
810 B
Plaintext
# $NetBSD: files.i80321,v 1.8 2002/08/07 05:15:01 briggs Exp $
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#
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# Configuration info for Intel i80321 XScale I/O Processor support
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#
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file arch/arm/xscale/i80321_icu.c
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file arch/arm/xscale/i80321_irq.S
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file arch/arm/xscale/i80321_mcu.c
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file arch/arm/xscale/i80321_timer.c
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file arch/arm/xscale/xscale_pmc.c perfctrs
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device iopxs {}: pcibus, bus_space_generic
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# Board-specific front-end provides attachment.
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file arch/arm/xscale/i80321.c iopxs
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file arch/arm/xscale/i80321_pci.c iopxs
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file arch/arm/xscale/i80321_space.c iopxs
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# Application Accelerator Unit
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device iopaau: dmover_service
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attach iopaau at iopxs
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file arch/arm/xscale/i80321_aau.c iopaau
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file arch/arm/xscale/iopaau.c iopaau
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# Watchdog timer
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device iopwdog: sysmon_wdog
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attach iopwdog at iopxs
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file arch/arm/xscale/i80321_wdog.c iopwdog
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