339 lines
8.8 KiB
C
339 lines
8.8 KiB
C
/* $NetBSD: agp_amd.c,v 1.6 2001/10/06 02:48:50 thorpej Exp $ */
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/*-
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* Copyright (c) 2000 Doug Rabson
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
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* ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
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* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
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* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
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* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
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* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
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* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* $FreeBSD: src/sys/pci/agp_amd.c,v 1.6 2001/07/05 21:28:46 jhb Exp $
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/malloc.h>
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#include <sys/kernel.h>
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#include <sys/lock.h>
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#include <sys/proc.h>
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#include <sys/conf.h>
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#include <sys/device.h>
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#include <sys/agpio.h>
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#include <uvm/uvm_extern.h>
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#include <dev/pci/pcivar.h>
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#include <dev/pci/pcireg.h>
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#include <dev/pci/agpvar.h>
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#include <dev/pci/agpreg.h>
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#include <dev/pci/pcidevs.h>
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#define READ2(off) bus_space_read_2(asc->iot, asc->ioh, off)
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#define READ4(off) bus_space_read_4(asc->iot, asc->ioh, off)
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#define WRITE2(off,v) bus_space_write_2(asc->iot, asc->ioh, off, v)
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#define WRITE4(off,v) bus_space_write_4(asc->iot, asc->ioh, off, v)
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struct agp_amd_gatt {
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bus_dmamap_t ag_dmamap;
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bus_dma_segment_t ag_dmaseg;
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int ag_nseg;
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u_int32_t ag_entries;
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u_int32_t *ag_vdir; /* virtual address of page dir */
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bus_addr_t ag_pdir; /* bus address of page dir */
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u_int32_t *ag_virtual; /* virtual address of gatt */
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bus_addr_t ag_physical; /* bus address of gatt */
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size_t ag_size;
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};
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struct agp_amd_softc {
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u_int32_t initial_aperture; /* aperture size at startup */
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struct agp_amd_gatt *gatt;
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bus_space_handle_t ioh;
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bus_space_tag_t iot;
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};
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static u_int32_t agp_amd_get_aperture(struct agp_softc *);
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static int agp_amd_set_aperture(struct agp_softc *, u_int32_t);
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static int agp_amd_bind_page(struct agp_softc *, off_t, bus_addr_t);
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static int agp_amd_unbind_page(struct agp_softc *, off_t);
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static void agp_amd_flush_tlb(struct agp_softc *);
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struct agp_methods agp_amd_methods = {
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agp_amd_get_aperture,
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agp_amd_set_aperture,
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agp_amd_bind_page,
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agp_amd_unbind_page,
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agp_amd_flush_tlb,
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agp_generic_enable,
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agp_generic_alloc_memory,
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agp_generic_free_memory,
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agp_generic_bind_memory,
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agp_generic_unbind_memory,
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};
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static struct agp_amd_gatt *
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agp_amd_alloc_gatt(struct agp_softc *sc)
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{
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u_int32_t apsize = AGP_GET_APERTURE(sc);
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u_int32_t entries = apsize >> AGP_PAGE_SHIFT;
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struct agp_amd_gatt *gatt;
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int i, npages;
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caddr_t vdir;
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gatt = malloc(sizeof(struct agp_amd_gatt), M_AGP, M_NOWAIT);
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if (!gatt)
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return 0;
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if (agp_alloc_dmamem(sc->as_dmat,
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AGP_PAGE_SIZE + entries * sizeof(u_int32_t), 0,
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&gatt->ag_dmamap, &vdir, &gatt->ag_pdir,
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&gatt->ag_dmaseg, 1, &gatt->ag_nseg) != 0) {
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printf("failed to allocate GATT\n");
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free(gatt, M_AGP);
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return NULL;
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}
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gatt->ag_vdir = (u_int32_t *)vdir;
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gatt->ag_entries = entries;
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gatt->ag_virtual = (u_int32_t *)(vdir + AGP_PAGE_SIZE);
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gatt->ag_physical = gatt->ag_pdir + AGP_PAGE_SIZE;
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gatt->ag_size = AGP_PAGE_SIZE + entries * sizeof(u_int32_t);
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memset(gatt->ag_vdir, 0, AGP_PAGE_SIZE);
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memset(gatt->ag_virtual, 0, entries * sizeof(u_int32_t));
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/*
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* Map the pages of the GATT into the page directory.
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*/
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npages = ((entries * sizeof(u_int32_t) + AGP_PAGE_SIZE - 1)
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>> AGP_PAGE_SHIFT);
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for (i = 0; i < npages; i++)
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gatt->ag_vdir[i] = (gatt->ag_physical + i * AGP_PAGE_SIZE) | 1;
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/*
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* Make sure the chipset can see everything.
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*/
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agp_flush_cache();
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return gatt;
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}
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#if 0
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static void
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agp_amd_free_gatt(struct agp_softc *sc, struct agp_amd_gatt *gatt)
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{
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agp_free_dmamem(sc->as_dmat, gatt->ag_size,
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gatt->ag_dmamap, (caddr_t)gatt->ag_virtual, &gatt->ag_dmaseg,
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gatt->ag_nseg);
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free(gatt, M_AGP);
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}
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#endif
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int
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agp_amd_match(const struct pci_attach_args *pa)
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{
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switch (PCI_PRODUCT(pa->pa_id)) {
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case PCI_PRODUCT_AMD_SC751_SC:
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case PCI_PRODUCT_AMD_SC762_NB:
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return 1;
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}
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return 0;
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}
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int
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agp_amd_attach(struct device *parent, struct device *self, void *aux)
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{
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struct agp_softc *sc = (void *)self;
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struct agp_amd_softc *asc;
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struct pci_attach_args *pa = aux;
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struct agp_amd_gatt *gatt;
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pcireg_t reg;
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int error;
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asc = malloc(sizeof *asc, M_AGP, M_NOWAIT);
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if (asc == NULL) {
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printf(": can't allocate softc\n");
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/* agp_generic_detach(sc) */
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return ENOMEM;
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}
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memset(asc, 0, sizeof *asc);
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error = pci_mapreg_map(pa, AGP_AMD751_REGISTERS, PCI_MAPREG_TYPE_MEM, 0,
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&asc->iot, &asc->ioh, NULL, NULL);
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if (error != 0) {
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printf(": can't map AGP registers\n");
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agp_generic_detach(sc);
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return error;
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}
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if (agp_map_aperture(pa, sc) != 0) {
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printf(": can't map aperture\n");
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agp_generic_detach(sc);
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free(asc, M_AGP);
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return ENXIO;
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}
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pci_get_capability(pa->pa_pc, pa->pa_tag, PCI_CAP_AGP, &sc->as_capoff,
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NULL);
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sc->as_methods = &agp_amd_methods;
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sc->as_chipc = asc;
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asc->initial_aperture = AGP_GET_APERTURE(sc);
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for (;;) {
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gatt = agp_amd_alloc_gatt(sc);
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if (gatt)
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break;
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/*
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* Probably contigmalloc failure. Try reducing the
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* aperture so that the gatt size reduces.
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*/
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if (AGP_SET_APERTURE(sc, AGP_GET_APERTURE(sc) / 2)) {
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printf(": can't set aperture\n");
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return ENOMEM;
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}
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}
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asc->gatt = gatt;
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/* Install the gatt. */
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WRITE4(AGP_AMD751_ATTBASE, gatt->ag_physical);
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/* Enable synchronisation between host and agp. */
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reg = pci_conf_read(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL);
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reg &= ~0x00ff00ff;
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reg |= (AGP_AMD751_MODECTRL_SYNEN) | (AGP_AMD751_MODECTRL2_GPDCE << 16);
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pci_conf_write(pa->pa_pc, pa->pa_tag, AGP_AMD751_MODECTRL, reg);
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/* Enable the TLB and flush */
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WRITE2(AGP_AMD751_STATUS,
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READ2(AGP_AMD751_STATUS) | AGP_AMD751_STATUS_GCE);
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AGP_FLUSH_TLB(sc);
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return 0;
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}
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#if 0
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static int
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agp_amd_detach(struct agp_softc *sc)
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{
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pcireg_t reg;
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struct agp_amd_softc *asc = sc->as_chipc;
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/* Disable the TLB.. */
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WRITE2(AGP_AMD751_STATUS,
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READ2(AGP_AMD751_STATUS) & ~AGP_AMD751_STATUS_GCE);
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/* Disable host-agp sync */
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reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL);
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reg &= 0xffffff00;
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pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_MODECTRL, reg);
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/* Clear the GATT base */
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WRITE4(AGP_AMD751_ATTBASE, 0);
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/* Put the aperture back the way it started. */
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AGP_SET_APERTURE(sc, asc->initial_aperture);
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agp_amd_free_gatt(sc, asc->gatt);
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/* XXXfvdl no pci_mapreg_unmap */
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return 0;
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}
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#endif
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static u_int32_t
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agp_amd_get_aperture(struct agp_softc *sc)
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{
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int vas;
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vas = (pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL) & 0x06);
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vas >>= 1;
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/*
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* The aperture size is equal to 32M<<vas.
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*/
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return (32*1024*1024) << vas;
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}
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static int
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agp_amd_set_aperture(struct agp_softc *sc, u_int32_t aperture)
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{
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int vas;
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pcireg_t reg;
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/*
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* Check for a power of two and make sure its within the
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* programmable range.
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*/
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if (aperture & (aperture - 1)
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|| aperture < 32*1024*1024
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|| aperture > 2U*1024*1024*1024)
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return EINVAL;
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vas = ffs(aperture / 32*1024*1024) - 1;
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reg = pci_conf_read(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL);
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reg = (reg & ~0x06) | (vas << 1);
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pci_conf_write(sc->as_pc, sc->as_tag, AGP_AMD751_APCTRL, reg);
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return 0;
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}
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static int
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agp_amd_bind_page(struct agp_softc *sc, off_t offset, bus_addr_t physical)
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{
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struct agp_amd_softc *asc = sc->as_chipc;
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if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = physical | 1;
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return 0;
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}
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static int
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agp_amd_unbind_page(struct agp_softc *sc, off_t offset)
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{
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struct agp_amd_softc *asc = sc->as_chipc;
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if (offset < 0 || offset >= (asc->gatt->ag_entries << AGP_PAGE_SHIFT))
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return EINVAL;
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asc->gatt->ag_virtual[offset >> AGP_PAGE_SHIFT] = 0;
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return 0;
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}
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static void
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agp_amd_flush_tlb(struct agp_softc *sc)
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{
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struct agp_amd_softc *asc = sc->as_chipc;
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/* Set the cache invalidate bit and wait for the chipset to clear */
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WRITE4(AGP_AMD751_TLBCTRL, 1);
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do {
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DELAY(1);
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} while (READ4(AGP_AMD751_TLBCTRL));
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}
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