76 lines
3.0 KiB
C
76 lines
3.0 KiB
C
/* $NetBSD: intr.h,v 1.5 2002/03/24 18:21:22 uch Exp $ */
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/*-
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* Copyright (c) 2002 The NetBSD Foundation, Inc.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by the NetBSD
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* Foundation, Inc. and its contributors.
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* 4. Neither the name of The NetBSD Foundation nor the names of its
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* contributors may be used to endorse or promote products derived
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* from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
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* ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
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* TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
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* PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
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* BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
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* CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
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* SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
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* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
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* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
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* ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
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* POSSIBILITY OF SUCH DAMAGE.
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*/
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#ifndef _MMEYE_INTR_H_
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#define _MMEYE_INTR_H_
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#include <sh3/intr.h>
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/*
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* Number of interrupt source
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* TMU0, TMU1, TMU2
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* MMEYE(com * 2 + mmeyepcmcia(controller + card) * 2)
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*/
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#define _INTR_N 9
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/* Interrupt priority levels */
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#define IPL_BIO 9 /* block I/O */
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#define IPL_NET 11 /* network */
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#define IPL_TTY 12 /* terminal */
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#define IPL_SERIAL 12 /* serial */
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#define IPL_CLOCK 14 /* clock */
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#define IPL_HIGH 15 /* everything */
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#define splsoftclock() _cpu_intr_raise(IPL_SOFTCLOCK << 4)
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#define splsoftnet() _cpu_intr_raise(IPL_SOFTNET << 4)
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#define splsoftserial() _cpu_intr_raise(IPL_SOFTSERIAL << 4)
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#define splbio() _cpu_intr_raise(IPL_BIO << 4)
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#define splnet() _cpu_intr_raise(IPL_NET << 4)
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#define spltty() _cpu_intr_raise(IPL_TTY << 4)
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#define splvm() spltty()
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#define splserial() _cpu_intr_raise(IPL_SERIAL << 4)
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#define splclock() _cpu_intr_raise(IPL_CLOCK << 4)
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#define splstatclock() splclock()
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#define splsched() splclock()
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#define splhigh() _cpu_intr_raise(IPL_HIGH << 4)
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#define spllock() splhigh()
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#define spl0() _cpu_intr_resume(0)
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#define splx(x) _cpu_intr_resume(x)
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#define spllowersoftclock() _cpu_intr_resume(IPL_SOFTCLOCK << 4)
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#endif /* !_MMEYE_INTR_H_ */
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