437 lines
10 KiB
C
437 lines
10 KiB
C
/* Target-dependent code for Hitachi Super-H, for GDB.
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Copyright (C) 1993, 1994, 1995, 1996 Free Software Foundation, Inc.
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This file is part of GDB.
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This program is free software; you can redistribute it and/or modify
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it under the terms of the GNU General Public License as published by
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the Free Software Foundation; either version 2 of the License, or
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(at your option) any later version.
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This program is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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GNU General Public License for more details.
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You should have received a copy of the GNU General Public License
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along with this program; if not, write to the Free Software
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Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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/*
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Contributed by Steve Chamberlain
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sac@cygnus.com
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*/
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#include "defs.h"
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#include "frame.h"
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#include "obstack.h"
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#include "symtab.h"
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#include "gdbtypes.h"
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#include "gdbcmd.h"
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#include "gdbcore.h"
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#include "value.h"
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#include "dis-asm.h"
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/* Default to the original SH. */
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#define DEFAULT_SH_TYPE "sh"
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/* This value is the model of SH in use. */
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char *sh_processor_type;
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char *tmp_sh_processor_type;
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/* A set of original names, to be used when restoring back to generic
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registers from a specific set. */
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char *sh_generic_reg_names[] = REGISTER_NAMES;
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char *sh_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach","macl", "sr",
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"fpul", "fpscr",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", "",
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"", "", "", "", "", "", "", ""
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};
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char *sh3_reg_names[] = {
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"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
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"r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
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"pc", "pr", "gbr", "vbr", "mach","macl","sr",
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"fpul", "fpscr",
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"fr0", "fr1", "fr2", "fr3", "fr4", "fr5", "fr6", "fr7",
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"fr8", "fr9", "fr10","fr11","fr12","fr13","fr14","fr15",
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"r0b0", "r1b0", "r2b0", "r3b0", "r4b0", "r5b0", "r6b0", "r7b0",
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"r0b1", "r1b1", "r2b1", "r3b1", "r4b1", "r5b1", "r6b1", "r7b1"
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};
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struct {
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char *name;
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char **regnames;
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} sh_processor_type_table[] = {
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{ "sh", sh_reg_names },
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{ "sh3", sh3_reg_names },
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{ NULL, NULL }
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};
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/* Prologue looks like
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[mov.l <regs>,@-r15]...
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[sts.l pr,@-r15]
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[mov.l r14,@-r15]
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[mov r15,r14]
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*/
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#define IS_STS(x) ((x) == 0x4f22)
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#define IS_PUSH(x) (((x) & 0xff0f) == 0x2f06)
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#define GET_PUSHED_REG(x) (((x) >> 4) & 0xf)
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#define IS_MOV_SP_FP(x) ((x) == 0x6ef3)
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#define IS_ADD_SP(x) (((x) & 0xff00) == 0x7f00)
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#define IS_MOV_R3(x) (((x) & 0xff00) == 0x1a00)
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#define IS_SHLL_R3(x) ((x) == 0x4300)
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#define IS_ADD_R3SP(x) ((x) == 0x3f3c)
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/* Skip any prologue before the guts of a function */
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CORE_ADDR
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sh_skip_prologue (start_pc)
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CORE_ADDR start_pc;
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{
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int w;
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w = read_memory_integer (start_pc, 2);
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while (IS_STS (w)
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|| IS_PUSH (w)
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|| IS_MOV_SP_FP (w)
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|| IS_MOV_R3 (w)
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|| IS_ADD_R3SP (w)
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|| IS_ADD_SP (w)
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|| IS_SHLL_R3 (w))
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{
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start_pc += 2;
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w = read_memory_integer (start_pc, 2);
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}
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return start_pc;
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}
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/* Disassemble an instruction. */
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int
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gdb_print_insn_sh (memaddr, info)
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bfd_vma memaddr;
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disassemble_info *info;
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{
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if (TARGET_BYTE_ORDER == BIG_ENDIAN)
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return print_insn_sh (memaddr, info);
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else
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return print_insn_shl (memaddr, info);
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}
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/* Given a GDB frame, determine the address of the calling function's frame.
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This will be used to create a new GDB frame struct, and then
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INIT_EXTRA_FRAME_INFO and INIT_FRAME_PC will be called for the new frame.
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For us, the frame address is its stack pointer value, so we look up
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the function prologue to determine the caller's sp value, and return it. */
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CORE_ADDR
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sh_frame_chain (frame)
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struct frame_info *frame;
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{
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if (!inside_entry_file (frame->pc))
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return read_memory_integer (FRAME_FP (frame) + frame->f_offset, 4);
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else
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return 0;
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}
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/* Put here the code to store, into a struct frame_saved_regs, the
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addresses of the saved registers of frame described by FRAME_INFO.
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This includes special registers such as pc and fp saved in special
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ways in the stack frame. sp is even more special: the address we
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return for it IS the sp for the next frame. */
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void
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frame_find_saved_regs (fi, fsr)
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struct frame_info *fi;
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struct frame_saved_regs *fsr;
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{
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int where[NUM_REGS];
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int rn;
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int have_fp = 0;
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int depth;
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int pc;
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int opc;
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int insn;
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int r3_val = 0;
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opc = pc = get_pc_function_start (fi->pc);
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insn = read_memory_integer (pc, 2);
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fi->leaf_function = 1;
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fi->f_offset = 0;
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for (rn = 0; rn < NUM_REGS; rn++)
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where[rn] = -1;
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depth = 0;
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/* Loop around examining the prologue insns, but give up
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after 15 of them, since we're getting silly then */
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while (pc < opc + 15 * 2)
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{
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/* See where the registers will be saved to */
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if (IS_PUSH (insn))
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{
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pc += 2;
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rn = GET_PUSHED_REG (insn);
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where[rn] = depth;
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insn = read_memory_integer (pc, 2);
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depth += 4;
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}
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else if (IS_STS (insn))
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{
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pc += 2;
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where[PR_REGNUM] = depth;
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insn = read_memory_integer (pc, 2);
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/* If we're storing the pr then this isn't a leaf */
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fi->leaf_function = 0;
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depth += 4;
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}
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else if (IS_MOV_R3 (insn))
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{
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r3_val = (char) (insn & 0xff);
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pc += 2;
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insn = read_memory_integer (pc, 2);
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}
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else if (IS_SHLL_R3 (insn))
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{
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r3_val <<= 1;
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pc += 2;
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insn = read_memory_integer (pc, 2);
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}
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else if (IS_ADD_R3SP (insn))
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{
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depth += -r3_val;
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pc += 2;
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insn = read_memory_integer (pc, 2);
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}
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else if (IS_ADD_SP (insn))
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{
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pc += 2;
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depth += -((char) (insn & 0xff));
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insn = read_memory_integer (pc, 2);
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}
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else
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break;
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}
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/* Now we know how deep things are, we can work out their addresses */
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for (rn = 0; rn < NUM_REGS; rn++)
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{
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if (where[rn] >= 0)
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{
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if (rn == FP_REGNUM)
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have_fp = 1;
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fsr->regs[rn] = fi->frame - where[rn] + depth - 4;
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}
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else
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{
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fsr->regs[rn] = 0;
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}
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}
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if (have_fp)
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{
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fsr->regs[SP_REGNUM] = read_memory_integer (fsr->regs[FP_REGNUM], 4);
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}
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else
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{
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fsr->regs[SP_REGNUM] = fi->frame - 4;
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}
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fi->f_offset = depth - where[FP_REGNUM] - 4;
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/* Work out the return pc - either from the saved pr or the pr
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value */
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if (fsr->regs[PR_REGNUM])
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fi->return_pc = read_memory_integer (fsr->regs[PR_REGNUM], 4);
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else
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fi->return_pc = read_register (PR_REGNUM);
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}
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/* initialize the extra info saved in a FRAME */
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void
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init_extra_frame_info (fromleaf, fi)
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int fromleaf;
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struct frame_info *fi;
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{
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struct frame_saved_regs dummy;
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if (fi->next)
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fi->pc = fi->next->return_pc;
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frame_find_saved_regs (fi, &dummy);
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}
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/* Discard from the stack the innermost frame,
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restoring all saved registers. */
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void
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pop_frame ()
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{
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register struct frame_info *frame = get_current_frame ();
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register CORE_ADDR fp;
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register int regnum;
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struct frame_saved_regs fsr;
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fp = FRAME_FP (frame);
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get_frame_saved_regs (frame, &fsr);
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/* Copy regs from where they were saved in the frame */
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for (regnum = 0; regnum < NUM_REGS; regnum++)
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{
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if (fsr.regs[regnum])
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{
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write_register (regnum, read_memory_integer (fsr.regs[regnum], 4));
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}
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}
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write_register (PC_REGNUM, frame->return_pc);
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write_register (SP_REGNUM, fp + 4);
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flush_cached_frames ();
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}
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/* Command to set the processor type. */
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void
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sh_set_processor_type_command (args, from_tty)
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char *args;
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int from_tty;
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{
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int i;
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char *temp;
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/* The `set' commands work by setting the value, then calling the hook,
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so we let the general command modify a scratch location, then decide
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here if we really want to modify the processor type. */
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if (tmp_sh_processor_type == NULL || *tmp_sh_processor_type == '\0')
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{
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printf_unfiltered ("The known SH processor types are as follows:\n\n");
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for (i = 0; sh_processor_type_table[i].name != NULL; ++i)
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printf_unfiltered ("%s\n", sh_processor_type_table[i].name);
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/* Restore the value. */
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tmp_sh_processor_type = strsave (sh_processor_type);
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return;
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}
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if (!sh_set_processor_type (tmp_sh_processor_type))
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{
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/* Restore to a valid value before erroring out. */
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temp = tmp_sh_processor_type;
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tmp_sh_processor_type = strsave (sh_processor_type);
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error ("Unknown processor type `%s'.", temp);
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}
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}
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static void
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sh_show_processor_type_command (args, from_tty)
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char *args;
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int from_tty;
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{
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}
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/* Modify the actual processor type. */
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int
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sh_set_processor_type (str)
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char *str;
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{
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int i, j;
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if (str == NULL)
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return 0;
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for (i = 0; sh_processor_type_table[i].name != NULL; ++i)
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{
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if (strcasecmp (str, sh_processor_type_table[i].name) == 0)
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{
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sh_processor_type = str;
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for (j = 0; j < NUM_REGS; ++j)
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reg_names[j] = sh_processor_type_table[i].regnames[j];
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return 1;
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}
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}
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return 0;
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}
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/* Print the registers in a form similar to the E7000 */
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static void
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show_regs (args, from_tty)
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char *args;
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int from_tty;
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{
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printf_filtered ("PC=%08x SR=%08x PR=%08x MACH=%08x MACHL=%08x\n",
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read_register (PC_REGNUM),
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read_register (SR_REGNUM),
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read_register (PR_REGNUM),
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read_register (MACH_REGNUM),
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read_register (MACL_REGNUM));
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printf_filtered ("R0-R7 %08x %08x %08x %08x %08x %08x %08x %08x\n",
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read_register (0),
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read_register (1),
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read_register (2),
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read_register (3),
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read_register (4),
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read_register (5),
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read_register (6),
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read_register (7));
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printf_filtered ("R8-R15 %08x %08x %08x %08x %08x %08x %08x %08x\n",
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read_register (8),
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read_register (9),
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read_register (10),
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read_register (11),
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read_register (12),
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read_register (13),
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read_register (14),
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read_register (15));
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}
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void
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_initialize_sh_tdep ()
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{
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struct cmd_list_element *c;
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tm_print_insn = gdb_print_insn_sh;
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c = add_set_cmd ("processor", class_support, var_string_noescape,
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(char *) &tmp_sh_processor_type,
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"Set the type of SH processor in use.\n\
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Set this to be able to access processor-type-specific registers.\n\
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",
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&setlist);
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c->function.cfunc = sh_set_processor_type_command;
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c = add_show_from_set (c, &showlist);
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c->function.cfunc = sh_show_processor_type_command;
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tmp_sh_processor_type = strsave (DEFAULT_SH_TYPE);
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sh_set_processor_type_command (strsave (DEFAULT_SH_TYPE), 0);
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add_com ("regs", class_vars, show_regs, "Print all registers");
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}
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