1489 lines
31 KiB
C
1489 lines
31 KiB
C
/* $NetBSD: pmap.c,v 1.34 2001/02/04 17:38:11 briggs Exp $ */
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/*
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* Copyright (C) 1995, 1996 Wolfgang Solfrank.
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* Copyright (C) 1995, 1996 TooLs GmbH.
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by TooLs GmbH.
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* 4. The name of TooLs GmbH may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
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* SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
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* PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
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* OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
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* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
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* OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
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* ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/malloc.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <sys/queue.h>
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#include <sys/systm.h>
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#include <uvm/uvm.h>
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#include <machine/pcb.h>
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#include <machine/powerpc.h>
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pte_t *ptable;
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int ptab_cnt;
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u_int ptab_mask;
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#define HTABSIZE (ptab_cnt * 64)
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struct pte_ovfl {
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LIST_ENTRY(pte_ovfl) po_list; /* Linked list of overflow entries */
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struct pte po_pte; /* PTE for this mapping */
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};
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LIST_HEAD(pte_ovtab, pte_ovfl) *potable; /* Overflow entries for ptable */
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struct pmap kernel_pmap_;
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int physmem;
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static int npgs;
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static u_int nextavail;
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#ifndef MSGBUFADDR
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extern paddr_t msgbuf_paddr;
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#endif
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static struct mem_region *mem, *avail;
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/*
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* This is a cache of referenced/modified bits.
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* Bits herein are shifted by ATTRSHFT.
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*/
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static char *pmap_attrib;
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#define ATTRSHFT 4
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struct pv_entry {
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struct pv_entry *pv_next; /* Linked list of mappings */
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int pv_idx; /* Index into ptable */
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vaddr_t pv_va; /* virtual address of mapping */
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};
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struct pv_entry *pv_table;
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struct pv_page;
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struct pv_page_info {
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LIST_ENTRY(pv_page) pgi_list;
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struct pv_entry *pgi_freelist;
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int pgi_nfree;
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};
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#define NPVPPG ((NBPG - sizeof(struct pv_page_info)) / sizeof(struct pv_entry))
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struct pv_page {
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struct pv_page_info pvp_pgi;
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struct pv_entry pvp_pv[NPVPPG];
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};
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LIST_HEAD(pv_page_list, pv_page) pv_page_freelist;
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int pv_nfree;
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int pv_pcnt;
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static struct pv_entry *pmap_alloc_pv __P((void));
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static void pmap_free_pv __P((struct pv_entry *));
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void pmap_pinit __P((pmap_t));
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void pmap_release __P((pmap_t));
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struct po_page;
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struct po_page_info {
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LIST_ENTRY(po_page) pgi_list;
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vm_page_t pgi_page;
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LIST_HEAD(po_freelist, pte_ovfl) pgi_freelist;
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int pgi_nfree;
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};
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#define NPOPPG ((NBPG - sizeof(struct po_page_info)) / sizeof(struct pte_ovfl))
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struct po_page {
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struct po_page_info pop_pgi;
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struct pte_ovfl pop_po[NPOPPG];
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};
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LIST_HEAD(po_page_list, po_page) po_page_freelist;
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int po_nfree;
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int po_pcnt;
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static struct pte_ovfl *poalloc __P((void));
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static void pofree __P((struct pte_ovfl *, int));
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static u_int usedsr[NPMAPS / sizeof(u_int) / 8];
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static int pmap_initialized;
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static inline void tlbie __P((vaddr_t));
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static inline void tlbsync __P((void));
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static inline void tlbia __P((void));
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static inline int ptesr __P((sr_t *, vaddr_t));
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static inline int pteidx __P((sr_t, vaddr_t));
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static inline int ptematch __P((pte_t *, sr_t, vaddr_t, int));
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static __inline struct pv_entry *pa_to_pv __P((paddr_t));
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static __inline char *pa_to_attr __P((paddr_t));
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static int pte_insert __P((int, pte_t *));
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int pte_spill __P((vaddr_t)); /* Called from trap_subr.S */
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static inline int pmap_enter_pv __P((int, vaddr_t, paddr_t));
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static void pmap_remove_pv __P((int, vaddr_t, paddr_t, struct pte *));
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static pte_t *pte_find __P((struct pmap *, vaddr_t));
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/*
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* These small routines may have to be replaced,
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* if/when we support processors other that the 604.
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*/
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static inline void
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tlbie(ea)
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vaddr_t ea;
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{
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asm volatile ("tlbie %0" :: "r"(ea));
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}
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static inline void
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tlbsync()
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{
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asm volatile ("sync; tlbsync; sync");
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}
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static void
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tlbia()
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{
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vaddr_t i;
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asm volatile ("sync");
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for (i = 0; i < (vaddr_t)0x00040000; i += 0x00001000)
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tlbie(i);
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tlbsync();
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}
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static inline int
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ptesr(sr, addr)
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sr_t *sr;
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vaddr_t addr;
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{
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return sr[(u_int)addr >> ADDR_SR_SHFT];
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}
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static inline int
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pteidx(sr, addr)
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sr_t sr;
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vaddr_t addr;
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{
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int hash;
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hash = (sr & SR_VSID) ^ (((u_int)addr & ADDR_PIDX) >> ADDR_PIDX_SHFT);
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return hash & ptab_mask;
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}
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static inline int
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ptematch(ptp, sr, va, which)
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pte_t *ptp;
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sr_t sr;
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vaddr_t va;
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int which;
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{
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return ptp->pte_hi
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== (((sr & SR_VSID) << PTE_VSID_SHFT)
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| (((u_int)va >> ADDR_API_SHFT) & PTE_API)
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| which);
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}
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static __inline struct pv_entry *
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pa_to_pv(pa)
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paddr_t pa;
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{
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int bank, pg;
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bank = vm_physseg_find(atop(pa), &pg);
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if (bank == -1)
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return NULL;
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return &vm_physmem[bank].pmseg.pvent[pg];
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}
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static __inline char *
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pa_to_attr(pa)
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paddr_t pa;
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{
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int bank, pg;
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bank = vm_physseg_find(atop(pa), &pg);
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if (bank == -1)
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return NULL;
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return &vm_physmem[bank].pmseg.attrs[pg];
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}
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/*
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* Try to insert page table entry *pt into the ptable at idx.
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*
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* Note: *pt mustn't have PTE_VALID set.
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* This is done here as required by Book III, 4.12.
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*/
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static int
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pte_insert(idx, pt)
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int idx;
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pte_t *pt;
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{
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pte_t *ptp;
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int i;
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/*
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* First try primary hash.
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*/
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for (ptp = ptable + idx * 8, i = 8; --i >= 0; ptp++)
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if (!(ptp->pte_hi & PTE_VALID)) {
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*ptp = *pt;
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ptp->pte_hi &= ~PTE_HID;
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asm volatile ("sync");
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ptp->pte_hi |= PTE_VALID;
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return 1;
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}
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idx ^= ptab_mask;
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for (ptp = ptable + idx * 8, i = 8; --i >= 0; ptp++)
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if (!(ptp->pte_hi & PTE_VALID)) {
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*ptp = *pt;
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ptp->pte_hi |= PTE_HID;
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asm volatile ("sync");
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ptp->pte_hi |= PTE_VALID;
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return 1;
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}
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return 0;
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}
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/*
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* Spill handler.
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*
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* Tries to spill a page table entry from the overflow area.
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* Note that this routine runs in real mode on a separate stack,
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* with interrupts disabled.
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*/
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int
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pte_spill(addr)
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vaddr_t addr;
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{
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int idx, i;
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sr_t sr;
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struct pte_ovfl *po;
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pte_t ps;
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pte_t *pt;
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asm ("mfsrin %0,%1" : "=r"(sr) : "r"(addr));
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idx = pteidx(sr, addr);
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for (po = potable[idx].lh_first; po; po = po->po_list.le_next)
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if (ptematch(&po->po_pte, sr, addr, 0)) {
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/*
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* Now found an entry to be spilled into the real ptable.
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*/
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if (pte_insert(idx, &po->po_pte)) {
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LIST_REMOVE(po, po_list);
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pofree(po, 0);
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return 1;
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}
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/*
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* Have to substitute some entry. Use the primary hash for this.
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*
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* Use low bits of timebase as random generator
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*/
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asm ("mftb %0" : "=r"(i));
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pt = ptable + idx * 8 + (i & 7);
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pt->pte_hi &= ~PTE_VALID;
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ps = *pt;
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asm volatile ("sync");
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tlbie(addr);
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tlbsync();
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*pt = po->po_pte;
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asm volatile ("sync");
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pt->pte_hi |= PTE_VALID;
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po->po_pte = ps;
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if (ps.pte_hi & PTE_HID) {
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/*
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* We took an entry that was on the alternate hash
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* chain, so move it to it's original chain.
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*/
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po->po_pte.pte_hi &= ~PTE_HID;
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LIST_REMOVE(po, po_list);
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LIST_INSERT_HEAD(potable + (idx ^ ptab_mask),
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po, po_list);
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}
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return 1;
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}
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return 0;
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}
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/*
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* This is called during initppc, before the system is really initialized.
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*/
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void
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pmap_bootstrap(kernelstart, kernelend)
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u_int kernelstart, kernelend;
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{
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struct mem_region *mp, *mp1;
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int cnt, i;
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u_int s, e, sz;
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/*
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* Get memory.
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*/
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mem_regions(&mem, &avail);
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for (mp = mem; mp->size; mp++)
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physmem += btoc(mp->size);
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/*
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* Count the number of available entries.
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*/
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for (cnt = 0, mp = avail; mp->size; mp++)
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cnt++;
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/*
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* Page align all regions.
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* Non-page aligned memory isn't very interesting to us.
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* Also, sort the entries for ascending addresses.
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*/
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kernelstart &= ~PGOFSET;
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kernelend = (kernelend + PGOFSET) & ~PGOFSET;
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for (mp = avail; mp->size; mp++) {
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s = mp->start;
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e = mp->start + mp->size;
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/*
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* Check whether this region holds all of the kernel.
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*/
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if (s < kernelstart && e > kernelend) {
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avail[cnt].start = kernelend;
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avail[cnt++].size = e - kernelend;
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e = kernelstart;
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}
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/*
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* Look whether this regions starts within the kernel.
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*/
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if (s >= kernelstart && s < kernelend) {
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if (e <= kernelend)
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goto empty;
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s = kernelend;
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}
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/*
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* Now look whether this region ends within the kernel.
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*/
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if (e > kernelstart && e <= kernelend) {
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if (s >= kernelstart)
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goto empty;
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e = kernelstart;
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}
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/*
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* Now page align the start and size of the region.
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*/
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s = round_page(s);
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e = trunc_page(e);
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if (e < s)
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e = s;
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sz = e - s;
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/*
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* Check whether some memory is left here.
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*/
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if (sz == 0) {
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empty:
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bcopy(mp + 1, mp,
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(cnt - (mp - avail)) * sizeof *mp);
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cnt--;
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mp--;
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continue;
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}
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/*
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* Do an insertion sort.
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*/
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npgs += btoc(sz);
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for (mp1 = avail; mp1 < mp; mp1++)
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if (s < mp1->start)
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break;
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if (mp1 < mp) {
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bcopy(mp1, mp1 + 1, (char *)mp - (char *)mp1);
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mp1->start = s;
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mp1->size = sz;
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} else {
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mp->start = s;
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mp->size = sz;
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}
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}
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/*
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* The PEM recommends that the total number of PTEGs should be
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* at least 1/2 of the number of physical pages.
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*/
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#ifdef HTABENTS
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ptab_cnt = HTABENTS;
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#else
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ptab_cnt = (physmem + 1) / 2;
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/* The minimum is 1024 PTEGs. */
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if (ptab_cnt < 1024)
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ptab_cnt = 1024;
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/* Round up to power of 2. */
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asm ("cntlzw %0,%1" : "=r"(i) : "r"(ptab_cnt - 1));
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ptab_cnt = 1 << (32 - i);
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#endif
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/*
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* Find suitably aligned memory for HTAB.
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*/
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for (mp = avail; mp->size; mp++) {
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s = roundup(mp->start, HTABSIZE) - mp->start;
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if (mp->size < s + HTABSIZE)
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continue;
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ptable = (pte_t *)(mp->start + s);
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if (mp->size == s + HTABSIZE) {
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if (s)
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mp->size = s;
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else {
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bcopy(mp + 1, mp,
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(cnt - (mp - avail)) * sizeof *mp);
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mp = avail;
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}
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break;
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}
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if (s != 0) {
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bcopy(mp, mp + 1,
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(cnt - (mp - avail)) * sizeof *mp);
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mp++->size = s;
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cnt++;
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}
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mp->start += s + HTABSIZE;
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mp->size -= s + HTABSIZE;
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break;
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}
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if (!mp->size)
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panic("not enough memory?");
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npgs -= btoc(HTABSIZE);
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bzero((void *)ptable, HTABSIZE);
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ptab_mask = ptab_cnt - 1;
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/*
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* We cannot do pmap_steal_memory here,
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* since we don't run with translation enabled yet.
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*/
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s = sizeof(struct pte_ovtab) * ptab_cnt;
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sz = round_page(s);
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for (mp = avail; mp->size; mp++)
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if (mp->size >= sz)
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break;
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if (!mp->size)
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panic("not enough memory?");
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npgs -= btoc(sz);
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potable = (struct pte_ovtab *)mp->start;
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mp->size -= sz;
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mp->start += sz;
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if (mp->size <= 0)
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bcopy(mp + 1, mp, (cnt - (mp - avail)) * sizeof *mp);
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for (i = 0; i < ptab_cnt; i++)
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LIST_INIT(potable + i);
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LIST_INIT(&pv_page_freelist);
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#ifndef MSGBUFADDR
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/*
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* allow for msgbuf
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*/
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sz = round_page(MSGBUFSIZE);
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mp = NULL;
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for (mp1 = avail; mp1->size; mp1++)
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if (mp1->size >= sz)
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mp = mp1;
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if (mp == NULL)
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panic("not enough memory?");
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npgs -= btoc(sz);
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msgbuf_paddr = mp->start + mp->size - sz;
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mp->size -= sz;
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if (mp->size <= 0)
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bcopy(mp + 1, mp, (cnt - (mp - avail)) * sizeof *mp);
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#endif
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for (mp = avail; mp->size; mp++)
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uvm_page_physload(atop(mp->start), atop(mp->start + mp->size),
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atop(mp->start), atop(mp->start + mp->size),
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VM_FREELIST_DEFAULT);
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|
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/*
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* Initialize kernel pmap and hardware.
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*/
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#if NPMAPS >= KERNEL_SEGMENT / 16
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usedsr[KERNEL_SEGMENT / 16 / (sizeof usedsr[0] * 8)]
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|= 1 << ((KERNEL_SEGMENT / 16) % (sizeof usedsr[0] * 8));
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#endif
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for (i = 0; i < 16; i++) {
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pmap_kernel()->pm_sr[i] = EMPTY_SEGMENT;
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asm volatile ("mtsrin %0,%1"
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:: "r"(EMPTY_SEGMENT), "r"(i << ADDR_SR_SHFT));
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}
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pmap_kernel()->pm_sr[KERNEL_SR] = KERNEL_SEGMENT;
|
|
asm volatile ("mtsr %0,%1"
|
|
:: "n"(KERNEL_SR), "r"(KERNEL_SEGMENT));
|
|
asm volatile ("sync; mtsdr1 %0; isync"
|
|
:: "r"((u_int)ptable | (ptab_mask >> 10)));
|
|
tlbia();
|
|
nextavail = avail->start;
|
|
}
|
|
|
|
/*
|
|
* Restrict given range to physical memory
|
|
*/
|
|
void
|
|
pmap_real_memory(start, size)
|
|
paddr_t *start;
|
|
psize_t *size;
|
|
{
|
|
struct mem_region *mp;
|
|
|
|
for (mp = mem; mp->size; mp++) {
|
|
if (*start + *size > mp->start
|
|
&& *start < mp->start + mp->size) {
|
|
if (*start < mp->start) {
|
|
*size -= mp->start - *start;
|
|
*start = mp->start;
|
|
}
|
|
if (*start + *size > mp->start + mp->size)
|
|
*size = mp->start + mp->size - *start;
|
|
return;
|
|
}
|
|
}
|
|
*size = 0;
|
|
}
|
|
|
|
/*
|
|
* Initialize anything else for pmap handling.
|
|
* Called during vm_init().
|
|
*/
|
|
void
|
|
pmap_init()
|
|
{
|
|
struct pv_entry *pv;
|
|
vsize_t sz;
|
|
vaddr_t addr;
|
|
int i, s;
|
|
int bank;
|
|
char *attr;
|
|
|
|
sz = (vsize_t)((sizeof(struct pv_entry) + 1) * npgs);
|
|
sz = round_page(sz);
|
|
/* XXXCDC: ABSOLUTELY WRONG! uvm_km_zalloc() _CAN_
|
|
return 0 if out of VM */
|
|
addr = uvm_km_zalloc(kernel_map, sz);
|
|
s = splvm();
|
|
pv = pv_table = (struct pv_entry *)addr;
|
|
for (i = npgs; --i >= 0;)
|
|
pv++->pv_idx = -1;
|
|
LIST_INIT(&pv_page_freelist);
|
|
pmap_attrib = (char *)pv;
|
|
bzero(pv, npgs);
|
|
|
|
pv = pv_table;
|
|
attr = pmap_attrib;
|
|
for (bank = 0; bank < vm_nphysseg; bank++) {
|
|
sz = vm_physmem[bank].end - vm_physmem[bank].start;
|
|
vm_physmem[bank].pmseg.pvent = pv;
|
|
vm_physmem[bank].pmseg.attrs = attr;
|
|
pv += sz;
|
|
attr += sz;
|
|
}
|
|
|
|
pmap_initialized = 1;
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* How much virtual space is available to the kernel?
|
|
*/
|
|
void
|
|
pmap_virtual_space(start, end)
|
|
vaddr_t *start, *end;
|
|
{
|
|
/*
|
|
* Reserve one segment for kernel virtual memory
|
|
*/
|
|
*start = (vaddr_t)(KERNEL_SR << ADDR_SR_SHFT);
|
|
*end = *start + SEGMENT_LENGTH;
|
|
}
|
|
|
|
/*
|
|
* Create and return a physical map.
|
|
*/
|
|
struct pmap *
|
|
pmap_create()
|
|
{
|
|
struct pmap *pm;
|
|
|
|
pm = (struct pmap *)malloc(sizeof *pm, M_VMPMAP, M_WAITOK);
|
|
bzero((caddr_t)pm, sizeof *pm);
|
|
pmap_pinit(pm);
|
|
return pm;
|
|
}
|
|
|
|
/*
|
|
* Initialize a preallocated and zeroed pmap structure.
|
|
*/
|
|
void
|
|
pmap_pinit(pm)
|
|
struct pmap *pm;
|
|
{
|
|
int i, j;
|
|
|
|
/*
|
|
* Allocate some segment registers for this pmap.
|
|
*/
|
|
pm->pm_refs = 1;
|
|
for (i = 0; i < sizeof usedsr / sizeof usedsr[0]; i++)
|
|
if (usedsr[i] != 0xffffffff) {
|
|
j = ffs(~usedsr[i]) - 1;
|
|
usedsr[i] |= 1 << j;
|
|
pm->pm_sr[0] = (i * sizeof usedsr[0] * 8 + j) * 16;
|
|
for (i = 1; i < 16; i++)
|
|
pm->pm_sr[i] = pm->pm_sr[i - 1] + 1;
|
|
return;
|
|
}
|
|
panic("out of segments");
|
|
}
|
|
|
|
/*
|
|
* Add a reference to the given pmap.
|
|
*/
|
|
void
|
|
pmap_reference(pm)
|
|
struct pmap *pm;
|
|
{
|
|
pm->pm_refs++;
|
|
}
|
|
|
|
/*
|
|
* Retire the given pmap from service.
|
|
* Should only be called if the map contains no valid mappings.
|
|
*/
|
|
void
|
|
pmap_destroy(pm)
|
|
struct pmap *pm;
|
|
{
|
|
if (--pm->pm_refs == 0) {
|
|
pmap_release(pm);
|
|
free((caddr_t)pm, M_VMPMAP);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Release any resources held by the given physical map.
|
|
* Called when a pmap initialized by pmap_pinit is being released.
|
|
*/
|
|
void
|
|
pmap_release(pm)
|
|
struct pmap *pm;
|
|
{
|
|
int i, j;
|
|
|
|
if (!pm->pm_sr[0])
|
|
panic("pmap_release");
|
|
i = pm->pm_sr[0] / 16;
|
|
j = i % (sizeof usedsr[0] * 8);
|
|
i /= sizeof usedsr[0] * 8;
|
|
usedsr[i] &= ~(1 << j);
|
|
}
|
|
|
|
/*
|
|
* Copy the range specified by src_addr/len
|
|
* from the source map to the range dst_addr/len
|
|
* in the destination map.
|
|
*
|
|
* This routine is only advisory and need not do anything.
|
|
*/
|
|
void
|
|
pmap_copy(dst_pmap, src_pmap, dst_addr, len, src_addr)
|
|
struct pmap *dst_pmap, *src_pmap;
|
|
vaddr_t dst_addr, src_addr;
|
|
vsize_t len;
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Require that all active physical maps contain no
|
|
* incorrect entries NOW.
|
|
*/
|
|
void
|
|
pmap_update()
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Garbage collects the physical map system for
|
|
* pages which are no longer used.
|
|
* Success need not be guaranteed -- that is, there
|
|
* may well be pages which are not referenced, but
|
|
* others may be collected.
|
|
* Called by the pageout daemon when pages are scarce.
|
|
*/
|
|
void
|
|
pmap_collect(pm)
|
|
struct pmap *pm;
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Fill the given physical page with zeroes.
|
|
*/
|
|
void
|
|
pmap_zero_page(pa)
|
|
paddr_t pa;
|
|
{
|
|
#if 0
|
|
bzero((caddr_t)pa, NBPG);
|
|
#else
|
|
int i;
|
|
|
|
for (i = NBPG/CACHELINESIZE; i > 0; i--) {
|
|
__asm __volatile ("dcbz 0,%0" :: "r"(pa));
|
|
pa += CACHELINESIZE;
|
|
}
|
|
#endif
|
|
}
|
|
|
|
/*
|
|
* Copy the given physical source page to its destination.
|
|
*/
|
|
void
|
|
pmap_copy_page(src, dst)
|
|
paddr_t src, dst;
|
|
{
|
|
bcopy((caddr_t)src, (caddr_t)dst, NBPG);
|
|
}
|
|
|
|
static struct pv_entry *
|
|
pmap_alloc_pv()
|
|
{
|
|
struct pv_page *pvp;
|
|
struct pv_entry *pv;
|
|
int i;
|
|
|
|
if (pv_nfree == 0) {
|
|
if (!(pvp = (struct pv_page *)uvm_km_zalloc(kernel_map, NBPG)))
|
|
panic("pmap_alloc_pv: uvm_km_zalloc() failed");
|
|
pv_pcnt++;
|
|
pvp->pvp_pgi.pgi_freelist = pv = &pvp->pvp_pv[1];
|
|
for (i = NPVPPG - 2; --i >= 0; pv++)
|
|
pv->pv_next = pv + 1;
|
|
pv->pv_next = 0;
|
|
pv_nfree += pvp->pvp_pgi.pgi_nfree = NPVPPG - 1;
|
|
LIST_INSERT_HEAD(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
pv = pvp->pvp_pv;
|
|
} else {
|
|
pv_nfree--;
|
|
pvp = pv_page_freelist.lh_first;
|
|
if (--pvp->pvp_pgi.pgi_nfree <= 0)
|
|
LIST_REMOVE(pvp, pvp_pgi.pgi_list);
|
|
pv = pvp->pvp_pgi.pgi_freelist;
|
|
pvp->pvp_pgi.pgi_freelist = pv->pv_next;
|
|
}
|
|
return pv;
|
|
}
|
|
|
|
static void
|
|
pmap_free_pv(pv)
|
|
struct pv_entry *pv;
|
|
{
|
|
struct pv_page *pvp;
|
|
|
|
pvp = (struct pv_page *)trunc_page((vaddr_t)pv);
|
|
switch (++pvp->pvp_pgi.pgi_nfree) {
|
|
case 1:
|
|
LIST_INSERT_HEAD(&pv_page_freelist, pvp, pvp_pgi.pgi_list);
|
|
default:
|
|
pv->pv_next = pvp->pvp_pgi.pgi_freelist;
|
|
pvp->pvp_pgi.pgi_freelist = pv;
|
|
pv_nfree++;
|
|
break;
|
|
case NPVPPG:
|
|
pv_nfree -= NPVPPG - 1;
|
|
pv_pcnt--;
|
|
LIST_REMOVE(pvp, pvp_pgi.pgi_list);
|
|
uvm_km_free(kernel_map, (vaddr_t)pvp, NBPG);
|
|
break;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* We really hope that we don't need overflow entries
|
|
* before the VM system is initialized! XXX
|
|
*/
|
|
static struct pte_ovfl *
|
|
poalloc()
|
|
{
|
|
struct po_page *pop;
|
|
struct pte_ovfl *po;
|
|
vm_page_t mem;
|
|
int i;
|
|
|
|
if (!pmap_initialized)
|
|
panic("poalloc");
|
|
|
|
if (po_nfree == 0) {
|
|
/*
|
|
* Since we cannot use maps for potable allocation,
|
|
* we have to steal some memory from the VM system. XXX
|
|
*/
|
|
mem = uvm_pagealloc(NULL, 0, NULL, UVM_PGA_USERESERVE);
|
|
po_pcnt++;
|
|
pop = (struct po_page *)VM_PAGE_TO_PHYS(mem);
|
|
pop->pop_pgi.pgi_page = mem;
|
|
LIST_INIT(&pop->pop_pgi.pgi_freelist);
|
|
for (i = NPOPPG - 1, po = pop->pop_po + 1; --i >= 0; po++)
|
|
LIST_INSERT_HEAD(&pop->pop_pgi.pgi_freelist, po, po_list);
|
|
po_nfree += pop->pop_pgi.pgi_nfree = NPOPPG - 1;
|
|
LIST_INSERT_HEAD(&po_page_freelist, pop, pop_pgi.pgi_list);
|
|
po = pop->pop_po;
|
|
} else {
|
|
po_nfree--;
|
|
pop = po_page_freelist.lh_first;
|
|
if (--pop->pop_pgi.pgi_nfree <= 0)
|
|
LIST_REMOVE(pop, pop_pgi.pgi_list);
|
|
po = pop->pop_pgi.pgi_freelist.lh_first;
|
|
LIST_REMOVE(po, po_list);
|
|
}
|
|
return po;
|
|
}
|
|
|
|
static void
|
|
pofree(po, freepage)
|
|
struct pte_ovfl *po;
|
|
int freepage;
|
|
{
|
|
struct po_page *pop;
|
|
|
|
pop = (struct po_page *)trunc_page((vaddr_t)po);
|
|
switch (++pop->pop_pgi.pgi_nfree) {
|
|
case NPOPPG:
|
|
if (!freepage)
|
|
break;
|
|
po_nfree -= NPOPPG - 1;
|
|
po_pcnt--;
|
|
LIST_REMOVE(pop, pop_pgi.pgi_list);
|
|
uvm_pagefree(pop->pop_pgi.pgi_page);
|
|
return;
|
|
case 1:
|
|
LIST_INSERT_HEAD(&po_page_freelist, pop, pop_pgi.pgi_list);
|
|
default:
|
|
break;
|
|
}
|
|
LIST_INSERT_HEAD(&pop->pop_pgi.pgi_freelist, po, po_list);
|
|
po_nfree++;
|
|
}
|
|
|
|
/*
|
|
* This returns whether this is the first mapping of a page.
|
|
*/
|
|
static inline int
|
|
pmap_enter_pv(pteidx, va, pa)
|
|
int pteidx;
|
|
vaddr_t va;
|
|
paddr_t pa;
|
|
{
|
|
struct pv_entry *pv, *npv;
|
|
int s, first;
|
|
|
|
if (!pmap_initialized)
|
|
return 0;
|
|
|
|
s = splvm();
|
|
|
|
pv = pa_to_pv(pa);
|
|
if ((first = pv->pv_idx) == -1) {
|
|
/*
|
|
* No entries yet, use header as the first entry.
|
|
*/
|
|
pv->pv_va = va;
|
|
pv->pv_idx = pteidx;
|
|
pv->pv_next = NULL;
|
|
} else {
|
|
/*
|
|
* There is at least one other VA mapping this page.
|
|
* Place this entry after the header.
|
|
*/
|
|
npv = pmap_alloc_pv();
|
|
npv->pv_va = va;
|
|
npv->pv_idx = pteidx;
|
|
npv->pv_next = pv->pv_next;
|
|
pv->pv_next = npv;
|
|
}
|
|
splx(s);
|
|
return first;
|
|
}
|
|
|
|
static void
|
|
pmap_remove_pv(pteidx, va, pa, pte)
|
|
int pteidx;
|
|
vaddr_t va;
|
|
paddr_t pa;
|
|
struct pte *pte;
|
|
{
|
|
struct pv_entry *pv, *npv;
|
|
char *attr;
|
|
|
|
/*
|
|
* First transfer reference/change bits to cache.
|
|
*/
|
|
attr = pa_to_attr(pa);
|
|
if (attr == NULL)
|
|
return;
|
|
*attr |= (pte->pte_lo & (PTE_REF | PTE_CHG)) >> ATTRSHFT;
|
|
|
|
/*
|
|
* Remove from the PV table.
|
|
*/
|
|
pv = pa_to_pv(pa);
|
|
|
|
/*
|
|
* If it is the first entry on the list, it is actually
|
|
* in the header and we must copy the following entry up
|
|
* to the header. Otherwise we must search the list for
|
|
* the entry. In either case we free the now unused entry.
|
|
*/
|
|
if (pteidx == pv->pv_idx && va == pv->pv_va) {
|
|
npv = pv->pv_next;
|
|
if (npv) {
|
|
*pv = *npv;
|
|
pmap_free_pv(npv);
|
|
} else
|
|
pv->pv_idx = -1;
|
|
} else {
|
|
for (; (npv = pv->pv_next) != NULL; pv = npv)
|
|
if (pteidx == npv->pv_idx && va == npv->pv_va)
|
|
break;
|
|
if (npv) {
|
|
pv->pv_next = npv->pv_next;
|
|
pmap_free_pv(npv);
|
|
}
|
|
#ifdef DIAGNOSTIC
|
|
else
|
|
panic("pmap_remove_pv: not on list\n");
|
|
#endif
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Insert physical page at pa into the given pmap at virtual address va.
|
|
*/
|
|
int
|
|
pmap_enter(pm, va, pa, prot, flags)
|
|
struct pmap *pm;
|
|
vaddr_t va;
|
|
paddr_t pa;
|
|
vm_prot_t prot;
|
|
int flags;
|
|
{
|
|
sr_t sr;
|
|
int idx, s;
|
|
pte_t pte;
|
|
struct pte_ovfl *po;
|
|
int managed;
|
|
struct mem_region *mp;
|
|
|
|
/*
|
|
* Have to remove any existing mapping first.
|
|
*/
|
|
pmap_remove(pm, va, va + NBPG);
|
|
|
|
/*
|
|
* Compute the HTAB index.
|
|
*/
|
|
idx = pteidx(sr = ptesr(pm->pm_sr, va), va);
|
|
/*
|
|
* Construct the PTE.
|
|
*
|
|
* Note: Don't set the valid bit for correct operation of tlb update.
|
|
*/
|
|
pte.pte_hi = ((sr & SR_VSID) << PTE_VSID_SHFT)
|
|
| ((va & ADDR_PIDX) >> ADDR_API_SHFT);
|
|
pte.pte_lo = (pa & PTE_RPGN) | PTE_M | PTE_I | PTE_G;
|
|
|
|
managed = 0;
|
|
if (vm_physseg_find(atop(pa), NULL) != -1)
|
|
managed = 1;
|
|
for (mp = mem; mp->size; mp++) {
|
|
if (pa >= mp->start && pa < mp->start + mp->size) {
|
|
pte.pte_lo &= ~(PTE_I | PTE_G);
|
|
break;
|
|
}
|
|
}
|
|
if (prot & VM_PROT_WRITE)
|
|
pte.pte_lo |= PTE_RW;
|
|
else
|
|
pte.pte_lo |= PTE_RO;
|
|
|
|
/*
|
|
* Now record mapping for later back-translation.
|
|
*/
|
|
if (pmap_initialized && managed)
|
|
if (pmap_enter_pv(idx, va, pa)) {
|
|
/*
|
|
* Flush the real memory from the cache.
|
|
*/
|
|
__syncicache((void *)pa, NBPG);
|
|
}
|
|
|
|
s = splvm();
|
|
pm->pm_stats.resident_count++;
|
|
/*
|
|
* Try to insert directly into HTAB.
|
|
*/
|
|
if (pte_insert(idx, &pte)) {
|
|
splx(s);
|
|
return (KERN_SUCCESS);
|
|
}
|
|
|
|
/*
|
|
* Have to allocate overflow entry.
|
|
*
|
|
* Note, that we must use real addresses for these.
|
|
*/
|
|
po = poalloc();
|
|
po->po_pte = pte;
|
|
LIST_INSERT_HEAD(potable + idx, po, po_list);
|
|
splx(s);
|
|
|
|
return (KERN_SUCCESS);
|
|
}
|
|
|
|
void
|
|
pmap_kenter_pa(va, pa, prot)
|
|
vaddr_t va;
|
|
paddr_t pa;
|
|
vm_prot_t prot;
|
|
{
|
|
pmap_enter(pmap_kernel(), va, pa, prot, PMAP_WIRED);
|
|
}
|
|
|
|
void
|
|
pmap_kenter_pgs(va, pgs, npgs)
|
|
vaddr_t va;
|
|
struct vm_page **pgs;
|
|
int npgs;
|
|
{
|
|
int i;
|
|
|
|
for (i = 0; i < npgs; i++, va += PAGE_SIZE) {
|
|
pmap_enter(pmap_kernel(), va, VM_PAGE_TO_PHYS(pgs[i]),
|
|
VM_PROT_READ|VM_PROT_WRITE, PMAP_WIRED);
|
|
}
|
|
}
|
|
|
|
void
|
|
pmap_kremove(va, len)
|
|
vaddr_t va;
|
|
vsize_t len;
|
|
{
|
|
for (len >>= PAGE_SHIFT; len > 0; len--, va += PAGE_SIZE) {
|
|
pmap_remove(pmap_kernel(), va, va + PAGE_SIZE);
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Remove the given range of mapping entries.
|
|
*/
|
|
void
|
|
pmap_remove(pm, va, endva)
|
|
struct pmap *pm;
|
|
vaddr_t va, endva;
|
|
{
|
|
int idx, i, s;
|
|
sr_t sr;
|
|
pte_t *ptp;
|
|
struct pte_ovfl *po, *npo;
|
|
|
|
s = splvm();
|
|
while (va < endva) {
|
|
idx = pteidx(sr = ptesr(pm->pm_sr, va), va);
|
|
for (ptp = ptable + idx * 8, i = 8; --i >= 0; ptp++)
|
|
if (ptematch(ptp, sr, va, PTE_VALID)) {
|
|
pmap_remove_pv(idx, va, ptp->pte_lo, ptp);
|
|
ptp->pte_hi &= ~PTE_VALID;
|
|
asm volatile ("sync");
|
|
tlbie(va);
|
|
tlbsync();
|
|
pm->pm_stats.resident_count--;
|
|
}
|
|
for (ptp = ptable + (idx ^ ptab_mask) * 8, i = 8; --i >= 0; ptp++)
|
|
if (ptematch(ptp, sr, va, PTE_VALID | PTE_HID)) {
|
|
pmap_remove_pv(idx, va, ptp->pte_lo, ptp);
|
|
ptp->pte_hi &= ~PTE_VALID;
|
|
asm volatile ("sync");
|
|
tlbie(va);
|
|
tlbsync();
|
|
pm->pm_stats.resident_count--;
|
|
}
|
|
for (po = potable[idx].lh_first; po; po = npo) {
|
|
npo = po->po_list.le_next;
|
|
if (ptematch(&po->po_pte, sr, va, 0)) {
|
|
pmap_remove_pv(idx, va, po->po_pte.pte_lo,
|
|
&po->po_pte);
|
|
LIST_REMOVE(po, po_list);
|
|
pofree(po, 1);
|
|
pm->pm_stats.resident_count--;
|
|
}
|
|
}
|
|
va += NBPG;
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
static pte_t *
|
|
pte_find(pm, va)
|
|
struct pmap *pm;
|
|
vaddr_t va;
|
|
{
|
|
int idx, i;
|
|
sr_t sr;
|
|
pte_t *ptp;
|
|
struct pte_ovfl *po;
|
|
|
|
idx = pteidx(sr = ptesr(pm->pm_sr, va), va);
|
|
for (ptp = ptable + idx * 8, i = 8; --i >= 0; ptp++)
|
|
if (ptematch(ptp, sr, va, PTE_VALID))
|
|
return ptp;
|
|
for (ptp = ptable + (idx ^ ptab_mask) * 8, i = 8; --i >= 0; ptp++)
|
|
if (ptematch(ptp, sr, va, PTE_VALID | PTE_HID))
|
|
return ptp;
|
|
for (po = potable[idx].lh_first; po; po = po->po_list.le_next)
|
|
if (ptematch(&po->po_pte, sr, va, 0))
|
|
return &po->po_pte;
|
|
return 0;
|
|
}
|
|
|
|
/*
|
|
* Get the physical page address for the given pmap/virtual address.
|
|
*/
|
|
boolean_t
|
|
pmap_extract(pm, va, pap)
|
|
struct pmap *pm;
|
|
vaddr_t va;
|
|
paddr_t *pap;
|
|
{
|
|
pte_t *ptp;
|
|
int s = splvm();
|
|
|
|
if (!(ptp = pte_find(pm, va))) {
|
|
splx(s);
|
|
return (FALSE);
|
|
}
|
|
*pap = (ptp->pte_lo & PTE_RPGN) | (va & ADDR_POFF);
|
|
splx(s);
|
|
return (TRUE);
|
|
}
|
|
|
|
/*
|
|
* Lower the protection on the specified range of this pmap.
|
|
*
|
|
* There are only two cases: either the protection is going to 0,
|
|
* or it is going to read-only.
|
|
*/
|
|
void
|
|
pmap_protect(pm, sva, eva, prot)
|
|
struct pmap *pm;
|
|
vaddr_t sva, eva;
|
|
vm_prot_t prot;
|
|
{
|
|
pte_t *ptp;
|
|
int valid, s;
|
|
|
|
if (prot & VM_PROT_READ) {
|
|
s = splvm();
|
|
while (sva < eva) {
|
|
if ((ptp = pte_find(pm, sva)) != NULL) {
|
|
valid = ptp->pte_hi & PTE_VALID;
|
|
ptp->pte_hi &= ~PTE_VALID;
|
|
asm volatile ("sync");
|
|
tlbie(sva);
|
|
tlbsync();
|
|
ptp->pte_lo &= ~PTE_PP;
|
|
ptp->pte_lo |= PTE_RO;
|
|
asm volatile ("sync");
|
|
ptp->pte_hi |= valid;
|
|
}
|
|
sva += NBPG;
|
|
}
|
|
splx(s);
|
|
return;
|
|
}
|
|
pmap_remove(pm, sva, eva);
|
|
}
|
|
|
|
boolean_t
|
|
ptemodify(pg, mask, val)
|
|
struct vm_page *pg;
|
|
u_int mask;
|
|
u_int val;
|
|
{
|
|
paddr_t pa = VM_PAGE_TO_PHYS(pg);
|
|
struct pv_entry *pv;
|
|
pte_t *ptp;
|
|
struct pte_ovfl *po;
|
|
int i, s;
|
|
char *attr;
|
|
int rv;
|
|
|
|
/*
|
|
* First modify bits in cache.
|
|
*/
|
|
attr = pa_to_attr(pa);
|
|
if (attr == NULL)
|
|
return FALSE;
|
|
|
|
*attr &= ~mask >> ATTRSHFT;
|
|
*attr |= val >> ATTRSHFT;
|
|
|
|
pv = pa_to_pv(pa);
|
|
if (pv->pv_idx < 0)
|
|
return FALSE;
|
|
|
|
rv = FALSE;
|
|
s = splvm();
|
|
for (; pv; pv = pv->pv_next) {
|
|
for (ptp = ptable + pv->pv_idx * 8, i = 8; --i >= 0; ptp++)
|
|
if ((ptp->pte_hi & PTE_VALID)
|
|
&& (ptp->pte_lo & PTE_RPGN) == pa) {
|
|
ptp->pte_hi &= ~PTE_VALID;
|
|
asm volatile ("sync");
|
|
tlbie(pv->pv_va);
|
|
tlbsync();
|
|
rv |= ptp->pte_lo & mask;
|
|
ptp->pte_lo &= ~mask;
|
|
ptp->pte_lo |= val;
|
|
asm volatile ("sync");
|
|
ptp->pte_hi |= PTE_VALID;
|
|
}
|
|
for (ptp = ptable + (pv->pv_idx ^ ptab_mask) * 8, i = 8; --i >= 0; ptp++)
|
|
if ((ptp->pte_hi & PTE_VALID)
|
|
&& (ptp->pte_lo & PTE_RPGN) == pa) {
|
|
ptp->pte_hi &= ~PTE_VALID;
|
|
asm volatile ("sync");
|
|
tlbie(pv->pv_va);
|
|
tlbsync();
|
|
rv |= ptp->pte_lo & mask;
|
|
ptp->pte_lo &= ~mask;
|
|
ptp->pte_lo |= val;
|
|
asm volatile ("sync");
|
|
ptp->pte_hi |= PTE_VALID;
|
|
}
|
|
for (po = potable[pv->pv_idx].lh_first; po; po = po->po_list.le_next)
|
|
if ((po->po_pte.pte_lo & PTE_RPGN) == pa) {
|
|
rv |= ptp->pte_lo & mask;
|
|
po->po_pte.pte_lo &= ~mask;
|
|
po->po_pte.pte_lo |= val;
|
|
}
|
|
}
|
|
splx(s);
|
|
return rv != 0;
|
|
}
|
|
|
|
int
|
|
ptebits(pg, bit)
|
|
struct vm_page *pg;
|
|
int bit;
|
|
{
|
|
struct pv_entry *pv;
|
|
pte_t *ptp;
|
|
struct pte_ovfl *po;
|
|
int i, s, bits = 0;
|
|
char *attr;
|
|
paddr_t pa = VM_PAGE_TO_PHYS(pg);
|
|
|
|
/*
|
|
* First try the cache.
|
|
*/
|
|
attr = pa_to_attr(pa);
|
|
if (attr == NULL)
|
|
return 0;
|
|
bits |= (*attr << ATTRSHFT) & bit;
|
|
if (bits == bit)
|
|
return bits;
|
|
|
|
pv = pa_to_pv(pa);
|
|
if (pv->pv_idx < 0)
|
|
return 0;
|
|
|
|
s = splvm();
|
|
for (; pv; pv = pv->pv_next) {
|
|
for (ptp = ptable + pv->pv_idx * 8, i = 8; --i >= 0; ptp++)
|
|
if ((ptp->pte_hi & PTE_VALID)
|
|
&& (ptp->pte_lo & PTE_RPGN) == pa) {
|
|
bits |= ptp->pte_lo & bit;
|
|
if (bits == bit) {
|
|
splx(s);
|
|
return bits;
|
|
}
|
|
}
|
|
for (ptp = ptable + (pv->pv_idx ^ ptab_mask) * 8, i = 8; --i >= 0; ptp++)
|
|
if ((ptp->pte_hi & PTE_VALID)
|
|
&& (ptp->pte_lo & PTE_RPGN) == pa) {
|
|
bits |= ptp->pte_lo & bit;
|
|
if (bits == bit) {
|
|
splx(s);
|
|
return bits;
|
|
}
|
|
}
|
|
for (po = potable[pv->pv_idx].lh_first; po; po = po->po_list.le_next)
|
|
if ((po->po_pte.pte_lo & PTE_RPGN) == pa) {
|
|
bits |= po->po_pte.pte_lo & bit;
|
|
if (bits == bit) {
|
|
splx(s);
|
|
return bits;
|
|
}
|
|
}
|
|
}
|
|
splx(s);
|
|
return bits;
|
|
}
|
|
|
|
/*
|
|
* Lower the protection on the specified physical page.
|
|
*
|
|
* There are only two cases: either the protection is going to 0,
|
|
* or it is going to read-only.
|
|
*/
|
|
void
|
|
pmap_page_protect(pg, prot)
|
|
struct vm_page *pg;
|
|
vm_prot_t prot;
|
|
{
|
|
paddr_t pa = VM_PAGE_TO_PHYS(pg);
|
|
vaddr_t va;
|
|
pte_t *ptp;
|
|
struct pte_ovfl *po, *npo;
|
|
int i, s, idx;
|
|
struct pv_entry *pv;
|
|
|
|
pa &= ~ADDR_POFF;
|
|
if (prot & VM_PROT_READ) {
|
|
ptemodify(pg, PTE_PP, PTE_RO);
|
|
return;
|
|
}
|
|
|
|
pv = pa_to_pv(pa);
|
|
if (pv == NULL)
|
|
return;
|
|
|
|
s = splvm();
|
|
while (pv->pv_idx >= 0) {
|
|
idx = pv->pv_idx;
|
|
va = pv->pv_va;
|
|
for (ptp = ptable + idx * 8, i = 8; --i >= 0; ptp++)
|
|
if ((ptp->pte_hi & PTE_VALID)
|
|
&& (ptp->pte_lo & PTE_RPGN) == pa) {
|
|
pmap_remove_pv(idx, va, pa, ptp);
|
|
ptp->pte_hi &= ~PTE_VALID;
|
|
asm volatile ("sync");
|
|
tlbie(va);
|
|
tlbsync();
|
|
goto next;
|
|
}
|
|
for (ptp = ptable + (idx ^ ptab_mask) * 8, i = 8; --i >= 0; ptp++)
|
|
if ((ptp->pte_hi & PTE_VALID)
|
|
&& (ptp->pte_lo & PTE_RPGN) == pa) {
|
|
pmap_remove_pv(idx, va, pa, ptp);
|
|
ptp->pte_hi &= ~PTE_VALID;
|
|
asm volatile ("sync");
|
|
tlbie(va);
|
|
tlbsync();
|
|
goto next;
|
|
}
|
|
for (po = potable[idx].lh_first; po; po = npo) {
|
|
npo = po->po_list.le_next;
|
|
if ((po->po_pte.pte_lo & PTE_RPGN) == pa) {
|
|
pmap_remove_pv(idx, va, pa, &po->po_pte);
|
|
LIST_REMOVE(po, po_list);
|
|
pofree(po, 1);
|
|
goto next;
|
|
}
|
|
}
|
|
next:
|
|
}
|
|
splx(s);
|
|
}
|
|
|
|
/*
|
|
* Activate the address space for the specified process. If the process
|
|
* is the current process, load the new MMU context.
|
|
*/
|
|
void
|
|
pmap_activate(p)
|
|
struct proc *p;
|
|
{
|
|
struct pcb *pcb = &p->p_addr->u_pcb;
|
|
pmap_t pmap = p->p_vmspace->vm_map.pmap, rpm;
|
|
int psl, i, ksr, seg;
|
|
|
|
/*
|
|
* XXX Normally performed in cpu_fork().
|
|
*/
|
|
if (pcb->pcb_pm != pmap) {
|
|
pcb->pcb_pm = pmap;
|
|
(void) pmap_extract(pmap_kernel(), (vaddr_t)pcb->pcb_pm,
|
|
(paddr_t *)&pcb->pcb_pmreal);
|
|
}
|
|
|
|
if (p == curproc) {
|
|
/* Disable interrupts while switching. */
|
|
__asm __volatile("mfmsr %0" : "=r"(psl) :);
|
|
psl &= ~PSL_EE;
|
|
__asm __volatile("mtmsr %0" :: "r"(psl));
|
|
|
|
/* Store pointer to new current pmap. */
|
|
curpm = pcb->pcb_pmreal;
|
|
|
|
/* Save kernel SR. */
|
|
__asm __volatile("mfsr %0,14" : "=r"(ksr) :);
|
|
|
|
/*
|
|
* Set new segment registers. We use the pmap's real
|
|
* address to avoid accessibility problems.
|
|
*/
|
|
rpm = pcb->pcb_pmreal;
|
|
for (i = 0; i < 16; i++) {
|
|
seg = rpm->pm_sr[i];
|
|
__asm __volatile("mtsrin %0,%1"
|
|
:: "r"(seg), "r"(i << ADDR_SR_SHFT));
|
|
}
|
|
|
|
/* Restore kernel SR. */
|
|
__asm __volatile("mtsr 14,%0" :: "r"(ksr));
|
|
|
|
/* Interrupts are OK again. */
|
|
psl |= PSL_EE;
|
|
__asm __volatile("mtmsr %0" :: "r"(psl));
|
|
}
|
|
}
|
|
|
|
/*
|
|
* Deactivate the specified process's address space.
|
|
*/
|
|
void
|
|
pmap_deactivate(p)
|
|
struct proc *p;
|
|
{
|
|
}
|
|
|
|
/*
|
|
* Synchronize caches corresponding to [addr, addr+len) in p.
|
|
*/
|
|
void
|
|
pmap_procwr(p, va, len)
|
|
struct proc *p;
|
|
vaddr_t va;
|
|
size_t len;
|
|
{
|
|
paddr_t pa;
|
|
|
|
(void) pmap_extract(p->p_vmspace->vm_map.pmap, va, &pa);
|
|
__syncicache((void *)pa, len);
|
|
}
|