1205 lines
28 KiB
C
1205 lines
28 KiB
C
/* $NetBSD: aha1742.c,v 1.61 1996/05/12 23:40:01 mycroft Exp $ */
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/*
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* Copyright (c) 1994 Charles Hannum. All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Charles Hannum.
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* 4. The name of the author may not be used to endorse or promote products
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* derived from this software without specific prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
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* OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
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* NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
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* DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
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* THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
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* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
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* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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*/
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/*
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* Originally written by Julian Elischer (julian@tfs.com)
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* for TRW Financial Systems for use under the MACH(2.5) operating system.
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*
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* TRW Financial Systems, in accordance with their agreement with Carnegie
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* Mellon University, makes this software available to CMU to distribute
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* or use in any manner that they see fit as long as this message is kept with
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* the software. For this reason TFS also grants any other persons or
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* organisations permission to use or modify this software.
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*
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* TFS supplies this software to be publicly redistributed
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* on the understanding that TFS is not responsible for the correct
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* functioning of this software in any circumstances.
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*
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* commenced: Sun Sep 27 18:14:01 PDT 1992
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*/
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#include <sys/types.h>
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/kernel.h>
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#include <sys/errno.h>
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#include <sys/ioctl.h>
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#include <sys/device.h>
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#include <sys/malloc.h>
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#include <sys/buf.h>
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#include <sys/proc.h>
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#include <sys/user.h>
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#include <machine/bus.h>
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#include <machine/intr.h>
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#include <dev/eisa/eisareg.h>
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#include <dev/eisa/eisavar.h>
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#include <dev/eisa/eisadevs.h>
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#include <scsi/scsi_all.h>
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#include <scsi/scsiconf.h>
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#ifndef DDB
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#define Debugger() panic("should call debugger here (aha1742.c)")
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#endif /* ! DDB */
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typedef u_long physaddr;
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typedef u_long physlen;
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#define KVTOPHYS(x) vtophys(x)
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#define AHB_ECB_MAX 32 /* store up to 32 ECBs at one time */
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#define ECB_HASH_SIZE 32 /* hash table size for phystokv */
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#define ECB_HASH_SHIFT 9
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#define ECB_HASH(x) ((((long)(x))>>ECB_HASH_SHIFT) & (ECB_HASH_SIZE - 1))
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#define AHB_NSEG 33 /* number of dma segments supported */
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/*
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* EISA registers (offset from slot base)
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*/
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#define EISA_VENDOR 0x0c80 /* vendor ID (2 ports) */
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#define EISA_MODEL 0x0c82 /* model number (2 ports) */
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#define EISA_CONTROL 0x0c84
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#define EISA_RESET 0x04
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#define EISA_ERROR 0x02
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#define EISA_ENABLE 0x01
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/*
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* AHA1740 EISA board mode registers (Offset from slot base)
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*/
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#define PORTADDR 0xCC0
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#define PORTADDR_ENHANCED 0x80
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#define BIOSADDR 0xCC1
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#define INTDEF 0xCC2
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#define SCSIDEF 0xCC3
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#define BUSDEF 0xCC4
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#define RESV0 0xCC5
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#define RESV1 0xCC6
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#define RESV2 0xCC7
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/**** bit definitions for INTDEF ****/
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#define INT9 0x00
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#define INT10 0x01
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#define INT11 0x02
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#define INT12 0x03
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#define INT14 0x05
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#define INT15 0x06
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#define INTHIGH 0x08 /* int high=ACTIVE (else edge) */
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#define INTEN 0x10
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/**** bit definitions for SCSIDEF ****/
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#define HSCSIID 0x0F /* our SCSI ID */
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#define RSTPWR 0x10 /* reset scsi bus on power up or reset */
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/**** bit definitions for BUSDEF ****/
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#define B0uS 0x00 /* give up bus immediatly */
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#define B4uS 0x01 /* delay 4uSec. */
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#define B8uS 0x02
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/*
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* AHA1740 ENHANCED mode mailbox control regs (Offset from slot base)
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*/
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#define MBOXOUT0 0xCD0
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#define MBOXOUT1 0xCD1
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#define MBOXOUT2 0xCD2
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#define MBOXOUT3 0xCD3
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#define ATTN 0xCD4
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#define G2CNTRL 0xCD5
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#define G2INTST 0xCD6
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#define G2STAT 0xCD7
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#define MBOXIN0 0xCD8
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#define MBOXIN1 0xCD9
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#define MBOXIN2 0xCDA
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#define MBOXIN3 0xCDB
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#define G2STAT2 0xCDC
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/*
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* Bit definitions for the 5 control/status registers
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*/
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#define ATTN_TARGET 0x0F
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#define ATTN_OPCODE 0xF0
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#define OP_IMMED 0x10
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#define AHB_TARG_RESET 0x80
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#define OP_START_ECB 0x40
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#define OP_ABORT_ECB 0x50
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#define G2CNTRL_SET_HOST_READY 0x20
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#define G2CNTRL_CLEAR_EISA_INT 0x40
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#define G2CNTRL_HARD_RESET 0x80
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#define G2INTST_TARGET 0x0F
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#define G2INTST_INT_STAT 0xF0
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#define AHB_ECB_OK 0x10
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#define AHB_ECB_RECOVERED 0x50
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#define AHB_HW_ERR 0x70
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#define AHB_IMMED_OK 0xA0
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#define AHB_ECB_ERR 0xC0
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#define AHB_ASN 0xD0 /* for target mode */
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#define AHB_IMMED_ERR 0xE0
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#define G2STAT_BUSY 0x01
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#define G2STAT_INT_PEND 0x02
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#define G2STAT_MBOX_EMPTY 0x04
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#define G2STAT2_HOST_READY 0x01
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struct ahb_dma_seg {
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physaddr seg_addr;
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physlen seg_len;
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};
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struct ahb_ecb_status {
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u_short status;
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#define ST_DON 0x0001
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#define ST_DU 0x0002
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#define ST_QF 0x0008
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#define ST_SC 0x0010
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#define ST_DO 0x0020
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#define ST_CH 0x0040
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#define ST_INT 0x0080
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#define ST_ASA 0x0100
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#define ST_SNS 0x0200
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#define ST_INI 0x0800
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#define ST_ME 0x1000
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#define ST_ECA 0x4000
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u_char host_stat;
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#define HS_OK 0x00
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#define HS_CMD_ABORTED_HOST 0x04
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#define HS_CMD_ABORTED_ADAPTER 0x05
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#define HS_TIMED_OUT 0x11
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#define HS_HARDWARE_ERR 0x20
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#define HS_SCSI_RESET_ADAPTER 0x22
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#define HS_SCSI_RESET_INCOMING 0x23
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u_char target_stat;
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u_long resid_count;
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u_long resid_addr;
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u_short addit_status;
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u_char sense_len;
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u_char unused[9];
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u_char cdb[6];
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};
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struct ahb_ecb {
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u_char opcode;
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#define ECB_SCSI_OP 0x01
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u_char:4;
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u_char options:3;
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u_char:1;
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short opt1;
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#define ECB_CNE 0x0001
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#define ECB_DI 0x0080
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#define ECB_SES 0x0400
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#define ECB_S_G 0x1000
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#define ECB_DSB 0x4000
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#define ECB_ARS 0x8000
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short opt2;
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#define ECB_LUN 0x0007
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#define ECB_TAG 0x0008
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#define ECB_TT 0x0030
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#define ECB_ND 0x0040
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#define ECB_DAT 0x0100
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#define ECB_DIR 0x0200
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#define ECB_ST 0x0400
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#define ECB_CHK 0x0800
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#define ECB_REC 0x4000
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#define ECB_NRB 0x8000
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u_short unused1;
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physaddr data_addr;
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physlen data_length;
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physaddr status;
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physaddr link_addr;
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short unused2;
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short unused3;
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physaddr sense_ptr;
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u_char req_sense_length;
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u_char scsi_cmd_length;
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short cksum;
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struct scsi_generic scsi_cmd;
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/*-----------------end of hardware supported fields----------------*/
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TAILQ_ENTRY(ahb_ecb) chain;
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struct ahb_ecb *nexthash;
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long hashkey;
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struct scsi_xfer *xs; /* the scsi_xfer for this cmd */
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int flags;
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#define ECB_FREE 0
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#define ECB_ACTIVE 1
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#define ECB_ABORTED 2
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#define ECB_IMMED 4
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#define ECB_IMMED_FAIL 8
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struct ahb_dma_seg ahb_dma[AHB_NSEG];
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struct ahb_ecb_status ecb_status;
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struct scsi_sense_data ecb_sense;
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};
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struct ahb_softc {
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struct device sc_dev;
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bus_chipset_tag_t sc_bc;
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eisa_chipset_tag_t sc_ec;
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bus_io_handle_t sc_ioh;
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int sc_irq;
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void *sc_ih;
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struct ahb_ecb *immed_ecb; /* an outstanding immediete command */
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struct ahb_ecb *ecbhash[ECB_HASH_SIZE];
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TAILQ_HEAD(, ahb_ecb) free_ecb;
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int numecbs;
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int ahb_scsi_dev; /* our scsi id */
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struct scsi_link sc_link;
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};
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void ahb_send_mbox __P((struct ahb_softc *, int, struct ahb_ecb *));
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int ahb_poll __P((struct ahb_softc *, struct scsi_xfer *, int));
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void ahb_send_immed __P((struct ahb_softc *, int, u_long));
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int ahbintr __P((void *));
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void ahb_done __P((struct ahb_softc *, struct ahb_ecb *));
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void ahb_free_ecb __P((struct ahb_softc *, struct ahb_ecb *, int));
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struct ahb_ecb *ahb_get_ecb __P((struct ahb_softc *, int));
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struct ahb_ecb *ahb_ecb_phys_kv __P((struct ahb_softc *, physaddr));
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int ahb_find __P((bus_chipset_tag_t, bus_io_handle_t, struct ahb_softc *));
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void ahb_init __P((struct ahb_softc *));
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void ahbminphys __P((struct buf *));
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int ahb_scsi_cmd __P((struct scsi_xfer *));
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void ahb_timeout __P((void *));
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void ahb_print_ecb __P((struct ahb_ecb *));
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void ahb_print_active_ecb __P((struct ahb_softc *));
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#define MAX_SLOTS 15
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static ahb_slot = 0; /* slot last board was found in */
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int ahb_debug = 0;
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#define AHB_SHOWECBS 0x01
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#define AHB_SHOWINTS 0x02
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#define AHB_SHOWCMDS 0x04
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#define AHB_SHOWMISC 0x08
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struct scsi_adapter ahb_switch = {
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ahb_scsi_cmd,
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ahbminphys,
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0,
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0,
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};
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/* the below structure is so we have a default dev struct for our link struct */
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struct scsi_device ahb_dev = {
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NULL, /* Use default error handler */
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NULL, /* have a queue, served by this */
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NULL, /* have no async handler */
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NULL, /* Use default 'done' routine */
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};
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int ahbmatch __P((struct device *, void *, void *));
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void ahbattach __P((struct device *, struct device *, void *));
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struct cfattach ahb_ca = {
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sizeof(struct ahb_softc), ahbmatch, ahbattach
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};
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struct cfdriver ahb_cd = {
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NULL, "ahb", DV_DULL
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};
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/*
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* Function to send a command out through a mailbox
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*/
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void
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ahb_send_mbox(sc, opcode, ecb)
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struct ahb_softc *sc;
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int opcode;
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struct ahb_ecb *ecb;
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{
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bus_chipset_tag_t bc = sc->sc_bc;
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bus_io_handle_t ioh = sc->sc_ioh;
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int wait = 300; /* 1ms should be enough */
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while (--wait) {
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if ((bus_io_read_1(bc, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
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== (G2STAT_MBOX_EMPTY))
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break;
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delay(10);
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}
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if (!wait) {
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printf("%s: board not responding\n", sc->sc_dev.dv_xname);
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Debugger();
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}
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bus_io_write_4(bc, ioh, MBOXOUT0, KVTOPHYS(ecb)); /* don't know this will work */
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bus_io_write_1(bc, ioh, ATTN, opcode | ecb->xs->sc_link->target);
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}
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/*
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* Function to poll for command completion when in poll mode
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*/
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int
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ahb_poll(sc, xs, count)
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struct ahb_softc *sc;
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struct scsi_xfer *xs;
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int count;
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{ /* in msec */
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bus_chipset_tag_t bc = sc->sc_bc;
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bus_io_handle_t ioh = sc->sc_ioh;
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while (count) {
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/*
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* If we had interrupts enabled, would we
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* have got an interrupt?
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*/
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if (bus_io_read_1(bc, ioh, G2STAT) & G2STAT_INT_PEND)
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ahbintr(sc);
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if (xs->flags & ITSDONE)
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return 0;
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delay(1000);
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count--;
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}
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return 1;
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}
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/*
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* Function to send an immediate type command to the adapter
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*/
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void
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ahb_send_immed(sc, target, cmd)
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struct ahb_softc *sc;
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int target;
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u_long cmd;
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{
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bus_chipset_tag_t bc = sc->sc_bc;
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bus_io_handle_t ioh = sc->sc_ioh;
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int wait = 100; /* 1 ms enough? */
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while (--wait) {
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if ((bus_io_read_1(bc, ioh, G2STAT) & (G2STAT_BUSY | G2STAT_MBOX_EMPTY))
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== (G2STAT_MBOX_EMPTY))
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break;
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delay(10);
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}
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if (!wait) {
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printf("%s: board not responding\n", sc->sc_dev.dv_xname);
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Debugger();
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}
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bus_io_write_4(bc, ioh, MBOXOUT0, cmd); /* don't know this will work */
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bus_io_write_1(bc, ioh, G2CNTRL, G2CNTRL_SET_HOST_READY);
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bus_io_write_1(bc, ioh, ATTN, OP_IMMED | target);
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}
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/*
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* Check the slots looking for a board we recognise
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* If we find one, note it's address (slot) and call
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* the actual probe routine to check it out.
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*/
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int
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ahbmatch(parent, match, aux)
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struct device *parent;
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void *match, *aux;
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{
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struct eisa_attach_args *ea = aux;
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bus_chipset_tag_t bc = ea->ea_bc;
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bus_io_handle_t ioh;
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int rv;
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/* must match one of our known ID strings */
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if (strcmp(ea->ea_idstring, "ADP0000") &&
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strcmp(ea->ea_idstring, "ADP0001") &&
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strcmp(ea->ea_idstring, "ADP0002") &&
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strcmp(ea->ea_idstring, "ADP0400"))
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return (0);
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if (bus_io_map(bc, EISA_SLOT_ADDR(ea->ea_slot), EISA_SLOT_SIZE, &ioh))
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return (0);
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#ifdef notyet
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/* This won't compile as-is, anyway. */
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bus_io_write_1(bc, ioh, EISA_CONTROL, EISA_ENABLE | EISA_RESET);
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delay(10);
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bus_io_write_1(bc, ioh, EISA_CONTROL, EISA_ENABLE);
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/* Wait for reset? */
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delay(1000);
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#endif
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rv = !ahb_find(bc, ioh, NULL);
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bus_io_unmap(ea->ea_bc, ioh, EISA_SLOT_SIZE);
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return (rv);
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}
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ahbprint()
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{
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}
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/*
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* Attach all the sub-devices we can find
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*/
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void
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ahbattach(parent, self, aux)
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struct device *parent, *self;
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void *aux;
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{
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struct eisa_attach_args *ea = aux;
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struct ahb_softc *sc = (void *)self;
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bus_chipset_tag_t bc = ea->ea_bc;
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bus_io_handle_t ioh;
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eisa_chipset_tag_t ec = ea->ea_ec;
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eisa_intr_handle_t ih;
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const char *model, *intrstr;
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sc->sc_bc = bc;
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sc->sc_ec = ec;
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if (bus_io_map(bc, EISA_SLOT_ADDR(ea->ea_slot), EISA_SLOT_SIZE, &ioh))
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panic("ahbattach: could not map I/O addresses");
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sc->sc_ioh = ioh;
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if (ahb_find(bc, ioh, sc))
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panic("ahbattach: ahb_find failed!");
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|
|
ahb_init(sc);
|
|
TAILQ_INIT(&sc->free_ecb);
|
|
|
|
/*
|
|
* fill in the prototype scsi_link.
|
|
*/
|
|
sc->sc_link.adapter_softc = sc;
|
|
sc->sc_link.adapter_target = sc->ahb_scsi_dev;
|
|
sc->sc_link.adapter = &ahb_switch;
|
|
sc->sc_link.device = &ahb_dev;
|
|
sc->sc_link.openings = 2;
|
|
|
|
if (!strcmp(ea->ea_idstring, "ADP0000"))
|
|
model = EISA_PRODUCT_ADP0000;
|
|
else if (!strcmp(ea->ea_idstring, "ADP0001"))
|
|
model = EISA_PRODUCT_ADP0001;
|
|
else if (!strcmp(ea->ea_idstring, "ADP0002"))
|
|
model = EISA_PRODUCT_ADP0002;
|
|
else if (!strcmp(ea->ea_idstring, "ADP0400"))
|
|
model = EISA_PRODUCT_ADP0400;
|
|
else
|
|
model = "unknown model!";
|
|
printf(": %s\n", model);
|
|
|
|
if (eisa_intr_map(ec, sc->sc_irq, &ih)) {
|
|
printf("%s: couldn't map interrupt (%d)\n",
|
|
sc->sc_dev.dv_xname, sc->sc_irq);
|
|
return;
|
|
}
|
|
intrstr = eisa_intr_string(ec, ih);
|
|
sc->sc_ih = eisa_intr_establish(ec, ih, IST_LEVEL, IPL_BIO,
|
|
ahbintr, sc);
|
|
if (sc->sc_ih == NULL) {
|
|
printf("%s: couldn't establish interrupt",
|
|
sc->sc_dev.dv_xname);
|
|
if (intrstr != NULL)
|
|
printf(" at %s", intrstr);
|
|
printf("\n");
|
|
return;
|
|
}
|
|
if (intrstr != NULL)
|
|
printf("%s: interrupting at %s\n", sc->sc_dev.dv_xname,
|
|
intrstr);
|
|
|
|
/*
|
|
* ask the adapter what subunits are present
|
|
*/
|
|
config_found(self, &sc->sc_link, ahbprint);
|
|
}
|
|
|
|
/*
|
|
* Catch an interrupt from the adaptor
|
|
*/
|
|
int
|
|
ahbintr(arg)
|
|
void *arg;
|
|
{
|
|
struct ahb_softc *sc = arg;
|
|
bus_chipset_tag_t bc = sc->sc_bc;
|
|
bus_io_handle_t ioh = sc->sc_ioh;
|
|
struct ahb_ecb *ecb;
|
|
u_char ahbstat;
|
|
u_long mboxval;
|
|
|
|
#ifdef AHBDEBUG
|
|
printf("%s: ahbintr ", sc->sc_dev.dv_xname);
|
|
#endif /* AHBDEBUG */
|
|
|
|
if ((bus_io_read_1(bc, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
|
|
return 0;
|
|
|
|
for (;;) {
|
|
/*
|
|
* First get all the information and then
|
|
* acknowlege the interrupt
|
|
*/
|
|
ahbstat = bus_io_read_1(bc, ioh, G2INTST);
|
|
mboxval = bus_io_read_4(bc, ioh, MBOXIN0);
|
|
bus_io_write_1(bc, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
|
|
|
|
#ifdef AHBDEBUG
|
|
printf("status = 0x%x ", ahbstat);
|
|
#endif /*AHBDEBUG */
|
|
|
|
/*
|
|
* Process the completed operation
|
|
*/
|
|
switch (ahbstat & G2INTST_INT_STAT) {
|
|
case AHB_ECB_OK:
|
|
case AHB_ECB_RECOVERED:
|
|
case AHB_ECB_ERR:
|
|
ecb = ahb_ecb_phys_kv(sc, mboxval);
|
|
if (!ecb) {
|
|
printf("%s: BAD ECB RETURNED!\n",
|
|
sc->sc_dev.dv_xname);
|
|
continue; /* whatever it was, it'll timeout */
|
|
}
|
|
break;
|
|
|
|
case AHB_IMMED_ERR:
|
|
ecb->flags |= ECB_IMMED_FAIL;
|
|
case AHB_IMMED_OK:
|
|
ecb = sc->immed_ecb;
|
|
sc->immed_ecb = 0;
|
|
break;
|
|
|
|
default:
|
|
printf("%s: unexpected interrupt %x\n",
|
|
sc->sc_dev.dv_xname, ahbstat);
|
|
ecb = 0;
|
|
break;
|
|
}
|
|
if (ecb) {
|
|
#ifdef AHBDEBUG
|
|
if (ahb_debug & AHB_SHOWCMDS)
|
|
show_scsi_cmd(ecb->xs);
|
|
if ((ahb_debug & AHB_SHOWECBS) && ecb)
|
|
printf("<int ecb(%x)>", ecb);
|
|
#endif /*AHBDEBUG */
|
|
untimeout(ahb_timeout, ecb);
|
|
ahb_done(sc, ecb);
|
|
}
|
|
|
|
if ((bus_io_read_1(bc, ioh, G2STAT) & G2STAT_INT_PEND) == 0)
|
|
return 1;
|
|
}
|
|
}
|
|
|
|
/*
|
|
* We have a ecb which has been processed by the adaptor, now we look to see
|
|
* how the operation went.
|
|
*/
|
|
void
|
|
ahb_done(sc, ecb)
|
|
struct ahb_softc *sc;
|
|
struct ahb_ecb *ecb;
|
|
{
|
|
struct ahb_ecb_status *stat = &ecb->ecb_status;
|
|
struct scsi_sense_data *s1, *s2;
|
|
struct scsi_xfer *xs = ecb->xs;
|
|
|
|
SC_DEBUG(xs->sc_link, SDEV_DB2, ("ahb_done\n"));
|
|
/*
|
|
* Otherwise, put the results of the operation
|
|
* into the xfer and call whoever started it
|
|
*/
|
|
if ((xs->flags & INUSE) == 0) {
|
|
printf("%s: exiting but not in use!\n", sc->sc_dev.dv_xname);
|
|
Debugger();
|
|
}
|
|
if (ecb->flags & ECB_IMMED) {
|
|
if (ecb->flags & ECB_IMMED_FAIL)
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
goto done;
|
|
}
|
|
if (xs->error == XS_NOERROR) {
|
|
if (stat->host_stat != HS_OK) {
|
|
switch (stat->host_stat) {
|
|
case HS_SCSI_RESET_ADAPTER:
|
|
break;
|
|
case HS_SCSI_RESET_INCOMING:
|
|
break;
|
|
case HS_CMD_ABORTED_HOST:
|
|
case HS_CMD_ABORTED_ADAPTER:
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
break;
|
|
case HS_TIMED_OUT: /* No response */
|
|
xs->error = XS_SELTIMEOUT;
|
|
break;
|
|
default: /* Other scsi protocol messes */
|
|
printf("%s: host_stat %x\n",
|
|
sc->sc_dev.dv_xname, stat->host_stat);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
}
|
|
} else if (stat->target_stat != SCSI_OK) {
|
|
switch (stat->target_stat) {
|
|
case SCSI_CHECK:
|
|
s1 = &ecb->ecb_sense;
|
|
s2 = &xs->sense;
|
|
*s2 = *s1;
|
|
xs->error = XS_SENSE;
|
|
break;
|
|
case SCSI_BUSY:
|
|
xs->error = XS_BUSY;
|
|
break;
|
|
default:
|
|
printf("%s: target_stat %x\n",
|
|
sc->sc_dev.dv_xname, stat->target_stat);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
}
|
|
} else
|
|
xs->resid = 0;
|
|
}
|
|
done:
|
|
xs->flags |= ITSDONE;
|
|
ahb_free_ecb(sc, ecb, xs->flags);
|
|
scsi_done(xs);
|
|
}
|
|
|
|
/*
|
|
* A ecb (and hence a mbx-out is put onto the
|
|
* free list.
|
|
*/
|
|
void
|
|
ahb_free_ecb(sc, ecb, flags)
|
|
struct ahb_softc *sc;
|
|
struct ahb_ecb *ecb;
|
|
int flags;
|
|
{
|
|
int s;
|
|
|
|
s = splbio();
|
|
|
|
ecb->flags = ECB_FREE;
|
|
TAILQ_INSERT_HEAD(&sc->free_ecb, ecb, chain);
|
|
|
|
/*
|
|
* If there were none, wake anybody waiting for one to come free,
|
|
* starting with queued entries.
|
|
*/
|
|
if (ecb->chain.tqe_next == 0)
|
|
wakeup(&sc->free_ecb);
|
|
|
|
splx(s);
|
|
}
|
|
|
|
static inline void
|
|
ahb_init_ecb(sc, ecb)
|
|
struct ahb_softc *sc;
|
|
struct ahb_ecb *ecb;
|
|
{
|
|
int hashnum;
|
|
|
|
bzero(ecb, sizeof(struct ahb_ecb));
|
|
/*
|
|
* put in the phystokv hash table
|
|
* Never gets taken out.
|
|
*/
|
|
ecb->hashkey = KVTOPHYS(ecb);
|
|
hashnum = ECB_HASH(ecb->hashkey);
|
|
ecb->nexthash = sc->ecbhash[hashnum];
|
|
sc->ecbhash[hashnum] = ecb;
|
|
}
|
|
|
|
static inline void
|
|
ahb_reset_ecb(sc, ecb)
|
|
struct ahb_softc *sc;
|
|
struct ahb_ecb *ecb;
|
|
{
|
|
|
|
}
|
|
|
|
/*
|
|
* Get a free ecb
|
|
*
|
|
* If there are none, see if we can allocate a new one. If so, put it in the
|
|
* hash table too otherwise either return an error or sleep.
|
|
*/
|
|
struct ahb_ecb *
|
|
ahb_get_ecb(sc, flags)
|
|
struct ahb_softc *sc;
|
|
int flags;
|
|
{
|
|
struct ahb_ecb *ecb;
|
|
int s;
|
|
|
|
s = splbio();
|
|
|
|
/*
|
|
* If we can and have to, sleep waiting for one to come free
|
|
* but only if we can't allocate a new one.
|
|
*/
|
|
for (;;) {
|
|
ecb = sc->free_ecb.tqh_first;
|
|
if (ecb) {
|
|
TAILQ_REMOVE(&sc->free_ecb, ecb, chain);
|
|
break;
|
|
}
|
|
if (sc->numecbs < AHB_ECB_MAX) {
|
|
if (ecb = (struct ahb_ecb *) malloc(sizeof(struct ahb_ecb),
|
|
M_TEMP, M_NOWAIT)) {
|
|
ahb_init_ecb(sc, ecb);
|
|
sc->numecbs++;
|
|
} else {
|
|
printf("%s: can't malloc ecb\n",
|
|
sc->sc_dev.dv_xname);
|
|
goto out;
|
|
}
|
|
break;
|
|
}
|
|
if ((flags & SCSI_NOSLEEP) != 0)
|
|
goto out;
|
|
tsleep(&sc->free_ecb, PRIBIO, "ahbecb", 0);
|
|
}
|
|
|
|
ahb_reset_ecb(sc, ecb);
|
|
ecb->flags = ECB_ACTIVE;
|
|
|
|
out:
|
|
splx(s);
|
|
return ecb;
|
|
}
|
|
|
|
/*
|
|
* given a physical address, find the ecb that it corresponds to.
|
|
*/
|
|
struct ahb_ecb *
|
|
ahb_ecb_phys_kv(sc, ecb_phys)
|
|
struct ahb_softc *sc;
|
|
physaddr ecb_phys;
|
|
{
|
|
int hashnum = ECB_HASH(ecb_phys);
|
|
struct ahb_ecb *ecb = sc->ecbhash[hashnum];
|
|
|
|
while (ecb) {
|
|
if (ecb->hashkey == ecb_phys)
|
|
break;
|
|
ecb = ecb->nexthash;
|
|
}
|
|
return ecb;
|
|
}
|
|
|
|
/*
|
|
* Start the board, ready for normal operation
|
|
*/
|
|
int
|
|
ahb_find(bc, ioh, sc)
|
|
bus_chipset_tag_t bc;
|
|
bus_io_handle_t ioh;
|
|
struct ahb_softc *sc;
|
|
{
|
|
u_char intdef;
|
|
int i, irq, busid;
|
|
int wait = 1000; /* 1 sec enough? */
|
|
|
|
bus_io_write_1(bc, ioh, PORTADDR, PORTADDR_ENHANCED);
|
|
|
|
#define NO_NO 1
|
|
#ifdef NO_NO
|
|
/*
|
|
* reset board, If it doesn't respond, assume
|
|
* that it's not there.. good for the probe
|
|
*/
|
|
bus_io_write_1(bc, ioh, G2CNTRL, G2CNTRL_HARD_RESET);
|
|
delay(1000);
|
|
bus_io_write_1(bc, ioh, G2CNTRL, 0);
|
|
delay(10000);
|
|
while (--wait) {
|
|
if ((bus_io_read_1(bc, ioh, G2STAT) & G2STAT_BUSY) == 0)
|
|
break;
|
|
delay(1000);
|
|
}
|
|
if (!wait) {
|
|
#ifdef AHBDEBUG
|
|
if (ahb_debug & AHB_SHOWMISC)
|
|
printf("ahb_find: No answer from aha1742 board\n");
|
|
#endif /*AHBDEBUG */
|
|
return ENXIO;
|
|
}
|
|
i = bus_io_read_1(bc, ioh, MBOXIN0);
|
|
if (i) {
|
|
printf("self test failed, val = 0x%x\n", i);
|
|
return EIO;
|
|
}
|
|
|
|
/* Set it again, just to be sure. */
|
|
bus_io_write_1(bc, ioh, PORTADDR, PORTADDR_ENHANCED);
|
|
#endif
|
|
|
|
while (bus_io_read_1(bc, ioh, G2STAT) & G2STAT_INT_PEND) {
|
|
printf(".");
|
|
bus_io_write_1(bc, ioh, G2CNTRL, G2CNTRL_CLEAR_EISA_INT);
|
|
delay(10000);
|
|
}
|
|
|
|
intdef = bus_io_read_1(bc, ioh, INTDEF);
|
|
switch (intdef & 0x07) {
|
|
case INT9:
|
|
irq = 9;
|
|
break;
|
|
case INT10:
|
|
irq = 10;
|
|
break;
|
|
case INT11:
|
|
irq = 11;
|
|
break;
|
|
case INT12:
|
|
irq = 12;
|
|
break;
|
|
case INT14:
|
|
irq = 14;
|
|
break;
|
|
case INT15:
|
|
irq = 15;
|
|
break;
|
|
default:
|
|
printf("illegal int setting %x\n", intdef);
|
|
return EIO;
|
|
}
|
|
|
|
bus_io_write_1(bc, ioh, INTDEF, (intdef | INTEN)); /* make sure we can interrupt */
|
|
|
|
/* who are we on the scsi bus? */
|
|
busid = (bus_io_read_1(bc, ioh, SCSIDEF) & HSCSIID);
|
|
|
|
/* if we want to fill in softc, do so now */
|
|
if (sc != NULL) {
|
|
sc->sc_irq = irq;
|
|
sc->ahb_scsi_dev = busid;
|
|
}
|
|
|
|
/*
|
|
* Note that we are going and return (to probe)
|
|
*/
|
|
return 0;
|
|
}
|
|
|
|
void
|
|
ahb_init(sc)
|
|
struct ahb_softc *sc;
|
|
{
|
|
|
|
}
|
|
|
|
void
|
|
ahbminphys(bp)
|
|
struct buf *bp;
|
|
{
|
|
|
|
if (bp->b_bcount > ((AHB_NSEG - 1) << PGSHIFT))
|
|
bp->b_bcount = ((AHB_NSEG - 1) << PGSHIFT);
|
|
minphys(bp);
|
|
}
|
|
|
|
/*
|
|
* start a scsi operation given the command and the data address. Also needs
|
|
* the unit, target and lu.
|
|
*/
|
|
int
|
|
ahb_scsi_cmd(xs)
|
|
struct scsi_xfer *xs;
|
|
{
|
|
struct scsi_link *sc_link = xs->sc_link;
|
|
struct ahb_softc *sc = sc_link->adapter_softc;
|
|
struct ahb_ecb *ecb;
|
|
struct ahb_dma_seg *sg;
|
|
int seg; /* scatter gather seg being worked on */
|
|
u_long thiskv, thisphys, nextphys;
|
|
int bytes_this_seg, bytes_this_page, datalen, flags;
|
|
struct iovec *iovp;
|
|
int s;
|
|
|
|
SC_DEBUG(sc_link, SDEV_DB2, ("ahb_scsi_cmd\n"));
|
|
/*
|
|
* get a ecb (mbox-out) to use. If the transfer
|
|
* is from a buf (possibly from interrupt time)
|
|
* then we can't allow it to sleep
|
|
*/
|
|
flags = xs->flags;
|
|
if ((flags & (ITSDONE|INUSE)) != INUSE) {
|
|
printf("%s: done or not in use?\n", sc->sc_dev.dv_xname);
|
|
xs->flags &= ~ITSDONE;
|
|
xs->flags |= INUSE;
|
|
}
|
|
if ((ecb = ahb_get_ecb(sc, flags)) == NULL) {
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
return TRY_AGAIN_LATER;
|
|
}
|
|
ecb->xs = xs;
|
|
|
|
/*
|
|
* If it's a reset, we need to do an 'immediate'
|
|
* command, and store its ecb for later
|
|
* if there is already an immediate waiting,
|
|
* then WE must wait
|
|
*/
|
|
if (flags & SCSI_RESET) {
|
|
ecb->flags |= ECB_IMMED;
|
|
if (sc->immed_ecb)
|
|
return TRY_AGAIN_LATER;
|
|
sc->immed_ecb = ecb;
|
|
|
|
s = splbio();
|
|
|
|
ahb_send_immed(sc, sc_link->target, AHB_TARG_RESET);
|
|
|
|
if ((flags & SCSI_POLL) == 0) {
|
|
timeout(ahb_timeout, ecb, (xs->timeout * hz) / 1000);
|
|
splx(s);
|
|
return SUCCESSFULLY_QUEUED;
|
|
}
|
|
|
|
splx(s);
|
|
|
|
/*
|
|
* If we can't use interrupts, poll on completion
|
|
*/
|
|
if (ahb_poll(sc, xs, xs->timeout))
|
|
ahb_timeout(ecb);
|
|
return COMPLETE;
|
|
}
|
|
|
|
/*
|
|
* Put all the arguments for the xfer in the ecb
|
|
*/
|
|
ecb->opcode = ECB_SCSI_OP;
|
|
ecb->opt1 = ECB_SES | ECB_DSB | ECB_ARS;
|
|
if (xs->datalen)
|
|
ecb->opt1 |= ECB_S_G;
|
|
ecb->opt2 = sc_link->lun | ECB_NRB;
|
|
ecb->scsi_cmd_length = xs->cmdlen;
|
|
ecb->sense_ptr = KVTOPHYS(&ecb->ecb_sense);
|
|
ecb->req_sense_length = sizeof(ecb->ecb_sense);
|
|
ecb->status = KVTOPHYS(&ecb->ecb_status);
|
|
ecb->ecb_status.host_stat = 0x00;
|
|
ecb->ecb_status.target_stat = 0x00;
|
|
|
|
if (xs->datalen && (flags & SCSI_RESET) == 0) {
|
|
ecb->data_addr = KVTOPHYS(ecb->ahb_dma);
|
|
sg = ecb->ahb_dma;
|
|
seg = 0;
|
|
#ifdef TFS
|
|
if (flags & SCSI_DATA_UIO) {
|
|
iovp = ((struct uio *) xs->data)->uio_iov;
|
|
datalen = ((struct uio *) xs->data)->uio_iovcnt;
|
|
xs->datalen = 0;
|
|
while (datalen && seg < AHB_NSEG) {
|
|
sg->seg_addr = (physaddr)iovp->iov_base;
|
|
sg->seg_len = iovp->iov_len;
|
|
xs->datalen += iovp->iov_len;
|
|
SC_DEBUGN(sc_link, SDEV_DB4, ("(0x%x@0x%x)",
|
|
iovp->iov_len, iovp->iov_base));
|
|
sg++;
|
|
iovp++;
|
|
seg++;
|
|
datalen--;
|
|
}
|
|
}
|
|
else
|
|
#endif /*TFS */
|
|
{
|
|
/*
|
|
* Set up the scatter gather block
|
|
*/
|
|
SC_DEBUG(sc_link, SDEV_DB4,
|
|
("%d @0x%x:- ", xs->datalen, xs->data));
|
|
datalen = xs->datalen;
|
|
thiskv = (long) xs->data;
|
|
thisphys = KVTOPHYS(thiskv);
|
|
|
|
while (datalen && seg < AHB_NSEG) {
|
|
bytes_this_seg = 0;
|
|
|
|
/* put in the base address */
|
|
sg->seg_addr = thisphys;
|
|
|
|
SC_DEBUGN(sc_link, SDEV_DB4, ("0x%x", thisphys));
|
|
|
|
/* do it at least once */
|
|
nextphys = thisphys;
|
|
while (datalen && thisphys == nextphys) {
|
|
/*
|
|
* This page is contiguous (physically)
|
|
* with the the last, just extend the
|
|
* length
|
|
*/
|
|
/* how far to the end of the page */
|
|
nextphys = (thisphys & ~PGOFSET) + NBPG;
|
|
bytes_this_page = nextphys - thisphys;
|
|
/**** or the data ****/
|
|
bytes_this_page = min(bytes_this_page,
|
|
datalen);
|
|
bytes_this_seg += bytes_this_page;
|
|
datalen -= bytes_this_page;
|
|
|
|
/* get more ready for the next page */
|
|
thiskv = (thiskv & ~PGOFSET) + NBPG;
|
|
if (datalen)
|
|
thisphys = KVTOPHYS(thiskv);
|
|
}
|
|
/*
|
|
* next page isn't contiguous, finish the seg
|
|
*/
|
|
SC_DEBUGN(sc_link, SDEV_DB4,
|
|
("(0x%x)", bytes_this_seg));
|
|
sg->seg_len = bytes_this_seg;
|
|
sg++;
|
|
seg++;
|
|
}
|
|
}
|
|
/*end of iov/kv decision */
|
|
ecb->data_length = seg * sizeof(struct ahb_dma_seg);
|
|
SC_DEBUGN(sc_link, SDEV_DB4, ("\n"));
|
|
if (datalen) {
|
|
/*
|
|
* there's still data, must have run out of segs!
|
|
*/
|
|
printf("%s: ahb_scsi_cmd, more than %d dma segs\n",
|
|
sc->sc_dev.dv_xname, AHB_NSEG);
|
|
xs->error = XS_DRIVER_STUFFUP;
|
|
ahb_free_ecb(sc, ecb, flags);
|
|
return COMPLETE;
|
|
}
|
|
} else { /* No data xfer, use non S/G values */
|
|
ecb->data_addr = (physaddr)0;
|
|
ecb->data_length = 0;
|
|
}
|
|
ecb->link_addr = (physaddr)0;
|
|
|
|
/*
|
|
* Put the scsi command in the ecb and start it
|
|
*/
|
|
if ((flags & SCSI_RESET) == 0)
|
|
bcopy(xs->cmd, &ecb->scsi_cmd, ecb->scsi_cmd_length);
|
|
|
|
s = splbio();
|
|
|
|
ahb_send_mbox(sc, OP_START_ECB, ecb);
|
|
|
|
/*
|
|
* Usually return SUCCESSFULLY QUEUED
|
|
*/
|
|
if ((flags & SCSI_POLL) == 0) {
|
|
timeout(ahb_timeout, ecb, (xs->timeout * hz) / 1000);
|
|
splx(s);
|
|
return SUCCESSFULLY_QUEUED;
|
|
}
|
|
|
|
splx(s);
|
|
|
|
/*
|
|
* If we can't use interrupts, poll on completion
|
|
*/
|
|
if (ahb_poll(sc, xs, xs->timeout)) {
|
|
ahb_timeout(ecb);
|
|
if (ahb_poll(sc, xs, 2000))
|
|
ahb_timeout(ecb);
|
|
}
|
|
return COMPLETE;
|
|
}
|
|
|
|
void
|
|
ahb_timeout(arg)
|
|
void *arg;
|
|
{
|
|
struct ahb_ecb *ecb = arg;
|
|
struct scsi_xfer *xs = ecb->xs;
|
|
struct scsi_link *sc_link = xs->sc_link;
|
|
struct ahb_softc *sc = sc_link->adapter_softc;
|
|
int s;
|
|
|
|
sc_print_addr(sc_link);
|
|
printf("timed out");
|
|
|
|
s = splbio();
|
|
|
|
if (ecb->flags & ECB_IMMED) {
|
|
printf("\n");
|
|
ecb->xs->retries = 0; /* I MEAN IT ! */
|
|
ecb->flags |= ECB_IMMED_FAIL;
|
|
ahb_done(sc, ecb);
|
|
splx(s);
|
|
return;
|
|
}
|
|
|
|
/*
|
|
* If it has been through before, then
|
|
* a previous abort has failed, don't
|
|
* try abort again
|
|
*/
|
|
if (ecb->flags == ECB_ABORTED) {
|
|
/* abort timed out */
|
|
printf(" AGAIN\n");
|
|
ecb->xs->retries = 0; /* I MEAN IT ! */
|
|
ahb_done(sc, ecb);
|
|
} else {
|
|
/* abort the operation that has timed out */
|
|
printf("\n");
|
|
ecb->xs->error = XS_TIMEOUT;
|
|
ecb->flags = ECB_ABORTED;
|
|
ahb_send_mbox(sc, OP_ABORT_ECB, ecb);
|
|
/* 2 secs for the abort */
|
|
if ((xs->flags & SCSI_POLL) == 0)
|
|
timeout(ahb_timeout, ecb, 2 * hz);
|
|
}
|
|
|
|
splx(s);
|
|
}
|
|
|
|
#ifdef AHBDEBUG
|
|
void
|
|
ahb_print_ecb(ecb)
|
|
struct ahb_ecb *ecb;
|
|
{
|
|
printf("ecb:%x op:%x cmdlen:%d senlen:%d\n",
|
|
ecb, ecb->opcode, ecb->cdblen, ecb->senselen);
|
|
printf(" datlen:%d hstat:%x tstat:%x flags:%x\n",
|
|
ecb->datalen, ecb->ecb_status.host_stat,
|
|
ecb->ecb_status.target_stat, ecb->flags);
|
|
show_scsi_cmd(ecb->xs);
|
|
}
|
|
|
|
void
|
|
ahb_print_active_ecb(sc)
|
|
struct ahb_softc *sc;
|
|
{
|
|
struct ahb_ecb *ecb;
|
|
int i = 0;
|
|
|
|
while (i++ < ECB_HASH_SIZE) {
|
|
ecb = sc->ecb_hash_list[i];
|
|
while (ecb) {
|
|
if (ecb->flags != ECB_FREE)
|
|
ahb_print_ecb(ecb);
|
|
ecb = ecb->hash_list;
|
|
}
|
|
}
|
|
}
|
|
#endif /* AHBDEBUG */
|