374 lines
11 KiB
C
374 lines
11 KiB
C
/* $NetBSD: ifpga_pci.c,v 1.2 2002/01/30 03:59:41 thorpej Exp $ */
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/*
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* Copyright (c) 2001 ARM Ltd
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. The name of the company may not be used to endorse or promote
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* products derived from this software without specific prior written
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* permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*
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* Copyright (c) 1997,1998 Mark Brinicombe.
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* Copyright (c) 1997,1998 Causality Limited
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* All rights reserved.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions
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* are met:
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* 1. Redistributions of source code must retain the above copyright
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* notice, this list of conditions and the following disclaimer.
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* 2. Redistributions in binary form must reproduce the above copyright
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* notice, this list of conditions and the following disclaimer in the
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* documentation and/or other materials provided with the distribution.
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* 3. All advertising materials mentioning features or use of this software
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* must display the following acknowledgement:
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* This product includes software developed by Mark Brinicombe
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* for the NetBSD Project.
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* 4. The name of the company nor the name of the author may be used to
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* endorse or promote products derived from this software without specific
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* prior written permission.
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*
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* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
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* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
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* IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT,
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* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
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* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
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* SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
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* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
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* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
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* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
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* SUCH DAMAGE.
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*/
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#include <sys/param.h>
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#include <sys/systm.h>
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#include <sys/conf.h>
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#include <sys/malloc.h>
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#include <sys/device.h>
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#define _ARM32_BUS_DMA_PRIVATE
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#include <evbarm/integrator/int_bus_dma.h>
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#include <machine/intr.h>
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#include <evbarm/ifpga/irqhandler.h> /* XXX XXX XXX */
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#include <dev/pci/pcireg.h>
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#include <dev/pci/pcivar.h>
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#include <evbarm/ifpga/ifpgareg.h>
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#include <evbarm/ifpga/ifpgamem.h>
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#include <evbarm/ifpga/ifpga_pcivar.h>
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#include <evbarm/dev/v360reg.h>
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void ifpga_pci_attach_hook (struct device *, struct device *,
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struct pcibus_attach_args *);
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int ifpga_pci_bus_maxdevs (void *, int);
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pcitag_t ifpga_pci_make_tag (void *, int, int, int);
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void ifpga_pci_decompose_tag (void *, pcitag_t, int *, int *,
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int *);
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pcireg_t ifpga_pci_conf_read (void *, pcitag_t, int);
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void ifpga_pci_conf_write (void *, pcitag_t, int, pcireg_t);
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int ifpga_pci_intr_map (struct pci_attach_args *,
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pci_intr_handle_t *);
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const char *ifpga_pci_intr_string (void *, pci_intr_handle_t);
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const struct evcnt *ifpga_pci_intr_evcnt (void *, pci_intr_handle_t);
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void *ifpga_pci_intr_establish (void *, pci_intr_handle_t, int,
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int (*)(void *), void *);
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void ifpga_pci_intr_disestablish (void *, void *);
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struct arm32_pci_chipset ifpga_pci_chipset = {
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NULL, /* conf_v */
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ifpga_pci_attach_hook,
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ifpga_pci_bus_maxdevs,
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ifpga_pci_make_tag,
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ifpga_pci_decompose_tag,
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ifpga_pci_conf_read,
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ifpga_pci_conf_write,
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NULL, /* intr_v */
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ifpga_pci_intr_map,
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ifpga_pci_intr_string,
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ifpga_pci_intr_evcnt,
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ifpga_pci_intr_establish,
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ifpga_pci_intr_disestablish
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};
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/*
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* Use the integrator-specific bus_dma routines.
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*/
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struct arm32_bus_dma_tag ifpga_pci_bus_dma_tag = {
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0,
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0,
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_bus_dmamap_create,
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_bus_dmamap_destroy,
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integrator_bus_dmamap_load,
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integrator_bus_dmamap_load_mbuf,
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integrator_bus_dmamap_load_uio,
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_bus_dmamap_load_raw,
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_bus_dmamap_unload,
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_bus_dmamap_sync,
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integrator_bus_dmamem_alloc,
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integrator_bus_dmamem_free,
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integrator_bus_dmamem_map,
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_bus_dmamem_unmap,
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integrator_bus_dmamem_mmap,
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};
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/*
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* Currently we only support 12 devices as we select directly in the
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* type 0 config cycle
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* (See conf_{read,write} for more detail
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*/
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#define MAX_PCI_DEVICES 21
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/*static int
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pci_intr(void *arg)
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{
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printf("pci int %x\n", (int)arg);
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return 0;
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}*/
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void
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ifpga_pci_attach_hook(struct device *parent, struct device *self,
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struct pcibus_attach_args *pba)
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{
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#ifdef PCI_DEBUG
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printf("ifpga_pci_attach_hook()\n");
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#endif
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}
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int
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ifpga_pci_bus_maxdevs(void *pcv, int busno)
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{
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#ifdef PCI_DEBUG
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printf("ifpga_pci_bus_maxdevs(pcv=%p, busno=%d)\n", pcv, busno);
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#endif
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return MAX_PCI_DEVICES;
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}
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pcitag_t
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ifpga_pci_make_tag(void *pcv, int bus, int device, int function)
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{
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#ifdef PCI_DEBUG
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printf("ifpga_pci_make_tag(pcv=%p, bus=%d, device=%d, function=%d)\n",
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pcv, bus, device, function);
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#endif
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return (bus << 16) | (device << 11) | (function << 8);
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}
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void
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ifpga_pci_decompose_tag(void *pcv, pcitag_t tag, int *busp, int *devicep,
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int *functionp)
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{
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#ifdef PCI_DEBUG
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printf("ifpga_pci_decompose_tag(pcv=%p, tag=0x%08lx, bp=%p, dp=%p, "
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"fp=%p)\n", pcv, tag, busp, devicep, functionp);
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#endif
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if (busp != NULL)
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*busp = (tag >> 16) & 0xff;
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if (devicep != NULL)
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*devicep = (tag >> 11) & 0x1f;
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if (functionp != NULL)
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*functionp = (tag >> 8) & 0x7;
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}
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pcireg_t
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ifpga_pci_conf_read(void *pcv, pcitag_t tag, int reg)
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{
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pcireg_t data;
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struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv;
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int bus, device, function;
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u_int address;
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ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function);
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/* Reset the appertures so that we can talk to the register space. */
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
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IFPGA_PCI_APP0_512MB_BASE);
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
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IFPGA_PCI_APP1_CONF_BASE);
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if (bus == 0) {
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address = (1 << (device + 11)) | reg;
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bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
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IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00));
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/* Read the value from the bus... */
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data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh,
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address & 0x00ffffff);
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} else {
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bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
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IFPGA_PCI_APP1_CONF_T1_MAP);
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/* Read the value from the bus... */
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data = bus_space_read_4(sc->sc_iot, sc->sc_conf_ioh,
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tag | reg);
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}
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/* ... and put the memory spaces back again. */
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
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IFPGA_PCI_APP1_256MB_BASE);
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bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
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IFPGA_PCI_APP1_256MB_MAP);
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
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IFPGA_PCI_APP0_256MB_BASE);
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#ifdef PCI_DEBUG
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printf("ifpga_pci_conf_read(pcv=%p tag=0x%08lx reg=0x%02x)=0x%08x\n",
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pcv, tag, reg, data);
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#endif
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return data;
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}
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void
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ifpga_pci_conf_write(void *pcv, pcitag_t tag, int reg, pcireg_t data)
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{
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struct ifpga_pci_softc *sc = (struct ifpga_pci_softc *)pcv;
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int bus, device, function;
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u_int address;
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#ifdef PCI_DEBUG
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printf("ifpga_pci_conf_write(pcv=%p tag=0x%08lx reg=0x%02x, 0x%08x)\n",
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pcv, tag, reg, data);
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#endif
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ifpga_pci_decompose_tag(pcv, tag, &bus, &device, &function);
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/* Reset the appertures so that we can talk to the register space. */
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
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IFPGA_PCI_APP0_512MB_BASE);
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
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IFPGA_PCI_APP1_CONF_BASE);
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if (bus == 0) {
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address = (1 << (device + 11)) | reg;
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bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
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IFPGA_PCI_APP1_CONF_T0_MAP | ((address >> 16) & 0xff00));
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/* Read the value from the bus... */
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bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh,
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address & 0x00ffffff, data);
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} else {
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bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
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IFPGA_PCI_APP1_CONF_T1_MAP);
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/* Read the value from the bus... */
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bus_space_write_4(sc->sc_iot, sc->sc_conf_ioh, tag | reg,
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data);
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}
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/* ... and put the memory spaces back again. */
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE1,
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IFPGA_PCI_APP1_256MB_BASE);
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bus_space_write_2(sc->sc_memt, sc->sc_reg_ioh, V360_LB_MAP1,
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IFPGA_PCI_APP1_256MB_MAP);
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bus_space_write_4(sc->sc_memt, sc->sc_reg_ioh, V360_LB_BASE0,
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IFPGA_PCI_APP0_256MB_BASE);
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}
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int
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ifpga_pci_intr_map(struct pci_attach_args *pa, pci_intr_handle_t *ihp)
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{
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int line = pa->pa_intrline;
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#ifdef PCI_DEBUG
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int pin = pa->pa_intrpin;
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void *pcv = pa->pa_pc;
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pcitag_t intrtag = pa->pa_intrtag;
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int bus, device, function;
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ifpga_pci_decompose_tag(pcv, intrtag, &bus, &device, &function);
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printf("ifpga_pci_intr_map: pcv=%p, tag=%08lx pin=%d line=%d "
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"dev=%d\n", pcv, intrtag, pin, line, device);
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#endif
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#ifdef PCI_DEBUG
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printf("pin %d, line %d mapped to int %d\n", pin, line, line);
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#endif
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*ihp = line;
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return 0;
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}
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const char *
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ifpga_pci_intr_string(void *pcv, pci_intr_handle_t ih)
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{
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static char irqstr[12]; /* 6 + 1 + NULL + sanity */
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#ifdef PCI_DEBUG
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printf("ifpga_pci_intr_string(pcv=0x%p, ih=0x%lx)\n", pcv, ih);
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#endif
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if (ih == 0)
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panic("ifpga_pci_intr_string: bogus handle 0x%lx\n", ih);
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sprintf(irqstr, "pciint%ld", ih - IFPGA_INTRNUM_PCIINT0);
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return irqstr;
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}
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const struct evcnt *
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ifpga_pci_intr_evcnt(void *pcv, pci_intr_handle_t ih)
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{
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/* XXX for now, no evcnt parent reported */
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return NULL;
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}
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void *
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ifpga_pci_intr_establish(void *pcv, pci_intr_handle_t ih, int level,
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int (*func) (void *), void *arg)
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{
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void *intr;
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int length;
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char *string;
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#ifdef PCI_DEBUG
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printf("ifpga_pci_intr_establish(pcv=%p, ih=0x%lx, level=%d, "
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"func=%p, arg=%p)\n", pcv, ih, level, func, arg);
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#endif
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/* Copy the interrupt string to a private buffer */
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length = strlen(ifpga_pci_intr_string(pcv, ih));
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string = malloc(length + 1, M_DEVBUF, M_WAITOK);
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strcpy(string, ifpga_pci_intr_string(pcv, ih));
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intr = intr_claim(ih, level, string, func, arg);
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return intr;
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}
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void
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ifpga_pci_intr_disestablish(void *pcv, void *cookie)
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{
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#ifdef PCI_DEBUG
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printf("ifpga_pci_intr_disestablish(pcv=%p, cookie=%p)\n",
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pcv, cookie);
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#endif
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/* XXXX Need to free the string */
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intr_release(cookie);
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}
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